99 Commits

Author SHA1 Message Date
Maximilian Rehkopf
7df6909266 FPGA: rework shared memory access FSM 2012-07-09 02:12:59 +02:00
Maximilian Rehkopf
006ea8c44a FPGA: debug wires 2012-07-09 02:03:59 +02:00
Maximilian Rehkopf
684e2c3b81 FPGA/BSX: fix checksum registers 2012-07-09 02:00:29 +02:00
Maximilian Rehkopf
3af05cef91 FPGA/sd2sneslite: add missing file mcu_cmd.v; remove avr_cmd.v 2012-07-09 01:55:02 +02:00
Maximilian Rehkopf
a083d80ff9 FPGA: update clock speed to 88MHz 2012-07-09 01:54:05 +02:00
Maximilian Rehkopf
8148f5567c FPGA: properly synchronize external signals 2012-07-09 01:48:43 +02:00
Maximilian Rehkopf
1a52da6272 FPGA: Adjust DAC I²S signal timing 2012-07-09 01:41:47 +02:00
Maximilian Rehkopf
e33b2b2bc7 FPGA: simple SNES address input filtering 2012-07-09 01:37:57 +02:00
Maximilian Rehkopf
3530613349 FPGA: prepare new SNES command interface for future use (SNES side) 2012-07-09 01:29:47 +02:00
Maximilian Rehkopf
a5a02992e5 FPGA/embedded config: slightly tighten timing constraints 2012-06-11 01:52:45 +02:00
Maximilian Rehkopf
034b39588c FPGA: adjust menu memory mapping to make more room for file database 2012-06-10 20:07:45 +02:00
Maximilian Rehkopf
2a1ef40796 FPGA/cx4: adjust Cx4 CPU timing 2012-05-19 18:07:13 +02:00
Maximilian Rehkopf
7109f9e030 FPGA: add SD clock pullup to test configuration 2012-05-02 10:46:27 +02:00
Maximilian Rehkopf
e63658e2ad FPGA: Map mode 21 SRAM to 20:xxxx as well 2012-05-02 10:46:01 +02:00
Maximilian Rehkopf
37a309fd0e FPGA: improve BS support (more date fields, initial download data support) 2012-05-02 10:42:46 +02:00
Maximilian Rehkopf
f5caf21fac FPGA: slightly tighten timing constraints 2012-05-02 10:41:07 +02:00
Maximilian Rehkopf
1b272a7a7d FPGA/Cx4: introduce wait states (fix MMX2 attract mode) 2012-05-02 10:30:22 +02:00
ikari
8e7f77e49b FPGA/cx4: map ROM above bank 3F/BF 2012-02-27 22:14:19 +01:00
ikari
e2f33c28c9 FPGA: pull-up SD clock 2012-02-27 22:12:35 +01:00
ikari
f0a2e85c65 FPGA: updated project files 2012-01-14 23:16:57 +01:00
ikari
d7ad740843 FPGA/Cx4: add missing file main.ucf 2012-01-14 02:25:34 +01:00
ikari
059966f06a FPGA/Cx4: optimize non-sector-aligned SD DMA reads 2012-01-14 02:21:01 +01:00
ikari
3243143c39 FPGA/Cx4: region override (patch register $213f) 2012-01-14 02:19:39 +01:00
ikari
a50522b4e9 FPGA: optimize non-sector-aligned SD DMA reads 2012-01-14 01:22:38 +01:00
ikari
eefcc712ca FPGA: add RAM1 pinout to user constraints 2012-01-14 01:21:40 +01:00
ikari
5a3e935a3e FPGA: region override (patch register $213f) 2012-01-14 01:21:21 +01:00
ikari
dc01edfe9a FPGA: add test suite 2011-12-19 22:26:09 +01:00
ikari
93a12f3ca1 FPGA: fix occasional erroneous write inhibit 2011-11-10 23:41:33 +01:00
ikari
68f255d75b firmware, FPGA: fix for some SD cards 2011-11-10 17:54:52 +01:00
ikari
1987968db2 FPGA/cx4: clean up tab/whitespace mix 2011-11-01 21:09:31 +01:00
ikari
3dd64cb98f FPGA/cx4: timing closure 2011-11-01 20:56:30 +01:00
ikari
ecd75210a9 FPGA/cx4: fix memory sharing 2011-11-01 20:55:59 +01:00
ikari
314da586a4 FPGA/cx4: implement reset vector access 2011-11-01 20:54:07 +01:00
ikari
7643790fed FPGA/Cx4: fully operational except reset vector area 2011-10-30 01:54:39 +02:00
ikari
8c76dfbeb6 FPGA/Cx4: WIP 2011-10-27 15:42:13 +02:00
ikari
b2150ff205 Merge commit '7dc5860b4dbc05ddec34695e3620d27b44ec6cc2' into cx4 2011-10-25 00:21:38 +02:00
ikari
fb9a28bf38 FPGA/cx4: rework CPU FSM (ALU still missing) 2011-10-23 20:56:07 +02:00
ikari
e57c4aa450 FPGA/cx4: initial commit 2011-10-23 04:10:55 +02:00
Maximilian Rehkopf
1887036e86 FPGA: prevent erasure of first ROM byte on reconfiguration 2011-10-13 11:17:19 +02:00
Maximilian Rehkopf
86576d2e48 FPGA: clean up (port size mismatches, unused regs/wires, ...) 2011-10-09 14:13:35 +02:00
Maximilian Rehkopf
b05c89cdbf FPGA: merge recent changes into sd2sneslite 2011-10-08 17:05:22 +02:00
Maximilian Rehkopf
9a58016f26 FPGA: replace unneeded MCU_OVR signal 2011-10-08 02:29:38 +02:00
Maximilian Rehkopf
fe80fb8825 FPGA: delete unused source file 2011-10-07 23:54:41 +02:00
Maximilian Rehkopf
8f1dd1c1e2 FPGA: update project files (ISE 13.2) 2011-10-07 22:10:02 +02:00
Maximilian Rehkopf
f3a67ab5aa FPGA: rework shared memory access 2011-10-07 22:06:43 +02:00
Maximilian Rehkopf
80243fa604 FPGA: sync SPI to external SCK (allow 48MHz SCK) 2011-10-07 21:51:17 +02:00
Maximilian Rehkopf
3d608f2785 FPGA/MSU: more robust edge detection 2011-08-17 00:15:07 +02:00
ikari
ed1e398851 FPGA: fix ST0010 glitches 2011-06-23 00:55:29 +02:00
ikari
530a5ac113 FPGA: ST0010 support 2011-06-20 14:20:32 +02:00
ikari
0166dbbb27 FPGA: peripheral enable switch, SRAM access inhibit for games with no SaveRAM 2011-06-19 15:39:04 +02:00