Maximilian Rehkopf
39b07df47e
Correct LoROM SRAM mapping for smaller ROMs
...
SRAM is sometimes mapped not just to 70:0000-7fff but also to
70:8000-ffff if ROM size permits it (i.e. the ROM is small enough
to avoid overlap).
Map SRAM to 8000-ffff if the ROM mask denotes a ROM <= 16 MBits.
2013-06-30 23:42:28 +02:00
Maximilian Rehkopf
78beed80d7
FPGA: fix BSX PSRAM mapping
2013-06-26 10:44:57 +02:00
Maximilian Rehkopf
fa1e09d867
FPGA: fix large SRAM mapping
2012-11-18 17:18:26 +01:00
Maximilian Rehkopf
e504079e5d
FPGA: slow down bus timing
2012-11-07 22:32:33 +01:00
Maximilian Rehkopf
1f5af01bc0
FPGA: add BS-X "hole" (regs 09-0b)
2012-11-07 22:31:28 +01:00
Maximilian Rehkopf
9287d637d1
FPGA: properly map large SRAM (LoROM > 32kB, HiROM > 8kB)
2012-09-24 22:52:05 +02:00
Maximilian Rehkopf
13c24bea9d
FPGA: more accurate BS-X memory map
2012-09-24 22:49:54 +02:00
Maximilian Rehkopf
2ef480f751
FPGA/DSPx: buffer register input
2012-07-09 02:23:57 +02:00
Maximilian Rehkopf
6b3a7eb4ae
FPGA/SRTC: buffer register/address input
2012-07-09 02:22:57 +02:00
Maximilian Rehkopf
effa2a6972
FPGA/SDDMA: fix clock glitch, adjust RAM write timings
2012-07-09 02:22:07 +02:00
Maximilian Rehkopf
9253cc45b0
FPGA: implement MSU1 "audio error" status bit
2012-07-09 02:20:13 +02:00
Maximilian Rehkopf
9fbe61bad1
FPGA: Use internal clock instead of SNES master clock for $213F RMW timing
2012-07-09 02:18:28 +02:00
Maximilian Rehkopf
968c347986
FPGA/SPI: detect end of byte via MSB toggle instead of constant compare of async input
2012-07-09 02:17:01 +02:00
Maximilian Rehkopf
c231c8b821
FPGA: misc cleanup
2012-07-09 02:15:21 +02:00
Maximilian Rehkopf
7df6909266
FPGA: rework shared memory access FSM
2012-07-09 02:12:59 +02:00
Maximilian Rehkopf
006ea8c44a
FPGA: debug wires
2012-07-09 02:03:59 +02:00
Maximilian Rehkopf
684e2c3b81
FPGA/BSX: fix checksum registers
2012-07-09 02:00:29 +02:00
Maximilian Rehkopf
a083d80ff9
FPGA: update clock speed to 88MHz
2012-07-09 01:54:05 +02:00
Maximilian Rehkopf
8148f5567c
FPGA: properly synchronize external signals
2012-07-09 01:48:43 +02:00
Maximilian Rehkopf
1a52da6272
FPGA: Adjust DAC I²S signal timing
2012-07-09 01:41:47 +02:00
Maximilian Rehkopf
e33b2b2bc7
FPGA: simple SNES address input filtering
2012-07-09 01:37:57 +02:00
Maximilian Rehkopf
3530613349
FPGA: prepare new SNES command interface for future use (SNES side)
2012-07-09 01:29:47 +02:00
Maximilian Rehkopf
034b39588c
FPGA: adjust menu memory mapping to make more room for file database
2012-06-10 20:07:45 +02:00
Maximilian Rehkopf
e63658e2ad
FPGA: Map mode 21 SRAM to 20:xxxx as well
2012-05-02 10:46:01 +02:00
Maximilian Rehkopf
37a309fd0e
FPGA: improve BS support (more date fields, initial download data support)
2012-05-02 10:42:46 +02:00
Maximilian Rehkopf
f5caf21fac
FPGA: slightly tighten timing constraints
2012-05-02 10:41:07 +02:00
ikari
e2f33c28c9
FPGA: pull-up SD clock
2012-02-27 22:12:35 +01:00
ikari
f0a2e85c65
FPGA: updated project files
2012-01-14 23:16:57 +01:00
ikari
a50522b4e9
FPGA: optimize non-sector-aligned SD DMA reads
2012-01-14 01:22:38 +01:00
ikari
eefcc712ca
FPGA: add RAM1 pinout to user constraints
2012-01-14 01:21:40 +01:00
ikari
5a3e935a3e
FPGA: region override (patch register $213f)
2012-01-14 01:21:21 +01:00
ikari
93a12f3ca1
FPGA: fix occasional erroneous write inhibit
2011-11-10 23:41:33 +01:00
ikari
68f255d75b
firmware, FPGA: fix for some SD cards
2011-11-10 17:54:52 +01:00
ikari
8c76dfbeb6
FPGA/Cx4: WIP
2011-10-27 15:42:13 +02:00
Maximilian Rehkopf
1887036e86
FPGA: prevent erasure of first ROM byte on reconfiguration
2011-10-13 11:17:19 +02:00
Maximilian Rehkopf
86576d2e48
FPGA: clean up (port size mismatches, unused regs/wires, ...)
2011-10-09 14:13:35 +02:00
Maximilian Rehkopf
9a58016f26
FPGA: replace unneeded MCU_OVR signal
2011-10-08 02:29:38 +02:00
Maximilian Rehkopf
fe80fb8825
FPGA: delete unused source file
2011-10-07 23:54:41 +02:00
Maximilian Rehkopf
8f1dd1c1e2
FPGA: update project files (ISE 13.2)
2011-10-07 22:10:02 +02:00
Maximilian Rehkopf
f3a67ab5aa
FPGA: rework shared memory access
2011-10-07 22:06:43 +02:00
Maximilian Rehkopf
80243fa604
FPGA: sync SPI to external SCK (allow 48MHz SCK)
2011-10-07 21:51:17 +02:00
Maximilian Rehkopf
3d608f2785
FPGA/MSU: more robust edge detection
2011-08-17 00:15:07 +02:00
ikari
ed1e398851
FPGA: fix ST0010 glitches
2011-06-23 00:55:29 +02:00
ikari
530a5ac113
FPGA: ST0010 support
2011-06-20 14:20:32 +02:00
ikari
0166dbbb27
FPGA: peripheral enable switch, SRAM access inhibit for games with no SaveRAM
2011-06-19 15:39:04 +02:00
ikari
a8d64311c6
FPGA: code formatting, update synthesis configuration, timing
2011-06-18 02:27:56 +02:00
ikari
29f427821b
FPGA: Fix upd77c25 for 1chip consoles
2011-06-17 00:54:26 +02:00
ikari
a3ac555e18
FPGA: add test fixtures
2011-06-11 23:57:06 +02:00
ikari
1717bf942b
FPGA: add missing IP core files
2011-06-11 23:55:24 +02:00
ikari
56538dc5e1
FPGA: uPD77c25 WIP
2011-06-11 03:32:37 +02:00
