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22
.gitignore
vendored
Normal file
22
.gitignore
vendored
Normal file
@@ -0,0 +1,22 @@
|
|||||||
|
*.cod
|
||||||
|
*.hex
|
||||||
|
*.lst
|
||||||
|
*.o
|
||||||
|
*.diff
|
||||||
|
.DS_Store
|
||||||
|
*.o65
|
||||||
|
*.ips
|
||||||
|
*.bin
|
||||||
|
*.map
|
||||||
|
*.o.d
|
||||||
|
*.log
|
||||||
|
*.smc
|
||||||
|
*.sfc
|
||||||
|
*~
|
||||||
|
*.old
|
||||||
|
*.elf
|
||||||
|
*.img
|
||||||
|
autoconf.h
|
||||||
|
utils/rle
|
||||||
|
utils/derle
|
||||||
|
*.bit
|
||||||
96
CHANGELOG
Normal file
96
CHANGELOG
Normal file
@@ -0,0 +1,96 @@
|
|||||||
|
v0.1.1
|
||||||
|
======
|
||||||
|
|
||||||
|
* initial public release
|
||||||
|
|
||||||
|
|
||||||
|
v0.1.1a (bugfix release)
|
||||||
|
========================
|
||||||
|
|
||||||
|
* Fixes:
|
||||||
|
- SuperCIC pair mode was erroneously enabled in firmware binary
|
||||||
|
- SNES menu crashed on empty database
|
||||||
|
|
||||||
|
|
||||||
|
v0.1.2
|
||||||
|
======
|
||||||
|
|
||||||
|
* New menu entry: "System Information"
|
||||||
|
* Auto region override (eliminate "This game pak is not designed..." messages)
|
||||||
|
* Improved mapper detection (fixes Batman vs. Joker and many PD ROMs)
|
||||||
|
* Improved data streaming performance
|
||||||
|
(should reduce MSU1 errors with some cards)
|
||||||
|
* A and B buttons swapped in menu to match common key mappings
|
||||||
|
* Fixes:
|
||||||
|
- MSU1: Stop audio playback on end of audio file
|
||||||
|
|
||||||
|
|
||||||
|
v0.1.3
|
||||||
|
======
|
||||||
|
|
||||||
|
* Updated logo gfx with new version from klaptra
|
||||||
|
* Updated font to distinguish between 1 and I
|
||||||
|
* Menu layout adjusted to move status line up by 4 scanlines
|
||||||
|
* Run previously loaded game by pressing Start in the menu
|
||||||
|
* Auto-scroll file names that do not fit the screen
|
||||||
|
* SD access time measurement on System Information screen (takes a while!)
|
||||||
|
* Cx4 memory map: mirror ROM to 40-7e/c0-ff (fixes MMX3 Zero patch)
|
||||||
|
* Some FPGA configuration error detection (mainly useful for hardware diag)
|
||||||
|
* Fixes:
|
||||||
|
- FPGA-side SD clock pullup (increases reliability with some cards)
|
||||||
|
|
||||||
|
|
||||||
|
v0.1.4
|
||||||
|
======
|
||||||
|
|
||||||
|
* SPC Player (contributed by necronomfive/blargg)
|
||||||
|
* System Information screen now shows CPU/PPU revision (contributed by necronomfive)
|
||||||
|
* Satellaview: basic data transmission packet support (makes some more games boot, thanks to LuigiBlood for assistance and sample data packets)
|
||||||
|
* Number of supported files increased to 50000 per card / 16380 per directory
|
||||||
|
* Slight speedup of menu text rendering
|
||||||
|
* Reduce load time of menu
|
||||||
|
* Adjust Cx4 timing to be more faithful
|
||||||
|
(Mega Man now defeats the boss in attract mode in Mega Man X2)
|
||||||
|
* adapt ROM mirroring size to file size if header information is invalid
|
||||||
|
(fixes Super Noah's Ark 3D, possibly others)
|
||||||
|
* MSU1 interface changes suggested by byuu:
|
||||||
|
- Data offset 0 and audio track 0 are automatically requested on reset.
|
||||||
|
This causes the busy flags to become 0 shortly after reset/startup.
|
||||||
|
- $2000 bit 3 is now "audio error", becomes valid after "audio busy" -> 0
|
||||||
|
set when an error occurred while preparing playback of the requested audio track
|
||||||
|
* write LED stays on when SRAM content changes constantly
|
||||||
|
* Fixes:
|
||||||
|
- fix empty save files on FAT16 / incorrect free cluster count on FAT32
|
||||||
|
- correct directory sorting (force parent directory at top of list)
|
||||||
|
- fix text corruption when entering a directory with a scrollable name
|
||||||
|
- fix files/dirs count in system information
|
||||||
|
- make 'sd2snes' directory hiding case-insensitive
|
||||||
|
- improve DAC I²S timing
|
||||||
|
- fix occasional palette corruption in menu
|
||||||
|
- fix SD clock glitch on ROM loading (occasional glitches/crashes)
|
||||||
|
- fix memory write timing on ROM loading (occasional glitches/crashes)
|
||||||
|
- fix SPI timing (ROMs not loading; System Information not working)
|
||||||
|
- properly synchronize SNES control signals (occasional glitches/crashes)
|
||||||
|
- fix floating IRQ output (occasional glitches/slowdowns)
|
||||||
|
|
||||||
|
|
||||||
|
v0.1.4a (bugfix release)
|
||||||
|
========================
|
||||||
|
|
||||||
|
* Fix DMA initialization in the menu (could cause sprite corruption in some games)
|
||||||
|
|
||||||
|
|
||||||
|
v0.1.5
|
||||||
|
======
|
||||||
|
|
||||||
|
* Sort directories by entire file name instead of first 20 characters only
|
||||||
|
* Correctly map SRAM larger than 8192 bytes (HiROM) / 32768 bytes (LoROM)
|
||||||
|
(fixes Dezaemon, Ongaku Tsukuuru - Kanadeeru)
|
||||||
|
* SPC player: fix soft fade-in (first note cut off) on S-APU consoles
|
||||||
|
(1CHIP / some Jr.)
|
||||||
|
* More accurate BS-X memory map
|
||||||
|
* Ignore input from non-standard controllers (Super Scope, Mouse etc.)
|
||||||
|
* Fixes:
|
||||||
|
- minor memory access timing tweaks
|
||||||
|
(should help with occasional glitches on some systems)
|
||||||
|
|
||||||
BIN
bin/bsxpage.bin
Normal file
BIN
bin/bsxpage.bin
Normal file
Binary file not shown.
@@ -64,6 +64,7 @@ processor p12f629
|
|||||||
; 0x4d buffer for eeprom access
|
; 0x4d buffer for eeprom access
|
||||||
; 0x4e loop variable for longwait
|
; 0x4e loop variable for longwait
|
||||||
; 0x4f loop variable for wait
|
; 0x4f loop variable for wait
|
||||||
|
; 0x5c GPIO buffer variable for pair mode allow
|
||||||
; 0x5d 0: SuperCIC pair mode available flag
|
; 0x5d 0: SuperCIC pair mode available flag
|
||||||
; 0x5e SuperCIC pair mode detect (phase 1)
|
; 0x5e SuperCIC pair mode detect (phase 1)
|
||||||
; 0x5f SuperCIC pair mode detect (phase 2)
|
; 0x5f SuperCIC pair mode detect (phase 2)
|
||||||
@@ -90,8 +91,8 @@ isr
|
|||||||
clrf 0x5f ; clear pair mode detect
|
clrf 0x5f ; clear pair mode detect
|
||||||
bsf 0x5f, 1 ;
|
bsf 0x5f, 1 ;
|
||||||
clrf 0x5d ; clear pair mode available
|
clrf 0x5d ; clear pair mode available
|
||||||
nop
|
clrf 0x5c ; clear pair mode allow buffer
|
||||||
nop
|
bsf 0x5c, 3 ; assume disallow
|
||||||
bsf INTCON, 7 ; re-enable interrupts (ISR will continue as main)
|
bsf INTCON, 7 ; re-enable interrupts (ISR will continue as main)
|
||||||
goto main
|
goto main
|
||||||
init
|
init
|
||||||
@@ -296,8 +297,8 @@ swapskip
|
|||||||
; indirect access, no post increment, etc.
|
; indirect access, no post increment, etc.
|
||||||
mangle
|
mangle
|
||||||
call mangle_lock
|
call mangle_lock
|
||||||
nop
|
movf GPIO, w ; buffer GPIO state
|
||||||
nop
|
movwf 0x5c ; for pair mode "transaction"
|
||||||
mangle_key
|
mangle_key
|
||||||
movf 0x2f, w
|
movf 0x2f, w
|
||||||
movwf 0x20
|
movwf 0x20
|
||||||
@@ -459,7 +460,7 @@ mangle_key_withskip
|
|||||||
;-------pair mode code-------
|
;-------pair mode code-------
|
||||||
bcf GPIO, 0
|
bcf GPIO, 0
|
||||||
movf GPIO, w
|
movf GPIO, w
|
||||||
btfss GPIO, 3
|
btfss 0x5c, 3
|
||||||
bsf GPIO, 0
|
bsf GPIO, 0
|
||||||
movwf 0x5e
|
movwf 0x5e
|
||||||
movf GPIO, w
|
movf GPIO, w
|
||||||
@@ -642,7 +643,7 @@ mangle_lock_withskip
|
|||||||
goto scic_pair_skip1
|
goto scic_pair_skip1
|
||||||
btfsc 0x5f, 1
|
btfsc 0x5f, 1
|
||||||
goto scic_pair_skip2
|
goto scic_pair_skip2
|
||||||
btfsc GPIO, 3
|
btfsc 0x5c, 3
|
||||||
goto scic_pair_skip3
|
goto scic_pair_skip3
|
||||||
goto supercic_pairmode
|
goto supercic_pairmode
|
||||||
scic_pair_skip1
|
scic_pair_skip1
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
EESchema Schematic File Version 2 date Fri 29 Jul 2011 09:56:34 PM CEST
|
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:06 PM CET
|
||||||
LIBS:power
|
LIBS:power
|
||||||
LIBS:device
|
LIBS:device
|
||||||
LIBS:transistors
|
LIBS:transistors
|
||||||
@@ -47,7 +47,7 @@ $Descr A3 16535 11700
|
|||||||
encoding utf-8
|
encoding utf-8
|
||||||
Sheet 6 6
|
Sheet 6 6
|
||||||
Title "sd2snes Mark II"
|
Title "sd2snes Mark II"
|
||||||
Date "24 jul 2011"
|
Date "9 dec 2011"
|
||||||
Rev "C"
|
Rev "C"
|
||||||
Comp "Maximilian Rehkopf"
|
Comp "Maximilian Rehkopf"
|
||||||
Comment1 ""
|
Comment1 ""
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
EESchema Schematic File Version 2 date Fri 29 Jul 2011 09:56:34 PM CEST
|
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:06 PM CET
|
||||||
LIBS:power
|
LIBS:power
|
||||||
LIBS:device
|
LIBS:device
|
||||||
LIBS:transistors
|
LIBS:transistors
|
||||||
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
|
|||||||
encoding utf-8
|
encoding utf-8
|
||||||
Sheet 4 6
|
Sheet 4 6
|
||||||
Title "sd2snes Mark II"
|
Title "sd2snes Mark II"
|
||||||
Date "24 jul 2011"
|
Date "9 dec 2011"
|
||||||
Rev "C"
|
Rev "C"
|
||||||
Comp "Maximilian Rehkopf"
|
Comp "Maximilian Rehkopf"
|
||||||
Comment1 ""
|
Comment1 ""
|
||||||
@@ -1034,7 +1034,7 @@ L C C409
|
|||||||
U 1 1 4BEECBD1
|
U 1 1 4BEECBD1
|
||||||
P 3100 6600
|
P 3100 6600
|
||||||
F 0 "C409" H 3150 6700 50 0000 L CNN
|
F 0 "C409" H 3150 6700 50 0000 L CNN
|
||||||
F 1 "22p" H 3150 6500 50 0000 L CNN
|
F 1 "10p" H 3150 6500 50 0000 L CNN
|
||||||
F 2 "SM0805_FIXEDMASK" H 3100 6600 60 0001 C CNN
|
F 2 "SM0805_FIXEDMASK" H 3100 6600 60 0001 C CNN
|
||||||
1 3100 6600
|
1 3100 6600
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
@@ -1044,7 +1044,7 @@ L C C408
|
|||||||
U 1 1 4BEECBCD
|
U 1 1 4BEECBCD
|
||||||
P 2500 6600
|
P 2500 6600
|
||||||
F 0 "C408" H 2550 6700 50 0000 L CNN
|
F 0 "C408" H 2550 6700 50 0000 L CNN
|
||||||
F 1 "22p" H 2550 6500 50 0000 L CNN
|
F 1 "10p" H 2550 6500 50 0000 L CNN
|
||||||
F 2 "SM0805_FIXEDMASK" H 2500 6600 60 0001 C CNN
|
F 2 "SM0805_FIXEDMASK" H 2500 6600 60 0001 C CNN
|
||||||
1 2500 6600
|
1 2500 6600
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
EESchema Schematic File Version 2 date Fri 29 Jul 2011 09:56:34 PM CEST
|
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:05 PM CET
|
||||||
LIBS:power
|
LIBS:power
|
||||||
LIBS:device
|
LIBS:device
|
||||||
LIBS:transistors
|
LIBS:transistors
|
||||||
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
|
|||||||
encoding utf-8
|
encoding utf-8
|
||||||
Sheet 3 6
|
Sheet 3 6
|
||||||
Title "sd2snes Mark II"
|
Title "sd2snes Mark II"
|
||||||
Date "24 jul 2011"
|
Date "9 dec 2011"
|
||||||
Rev "C"
|
Rev "C"
|
||||||
Comp "Maximilian Rehkopf"
|
Comp "Maximilian Rehkopf"
|
||||||
Comment1 ""
|
Comment1 ""
|
||||||
@@ -322,7 +322,7 @@ L R R513
|
|||||||
U 1 1 4BF2FDAC
|
U 1 1 4BF2FDAC
|
||||||
P 9150 5700
|
P 9150 5700
|
||||||
F 0 "R513" V 9230 5700 50 0000 C CNN
|
F 0 "R513" V 9230 5700 50 0000 C CNN
|
||||||
F 1 "1k" V 9150 5700 50 0000 C CNN
|
F 1 "100k" V 9150 5700 50 0000 C CNN
|
||||||
F 2 "SM0805_FIXEDMASK" H 9150 5700 60 0001 C CNN
|
F 2 "SM0805_FIXEDMASK" H 9150 5700 60 0001 C CNN
|
||||||
1 9150 5700
|
1 9150 5700
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
EESchema Schematic File Version 2 date Fri 29 Jul 2011 09:56:34 PM CEST
|
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:06 PM CET
|
||||||
LIBS:power
|
LIBS:power
|
||||||
LIBS:device
|
LIBS:device
|
||||||
LIBS:transistors
|
LIBS:transistors
|
||||||
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
|
|||||||
encoding utf-8
|
encoding utf-8
|
||||||
Sheet 5 6
|
Sheet 5 6
|
||||||
Title "sd2snes Mark II"
|
Title "sd2snes Mark II"
|
||||||
Date "24 jul 2011"
|
Date "9 dec 2011"
|
||||||
Rev "C"
|
Rev "C"
|
||||||
Comp "Maximilian Rehkopf"
|
Comp "Maximilian Rehkopf"
|
||||||
Comment1 ""
|
Comment1 ""
|
||||||
@@ -55,6 +55,8 @@ Comment2 ""
|
|||||||
Comment3 ""
|
Comment3 ""
|
||||||
Comment4 ""
|
Comment4 ""
|
||||||
$EndDescr
|
$EndDescr
|
||||||
|
Text Notes 4900 5900 0 50 ~ 0
|
||||||
|
Stuff with 0603 ferrite bead
|
||||||
Wire Wire Line
|
Wire Wire Line
|
||||||
5750 5500 5900 5500
|
5750 5500 5900 5500
|
||||||
Wire Wire Line
|
Wire Wire Line
|
||||||
@@ -334,7 +336,7 @@ L JUMPER JP341
|
|||||||
U 1 1 4DB35D41
|
U 1 1 4DB35D41
|
||||||
P 5450 5500
|
P 5450 5500
|
||||||
F 0 "JP341" H 5450 5650 60 0000 C CNN
|
F 0 "JP341" H 5450 5650 60 0000 C CNN
|
||||||
F 1 "JUMPER" H 5450 5420 40 0000 C CNN
|
F 1 "FB 0603" H 5450 5420 40 0000 C CNN
|
||||||
1 5450 5500
|
1 5450 5500
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
|
|||||||
BIN
pcb/kicad/RevE/sd2snes-BOM-with-supplier.ods
Normal file
BIN
pcb/kicad/RevE/sd2snes-BOM-with-supplier.ods
Normal file
Binary file not shown.
BIN
pcb/kicad/RevE/sd2snes-components-back.png
Normal file
BIN
pcb/kicad/RevE/sd2snes-components-back.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 270 KiB |
BIN
pcb/kicad/RevE/sd2snes-components-front.png
Normal file
BIN
pcb/kicad/RevE/sd2snes-components-front.png
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 521 KiB |
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,4 +1,4 @@
|
|||||||
EESchema Schematic File Version 2 date Fri 29 Jul 2011 09:56:34 PM CEST
|
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:05 PM CET
|
||||||
LIBS:power
|
LIBS:power
|
||||||
LIBS:device
|
LIBS:device
|
||||||
LIBS:transistors
|
LIBS:transistors
|
||||||
@@ -47,7 +47,7 @@ $Descr A4 11700 8267
|
|||||||
encoding utf-8
|
encoding utf-8
|
||||||
Sheet 1 6
|
Sheet 1 6
|
||||||
Title "sd2snes Mark II"
|
Title "sd2snes Mark II"
|
||||||
Date "24 jul 2011"
|
Date "9 dec 2011"
|
||||||
Rev "E"
|
Rev "E"
|
||||||
Comp "Maximilian Rehkopf"
|
Comp "Maximilian Rehkopf"
|
||||||
Comment1 ""
|
Comment1 ""
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
EESchema Schematic File Version 2 date Fri 29 Jul 2011 09:56:34 PM CEST
|
EESchema Schematic File Version 2 date Fri 09 Dec 2011 10:46:05 PM CET
|
||||||
LIBS:power
|
LIBS:power
|
||||||
LIBS:device
|
LIBS:device
|
||||||
LIBS:transistors
|
LIBS:transistors
|
||||||
@@ -47,7 +47,7 @@ $Descr A3 16535 11700
|
|||||||
encoding utf-8
|
encoding utf-8
|
||||||
Sheet 2 6
|
Sheet 2 6
|
||||||
Title "sd2snes Mark II"
|
Title "sd2snes Mark II"
|
||||||
Date "24 jul 2011"
|
Date "9 dec 2011"
|
||||||
Rev "C"
|
Rev "C"
|
||||||
Comp "Maximilian Rehkopf"
|
Comp "Maximilian Rehkopf"
|
||||||
Comment1 ""
|
Comment1 ""
|
||||||
@@ -855,7 +855,7 @@ L R_PACK4 RA114
|
|||||||
U 1 1 4D97B45F
|
U 1 1 4D97B45F
|
||||||
P 15250 4750
|
P 15250 4750
|
||||||
F 0 "RA114" H 15250 4600 40 0000 C CNN
|
F 0 "RA114" H 15250 4600 40 0000 C CNN
|
||||||
F 1 "220" H 15250 4950 40 0000 C CNN
|
F 1 "100" H 15250 4950 40 0000 C CNN
|
||||||
1 15250 4750
|
1 15250 4750
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -864,7 +864,7 @@ L R_PACK4 RA113
|
|||||||
U 1 1 4D97B45C
|
U 1 1 4D97B45C
|
||||||
P 15250 4350
|
P 15250 4350
|
||||||
F 0 "RA113" H 15250 4800 40 0000 C CNN
|
F 0 "RA113" H 15250 4800 40 0000 C CNN
|
||||||
F 1 "220" H 15250 4550 40 0000 C CNN
|
F 1 "100" H 15250 4550 40 0000 C CNN
|
||||||
1 15250 4350
|
1 15250 4350
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -913,7 +913,7 @@ L R_PACK4 RA108
|
|||||||
U 1 1 4D963119
|
U 1 1 4D963119
|
||||||
P 4150 8350
|
P 4150 8350
|
||||||
F 0 "RA108" H 4150 8300 40 0000 C CNN
|
F 0 "RA108" H 4150 8300 40 0000 C CNN
|
||||||
F 1 "220" H 4150 8550 40 0000 C CNN
|
F 1 "100" H 4150 8550 40 0000 C CNN
|
||||||
1 4150 8350
|
1 4150 8350
|
||||||
-1 0 0 -1
|
-1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -922,7 +922,7 @@ L R_PACK4 RA107
|
|||||||
U 1 1 4D963117
|
U 1 1 4D963117
|
||||||
P 4150 7950
|
P 4150 7950
|
||||||
F 0 "RA107" H 4150 8400 40 0000 C CNN
|
F 0 "RA107" H 4150 8400 40 0000 C CNN
|
||||||
F 1 "220" H 4150 8150 40 0000 C CNN
|
F 1 "100" H 4150 8150 40 0000 C CNN
|
||||||
1 4150 7950
|
1 4150 7950
|
||||||
-1 0 0 -1
|
-1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -931,7 +931,7 @@ L R_PACK4 RA106
|
|||||||
U 1 1 4D963115
|
U 1 1 4D963115
|
||||||
P 4150 7350
|
P 4150 7350
|
||||||
F 0 "RA106" H 4150 7300 40 0000 C CNN
|
F 0 "RA106" H 4150 7300 40 0000 C CNN
|
||||||
F 1 "220" H 4150 7550 40 0000 C CNN
|
F 1 "100" H 4150 7550 40 0000 C CNN
|
||||||
1 4150 7350
|
1 4150 7350
|
||||||
-1 0 0 -1
|
-1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -940,7 +940,7 @@ L R_PACK4 RA105
|
|||||||
U 1 1 4D96310E
|
U 1 1 4D96310E
|
||||||
P 4150 6950
|
P 4150 6950
|
||||||
F 0 "RA105" H 4150 7400 40 0000 C CNN
|
F 0 "RA105" H 4150 7400 40 0000 C CNN
|
||||||
F 1 "220" H 4150 7150 40 0000 C CNN
|
F 1 "100" H 4150 7150 40 0000 C CNN
|
||||||
1 4150 6950
|
1 4150 6950
|
||||||
-1 0 0 -1
|
-1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -949,7 +949,7 @@ L R_PACK4 RA112
|
|||||||
U 1 1 4D96310C
|
U 1 1 4D96310C
|
||||||
P 4150 4650
|
P 4150 4650
|
||||||
F 0 "RA112" H 4150 4600 40 0000 C CNN
|
F 0 "RA112" H 4150 4600 40 0000 C CNN
|
||||||
F 1 "220" H 4150 4850 40 0000 C CNN
|
F 1 "100" H 4150 4850 40 0000 C CNN
|
||||||
1 4150 4650
|
1 4150 4650
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -958,7 +958,7 @@ L R_PACK4 RA111
|
|||||||
U 1 1 4D96310A
|
U 1 1 4D96310A
|
||||||
P 4150 4250
|
P 4150 4250
|
||||||
F 0 "RA111" H 4150 4700 40 0000 C CNN
|
F 0 "RA111" H 4150 4700 40 0000 C CNN
|
||||||
F 1 "220" H 4150 4450 40 0000 C CNN
|
F 1 "100" H 4150 4450 40 0000 C CNN
|
||||||
1 4150 4250
|
1 4150 4250
|
||||||
-1 0 0 -1
|
-1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -967,7 +967,7 @@ L R_PACK4 RA110
|
|||||||
U 1 1 4D963107
|
U 1 1 4D963107
|
||||||
P 4150 3650
|
P 4150 3650
|
||||||
F 0 "RA110" H 4150 3600 40 0000 C CNN
|
F 0 "RA110" H 4150 3600 40 0000 C CNN
|
||||||
F 1 "220" H 4150 3850 40 0000 C CNN
|
F 1 "100" H 4150 3850 40 0000 C CNN
|
||||||
1 4150 3650
|
1 4150 3650
|
||||||
-1 0 0 -1
|
-1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -976,7 +976,7 @@ L R_PACK4 RA109
|
|||||||
U 1 1 4D963103
|
U 1 1 4D963103
|
||||||
P 4150 3250
|
P 4150 3250
|
||||||
F 0 "RA109" H 4150 3700 40 0000 C CNN
|
F 0 "RA109" H 4150 3700 40 0000 C CNN
|
||||||
F 1 "220" H 4150 3450 40 0000 C CNN
|
F 1 "100" H 4150 3450 40 0000 C CNN
|
||||||
1 4150 3250
|
1 4150 3250
|
||||||
-1 0 0 -1
|
-1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -985,7 +985,7 @@ L R_PACK4 RA102
|
|||||||
U 1 1 4D9630F4
|
U 1 1 4D9630F4
|
||||||
P 12400 3750
|
P 12400 3750
|
||||||
F 0 "RA102" H 12400 3700 40 0000 C CNN
|
F 0 "RA102" H 12400 3700 40 0000 C CNN
|
||||||
F 1 "220" H 12400 3950 40 0000 C CNN
|
F 1 "100" H 12400 3950 40 0000 C CNN
|
||||||
1 12400 3750
|
1 12400 3750
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -994,7 +994,7 @@ L R_PACK4 RA101
|
|||||||
U 1 1 4D9630F0
|
U 1 1 4D9630F0
|
||||||
P 12400 3350
|
P 12400 3350
|
||||||
F 0 "RA101" H 12400 3800 40 0000 C CNN
|
F 0 "RA101" H 12400 3800 40 0000 C CNN
|
||||||
F 1 "220" H 12400 3550 40 0000 C CNN
|
F 1 "100" H 12400 3550 40 0000 C CNN
|
||||||
1 12400 3350
|
1 12400 3350
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -1005,7 +1005,7 @@ P 12400 4750
|
|||||||
AR Path="/4B6E16F2/4D95CDCD" Ref="RP?" Part="1"
|
AR Path="/4B6E16F2/4D95CDCD" Ref="RP?" Part="1"
|
||||||
AR Path="/4B6E16F2/4D95CDD4" Ref="RA104" Part="1"
|
AR Path="/4B6E16F2/4D95CDD4" Ref="RA104" Part="1"
|
||||||
F 0 "RA104" H 12400 4650 40 0000 C CNN
|
F 0 "RA104" H 12400 4650 40 0000 C CNN
|
||||||
F 1 "220" H 12400 4950 40 0000 C CNN
|
F 1 "FB" H 12400 4950 40 0000 C CNN
|
||||||
1 12400 4750
|
1 12400 4750
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -1014,7 +1014,7 @@ L R_PACK4 RA103
|
|||||||
U 1 1 4D95CDCD
|
U 1 1 4D95CDCD
|
||||||
P 12400 4350
|
P 12400 4350
|
||||||
F 0 "RA103" H 12400 4800 40 0000 C CNN
|
F 0 "RA103" H 12400 4800 40 0000 C CNN
|
||||||
F 1 "220" H 12400 4550 40 0000 C CNN
|
F 1 "FB" H 12400 4550 40 0000 C CNN
|
||||||
1 12400 4350
|
1 12400 4350
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
@@ -1125,7 +1125,7 @@ L R R102
|
|||||||
U 1 1 4C7EAEBF
|
U 1 1 4C7EAEBF
|
||||||
P 6850 8600
|
P 6850 8600
|
||||||
F 0 "R102" V 6930 8600 50 0000 C CNN
|
F 0 "R102" V 6930 8600 50 0000 C CNN
|
||||||
F 1 "1k" V 6850 8600 50 0000 C CNN
|
F 1 "100k" V 6850 8600 50 0000 C CNN
|
||||||
1 6850 8600
|
1 6850 8600
|
||||||
1 0 0 -1
|
1 0 0 -1
|
||||||
$EndComp
|
$EndComp
|
||||||
|
|||||||
1322
pcb/kicad/RevE2/fpga.sch
Normal file
1322
pcb/kicad/RevE2/fpga.sch
Normal file
File diff suppressed because it is too large
Load Diff
1194
pcb/kicad/RevE2/mcu.sch
Normal file
1194
pcb/kicad/RevE2/mcu.sch
Normal file
File diff suppressed because it is too large
Load Diff
807
pcb/kicad/RevE2/memory.sch
Normal file
807
pcb/kicad/RevE2/memory.sch
Normal file
@@ -0,0 +1,807 @@
|
|||||||
|
EESchema Schematic File Version 2 date Mon 02 Jan 2012 11:27:18 PM CET
|
||||||
|
LIBS:power
|
||||||
|
LIBS:device
|
||||||
|
LIBS:transistors
|
||||||
|
LIBS:conn
|
||||||
|
LIBS:linear
|
||||||
|
LIBS:regul
|
||||||
|
LIBS:74xx
|
||||||
|
LIBS:cmos4000
|
||||||
|
LIBS:adc-dac
|
||||||
|
LIBS:memory
|
||||||
|
LIBS:xilinx
|
||||||
|
LIBS:special
|
||||||
|
LIBS:microcontrollers
|
||||||
|
LIBS:dsp
|
||||||
|
LIBS:microchip
|
||||||
|
LIBS:analog_switches
|
||||||
|
LIBS:motorola
|
||||||
|
LIBS:texas
|
||||||
|
LIBS:intel
|
||||||
|
LIBS:audio
|
||||||
|
LIBS:interface
|
||||||
|
LIBS:digital-audio
|
||||||
|
LIBS:philips
|
||||||
|
LIBS:display
|
||||||
|
LIBS:cypress
|
||||||
|
LIBS:siliconi
|
||||||
|
LIBS:opto
|
||||||
|
LIBS:atmel
|
||||||
|
LIBS:contrib
|
||||||
|
LIBS:valves
|
||||||
|
LIBS:snescart
|
||||||
|
LIBS:misc-74
|
||||||
|
LIBS:vreg
|
||||||
|
LIBS:lpc1754
|
||||||
|
LIBS:sd_card
|
||||||
|
LIBS:cy62148ev30
|
||||||
|
LIBS:mt45w8mw16
|
||||||
|
LIBS:cs4344
|
||||||
|
LIBS:double_sch_kcom
|
||||||
|
LIBS:usb_minib
|
||||||
|
LIBS:mic23250
|
||||||
|
LIBS:sd2snes-cache
|
||||||
|
EELAYER 25 0
|
||||||
|
EELAYER END
|
||||||
|
$Descr A4 11700 8267
|
||||||
|
encoding utf-8
|
||||||
|
Sheet 3 6
|
||||||
|
Title "sd2snes Mark II"
|
||||||
|
Date "2 jan 2012"
|
||||||
|
Rev "E2"
|
||||||
|
Comp "Maximilian Rehkopf"
|
||||||
|
Comment1 ""
|
||||||
|
Comment2 ""
|
||||||
|
Comment3 ""
|
||||||
|
Comment4 ""
|
||||||
|
$EndDescr
|
||||||
|
Text Label 7650 2000 0 50 ~ 0
|
||||||
|
SRAM_Vcc
|
||||||
|
Wire Wire Line
|
||||||
|
7650 4750 7650 5000
|
||||||
|
Wire Wire Line
|
||||||
|
8350 5050 8350 5250
|
||||||
|
Wire Wire Line
|
||||||
|
8350 5250 8500 5250
|
||||||
|
Connection ~ 9150 5250
|
||||||
|
Wire Wire Line
|
||||||
|
9150 5450 9150 5250
|
||||||
|
Connection ~ 9600 2000
|
||||||
|
Wire Wire Line
|
||||||
|
9600 2000 9600 3350
|
||||||
|
Wire Wire Line
|
||||||
|
10500 2000 10350 2000
|
||||||
|
Wire Wire Line
|
||||||
|
8400 1400 8400 1600
|
||||||
|
Wire Wire Line
|
||||||
|
8400 1600 8050 1600
|
||||||
|
Wire Wire Line
|
||||||
|
6800 4350 6300 4350
|
||||||
|
Wire Wire Line
|
||||||
|
6800 4250 6300 4250
|
||||||
|
Wire Wire Line
|
||||||
|
6800 4150 6300 4150
|
||||||
|
Wire Wire Line
|
||||||
|
6800 4050 6300 4050
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3950 6300 3950
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3850 6300 3850
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3750 6300 3750
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3650 6300 3650
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3550 6300 3550
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3450 6300 3450
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3350 6300 3350
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3250 6300 3250
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3150 6300 3150
|
||||||
|
Wire Wire Line
|
||||||
|
6800 3050 6300 3050
|
||||||
|
Wire Wire Line
|
||||||
|
6800 2950 6300 2950
|
||||||
|
Wire Wire Line
|
||||||
|
6800 2850 6300 2850
|
||||||
|
Wire Wire Line
|
||||||
|
6800 2750 6300 2750
|
||||||
|
Wire Wire Line
|
||||||
|
6800 2650 6300 2650
|
||||||
|
Wire Wire Line
|
||||||
|
6800 2550 6300 2550
|
||||||
|
Wire Wire Line
|
||||||
|
8500 3950 9000 3950
|
||||||
|
Wire Wire Line
|
||||||
|
4750 4750 4250 4750
|
||||||
|
Wire Wire Line
|
||||||
|
4250 4650 4750 4650
|
||||||
|
Wire Wire Line
|
||||||
|
4250 4350 4750 4350
|
||||||
|
Wire Wire Line
|
||||||
|
4250 4150 4750 4150
|
||||||
|
Wire Wire Line
|
||||||
|
4250 4050 4750 4050
|
||||||
|
Wire Wire Line
|
||||||
|
4250 3750 4750 3750
|
||||||
|
Wire Wire Line
|
||||||
|
4250 3650 4750 3650
|
||||||
|
Wire Wire Line
|
||||||
|
4250 3550 4750 3550
|
||||||
|
Wire Wire Line
|
||||||
|
4250 3450 4750 3450
|
||||||
|
Wire Wire Line
|
||||||
|
4250 3350 4750 3350
|
||||||
|
Wire Wire Line
|
||||||
|
4250 3250 4750 3250
|
||||||
|
Wire Wire Line
|
||||||
|
4250 3150 4750 3150
|
||||||
|
Wire Wire Line
|
||||||
|
4250 3050 4750 3050
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2850 4750 2850
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2750 4750 2750
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2650 4750 2650
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2550 4750 2550
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2450 4750 2450
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2350 4750 2350
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2250 4750 2250
|
||||||
|
Wire Wire Line
|
||||||
|
4250 2150 4750 2150
|
||||||
|
Wire Wire Line
|
||||||
|
3550 6800 3550 6700
|
||||||
|
Wire Wire Line
|
||||||
|
3400 5400 3400 5300
|
||||||
|
Wire Wire Line
|
||||||
|
3300 5150 3300 5300
|
||||||
|
Wire Wire Line
|
||||||
|
3300 1750 3300 1550
|
||||||
|
Connection ~ 7650 2000
|
||||||
|
Wire Wire Line
|
||||||
|
3500 1750 3500 1550
|
||||||
|
Wire Wire Line
|
||||||
|
3500 5150 3500 5300
|
||||||
|
Wire Wire Line
|
||||||
|
3500 5300 3300 5300
|
||||||
|
Connection ~ 3400 5300
|
||||||
|
Wire Wire Line
|
||||||
|
3550 7200 3550 7300
|
||||||
|
Wire Wire Line
|
||||||
|
3250 7200 3250 7300
|
||||||
|
Wire Wire Line
|
||||||
|
3250 6700 3250 6800
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2150 2050 2150
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2250 2050 2250
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2350 2050 2350
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2450 2050 2450
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2550 2050 2550
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2650 2050 2650
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2750 2050 2750
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2850 2050 2850
|
||||||
|
Wire Wire Line
|
||||||
|
2550 2950 2050 2950
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3050 2050 3050
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3150 2050 3150
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3250 2050 3250
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3350 2050 3350
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3450 2050 3450
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3550 2050 3550
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3650 2050 3650
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3750 2050 3750
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3850 2050 3850
|
||||||
|
Wire Wire Line
|
||||||
|
2550 3950 2050 3950
|
||||||
|
Wire Wire Line
|
||||||
|
2550 4050 2050 4050
|
||||||
|
Wire Wire Line
|
||||||
|
2550 4150 2050 4150
|
||||||
|
Wire Wire Line
|
||||||
|
2550 4250 2050 4250
|
||||||
|
Wire Wire Line
|
||||||
|
2550 4350 2050 4350
|
||||||
|
Wire Wire Line
|
||||||
|
2550 4650 2050 4650
|
||||||
|
Wire Wire Line
|
||||||
|
2550 4750 2050 4750
|
||||||
|
Wire Wire Line
|
||||||
|
2550 4550 2050 4550
|
||||||
|
Wire Wire Line
|
||||||
|
8500 4050 9000 4050
|
||||||
|
Connection ~ 4750 4750
|
||||||
|
Wire Wire Line
|
||||||
|
4750 4350 4750 5400
|
||||||
|
Connection ~ 4750 4650
|
||||||
|
Wire Wire Line
|
||||||
|
8500 2550 9000 2550
|
||||||
|
Wire Wire Line
|
||||||
|
8500 2650 9000 2650
|
||||||
|
Wire Wire Line
|
||||||
|
8500 2750 9000 2750
|
||||||
|
Wire Wire Line
|
||||||
|
8500 2850 9000 2850
|
||||||
|
Wire Wire Line
|
||||||
|
8500 2950 9000 2950
|
||||||
|
Wire Wire Line
|
||||||
|
8500 3050 9000 3050
|
||||||
|
Wire Wire Line
|
||||||
|
8500 3150 9000 3150
|
||||||
|
Wire Wire Line
|
||||||
|
8500 3250 9000 3250
|
||||||
|
Wire Wire Line
|
||||||
|
7250 1600 6900 1600
|
||||||
|
Wire Wire Line
|
||||||
|
6900 1600 6900 1400
|
||||||
|
Wire Wire Line
|
||||||
|
8500 3850 9600 3850
|
||||||
|
Wire Wire Line
|
||||||
|
9600 3850 9600 5050
|
||||||
|
Wire Wire Line
|
||||||
|
9000 5250 9300 5250
|
||||||
|
Wire Wire Line
|
||||||
|
9150 5950 9150 6050
|
||||||
|
Wire Wire Line
|
||||||
|
9150 6050 9600 6050
|
||||||
|
Wire Wire Line
|
||||||
|
9600 6350 9600 5450
|
||||||
|
Connection ~ 9600 6050
|
||||||
|
Wire Wire Line
|
||||||
|
7650 2150 7650 1800
|
||||||
|
Wire Wire Line
|
||||||
|
9950 2000 7650 2000
|
||||||
|
$Comp
|
||||||
|
L CY62148EV30-ZSXI U511
|
||||||
|
U 1 1 4D49598F
|
||||||
|
P 7650 3450
|
||||||
|
F 0 "U511" H 7650 3550 60 0000 C CNN
|
||||||
|
F 1 "CY62148EV30-ZSXI" H 7700 3450 60 0000 C CNN
|
||||||
|
1 7650 3450
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
Text Notes 7050 7000 0 250 ~ 50
|
||||||
|
Memory
|
||||||
|
Text Notes 7300 1300 0 50 ~ 0
|
||||||
|
SRAM battery power
|
||||||
|
Text Notes 9800 5300 0 50 ~ 0
|
||||||
|
Battery power OE switch
|
||||||
|
$Comp
|
||||||
|
L +3.3V #PWR031
|
||||||
|
U 1 1 4BF2FE97
|
||||||
|
P 8350 5050
|
||||||
|
F 0 "#PWR031" H 8350 5010 30 0001 C CNN
|
||||||
|
F 1 "+3.3V" H 8350 5160 30 0000 C CNN
|
||||||
|
1 8350 5050
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L GND #PWR032
|
||||||
|
U 1 1 4BF2FE7B
|
||||||
|
P 9600 6350
|
||||||
|
F 0 "#PWR032" H 9600 6350 30 0001 C CNN
|
||||||
|
F 1 "GND" H 9600 6280 30 0001 C CNN
|
||||||
|
1 9600 6350
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L R R511
|
||||||
|
U 1 1 4BF2FDAF
|
||||||
|
P 9600 3600
|
||||||
|
F 0 "R511" V 9680 3600 50 0000 C CNN
|
||||||
|
F 1 "20k" V 9600 3600 50 0000 C CNN
|
||||||
|
F 2 "SM0805_FIXEDMASK" H 9600 3600 60 0001 C CNN
|
||||||
|
1 9600 3600
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L R R513
|
||||||
|
U 1 1 4BF2FDAC
|
||||||
|
P 9150 5700
|
||||||
|
F 0 "R513" V 9230 5700 50 0000 C CNN
|
||||||
|
F 1 "100k" V 9150 5700 50 0000 C CNN
|
||||||
|
F 2 "SM0805_FIXEDMASK" H 9150 5700 60 0001 C CNN
|
||||||
|
1 9150 5700
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L R R512
|
||||||
|
U 1 1 4BF2FDA9
|
||||||
|
P 8750 5250
|
||||||
|
F 0 "R512" V 8830 5250 50 0000 C CNN
|
||||||
|
F 1 "4k7" V 8750 5250 50 0000 C CNN
|
||||||
|
F 2 "SM0805_FIXEDMASK" H 8750 5250 60 0001 C CNN
|
||||||
|
1 8750 5250
|
||||||
|
0 1 1 0
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L NPN Q511
|
||||||
|
U 1 1 4BF2FD9F
|
||||||
|
P 9500 5250
|
||||||
|
F 0 "Q511" H 9500 5100 50 0000 R CNN
|
||||||
|
F 1 "2N2222A" H 9500 5400 50 0000 R CNN
|
||||||
|
F 2 "SOT23EBC" H 9500 5250 60 0001 C CNN
|
||||||
|
1 9500 5250
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L GND #PWR033
|
||||||
|
U 1 1 4BF1A006
|
||||||
|
P 10500 2000
|
||||||
|
F 0 "#PWR033" H 10500 2000 30 0001 C CNN
|
||||||
|
F 1 "GND" H 10500 1930 30 0001 C CNN
|
||||||
|
1 10500 2000
|
||||||
|
0 -1 -1 0
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L +BATT #PWR034
|
||||||
|
U 1 1 4BF19EA4
|
||||||
|
P 8400 1400
|
||||||
|
F 0 "#PWR034" H 8400 1350 20 0001 C CNN
|
||||||
|
F 1 "+BATT" H 8400 1500 30 0000 C CNN
|
||||||
|
1 8400 1400
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L +3.3V #PWR035
|
||||||
|
U 1 1 4BF19E7A
|
||||||
|
P 6900 1400
|
||||||
|
F 0 "#PWR035" H 6900 1360 30 0001 C CNN
|
||||||
|
F 1 "+3.3V" H 6900 1510 30 0000 C CNN
|
||||||
|
1 6900 1400
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L DOUBLE_SCH_KCOM2 D511
|
||||||
|
U 1 1 4BF19DCA
|
||||||
|
P 7650 1600
|
||||||
|
F 0 "D511" H 7800 1475 60 0000 C CNN
|
||||||
|
F 1 "BAT54C" H 7650 1750 60 0000 C CNN
|
||||||
|
F 2 "SOT23EBC" H 7650 1600 60 0001 C CNN
|
||||||
|
1 7650 1600
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
Text Label 8600 4050 0 50 ~ 0
|
||||||
|
RAM_/WE
|
||||||
|
Text Label 8600 3950 0 50 ~ 0
|
||||||
|
RAM_/OE
|
||||||
|
Text Label 8600 3850 0 50 ~ 0
|
||||||
|
RAM_/CE
|
||||||
|
Text Label 8600 3250 0 50 ~ 0
|
||||||
|
RAM_DQ7
|
||||||
|
Text Label 8600 3150 0 50 ~ 0
|
||||||
|
RAM_DQ6
|
||||||
|
Text Label 8600 3050 0 50 ~ 0
|
||||||
|
RAM_DQ5
|
||||||
|
Text Label 8600 2950 0 50 ~ 0
|
||||||
|
RAM_DQ4
|
||||||
|
Text Label 8600 2850 0 50 ~ 0
|
||||||
|
RAM_DQ3
|
||||||
|
Text Label 8600 2750 0 50 ~ 0
|
||||||
|
RAM_DQ2
|
||||||
|
Text Label 8600 2650 0 50 ~ 0
|
||||||
|
RAM_DQ1
|
||||||
|
Text Label 8600 2550 0 50 ~ 0
|
||||||
|
RAM_DQ0
|
||||||
|
Text Label 6400 4350 0 50 ~ 0
|
||||||
|
RAM_A18
|
||||||
|
Text Label 6400 4250 0 50 ~ 0
|
||||||
|
RAM_A17
|
||||||
|
Text Label 6400 4150 0 50 ~ 0
|
||||||
|
RAM_A16
|
||||||
|
Text Label 6400 4050 0 50 ~ 0
|
||||||
|
RAM_A15
|
||||||
|
Text Label 6400 3950 0 50 ~ 0
|
||||||
|
RAM_A14
|
||||||
|
Text Label 6400 3850 0 50 ~ 0
|
||||||
|
RAM_A13
|
||||||
|
Text Label 6400 3750 0 50 ~ 0
|
||||||
|
RAM_A12
|
||||||
|
Text Label 6400 3650 0 50 ~ 0
|
||||||
|
RAM_A11
|
||||||
|
Text Label 6400 3550 0 50 ~ 0
|
||||||
|
RAM_A10
|
||||||
|
Text Label 6400 3450 0 50 ~ 0
|
||||||
|
RAM_A9
|
||||||
|
Text Label 6400 3350 0 50 ~ 0
|
||||||
|
RAM_A8
|
||||||
|
Text Label 6400 3250 0 50 ~ 0
|
||||||
|
RAM_A7
|
||||||
|
Text Label 6400 3150 0 50 ~ 0
|
||||||
|
RAM_A6
|
||||||
|
Text Label 6400 3050 0 50 ~ 0
|
||||||
|
RAM_A5
|
||||||
|
Text Label 6400 2950 0 50 ~ 0
|
||||||
|
RAM_A4
|
||||||
|
Text Label 6400 2850 0 50 ~ 0
|
||||||
|
RAM_A3
|
||||||
|
Text Label 6400 2750 0 50 ~ 0
|
||||||
|
RAM_A2
|
||||||
|
Text Label 6400 2650 0 50 ~ 0
|
||||||
|
RAM_A1
|
||||||
|
Text Label 6400 2550 0 50 ~ 0
|
||||||
|
RAM_A0
|
||||||
|
Text Label 4350 4150 0 50 ~ 0
|
||||||
|
ROM_/UB
|
||||||
|
Text Label 4350 4050 0 50 ~ 0
|
||||||
|
ROM_/LB
|
||||||
|
Text Label 4350 3750 0 50 ~ 0
|
||||||
|
ROM_DQ15
|
||||||
|
Text Label 4350 3650 0 50 ~ 0
|
||||||
|
ROM_DQ14
|
||||||
|
Text Label 4350 3550 0 50 ~ 0
|
||||||
|
ROM_DQ13
|
||||||
|
Text Label 4350 3450 0 50 ~ 0
|
||||||
|
ROM_DQ12
|
||||||
|
Text Label 4350 3350 0 50 ~ 0
|
||||||
|
ROM_DQ11
|
||||||
|
Text Label 4350 3250 0 50 ~ 0
|
||||||
|
ROM_DQ10
|
||||||
|
Text Label 4350 3150 0 50 ~ 0
|
||||||
|
ROM_DQ9
|
||||||
|
Text Label 4350 3050 0 50 ~ 0
|
||||||
|
ROM_DQ8
|
||||||
|
Text Label 4350 2850 0 50 ~ 0
|
||||||
|
ROM_DQ7
|
||||||
|
Text Label 4350 2750 0 50 ~ 0
|
||||||
|
ROM_DQ6
|
||||||
|
Text Label 4350 2650 0 50 ~ 0
|
||||||
|
ROM_DQ5
|
||||||
|
Text Label 4350 2550 0 50 ~ 0
|
||||||
|
ROM_DQ4
|
||||||
|
Text Label 4350 2450 0 50 ~ 0
|
||||||
|
ROM_DQ3
|
||||||
|
Text Label 4350 2350 0 50 ~ 0
|
||||||
|
ROM_DQ2
|
||||||
|
Text Label 4350 2250 0 50 ~ 0
|
||||||
|
ROM_DQ1
|
||||||
|
Text Label 4350 2150 0 50 ~ 0
|
||||||
|
ROM_DQ0
|
||||||
|
Text Label 2100 4750 0 50 ~ 0
|
||||||
|
ROM_/WE
|
||||||
|
Text Label 2100 4650 0 50 ~ 0
|
||||||
|
ROM_/OE
|
||||||
|
Text Label 2100 4550 0 50 ~ 0
|
||||||
|
ROM_/CE
|
||||||
|
Text Label 2100 4350 0 50 ~ 0
|
||||||
|
ROM_A22
|
||||||
|
Text Label 2100 4250 0 50 ~ 0
|
||||||
|
ROM_A21
|
||||||
|
Text Label 2100 4150 0 50 ~ 0
|
||||||
|
ROM_A20
|
||||||
|
Text Label 2100 4050 0 50 ~ 0
|
||||||
|
ROM_A19
|
||||||
|
Text Label 2100 3950 0 50 ~ 0
|
||||||
|
ROM_A18
|
||||||
|
Text Label 2100 3850 0 50 ~ 0
|
||||||
|
ROM_A17
|
||||||
|
Text Label 2100 3750 0 50 ~ 0
|
||||||
|
ROM_A16
|
||||||
|
Text Label 2100 3650 0 50 ~ 0
|
||||||
|
ROM_A15
|
||||||
|
Text Label 2100 3550 0 50 ~ 0
|
||||||
|
ROM_A14
|
||||||
|
Text Label 2100 3450 0 50 ~ 0
|
||||||
|
ROM_A13
|
||||||
|
Text Label 2100 3350 0 50 ~ 0
|
||||||
|
ROM_A12
|
||||||
|
Text Label 2100 3250 0 50 ~ 0
|
||||||
|
ROM_A11
|
||||||
|
Text Label 2100 3150 0 50 ~ 0
|
||||||
|
ROM_A10
|
||||||
|
Text Label 2100 3050 0 50 ~ 0
|
||||||
|
ROM_A9
|
||||||
|
Text Label 2100 2950 0 50 ~ 0
|
||||||
|
ROM_A8
|
||||||
|
Text Label 2100 2850 0 50 ~ 0
|
||||||
|
ROM_A7
|
||||||
|
Text Label 2100 2750 0 50 ~ 0
|
||||||
|
ROM_A6
|
||||||
|
Text Label 2100 2650 0 50 ~ 0
|
||||||
|
ROM_A5
|
||||||
|
Text Label 2100 2550 0 50 ~ 0
|
||||||
|
ROM_A4
|
||||||
|
Text Label 2100 2450 0 50 ~ 0
|
||||||
|
ROM_A3
|
||||||
|
Text Label 2100 2350 0 50 ~ 0
|
||||||
|
ROM_A2
|
||||||
|
Text Label 2100 2250 0 50 ~ 0
|
||||||
|
ROM_A1
|
||||||
|
Text Label 2100 2150 0 50 ~ 0
|
||||||
|
ROM_A0
|
||||||
|
Text GLabel 2050 4550 0 50 Input ~ 0
|
||||||
|
ROM_/CE
|
||||||
|
Text GLabel 9000 4050 2 50 Input ~ 0
|
||||||
|
RAM_/WE
|
||||||
|
Text GLabel 9000 3950 2 50 Input ~ 0
|
||||||
|
RAM_/OE
|
||||||
|
Text GLabel 9000 3250 2 50 BiDi ~ 0
|
||||||
|
RAM_DQ7
|
||||||
|
Text GLabel 9000 3150 2 50 BiDi ~ 0
|
||||||
|
RAM_DQ6
|
||||||
|
Text GLabel 9000 3050 2 50 BiDi ~ 0
|
||||||
|
RAM_DQ5
|
||||||
|
Text GLabel 9000 2950 2 50 BiDi ~ 0
|
||||||
|
RAM_DQ4
|
||||||
|
Text GLabel 9000 2850 2 50 BiDi ~ 0
|
||||||
|
RAM_DQ3
|
||||||
|
Text GLabel 9000 2750 2 50 BiDi ~ 0
|
||||||
|
RAM_DQ2
|
||||||
|
Text GLabel 9000 2650 2 50 BiDi ~ 0
|
||||||
|
RAM_DQ1
|
||||||
|
Text GLabel 9000 2550 2 50 BiDi ~ 0
|
||||||
|
RAM_DQ0
|
||||||
|
Text GLabel 6300 4350 0 50 Input ~ 0
|
||||||
|
RAM_A18
|
||||||
|
Text GLabel 6300 4250 0 50 Input ~ 0
|
||||||
|
RAM_A17
|
||||||
|
Text GLabel 6300 4150 0 50 Input ~ 0
|
||||||
|
RAM_A16
|
||||||
|
Text GLabel 6300 4050 0 50 Input ~ 0
|
||||||
|
RAM_A15
|
||||||
|
Text GLabel 6300 3950 0 50 Input ~ 0
|
||||||
|
RAM_A14
|
||||||
|
Text GLabel 6300 3850 0 50 Input ~ 0
|
||||||
|
RAM_A13
|
||||||
|
Text GLabel 6300 3750 0 50 Input ~ 0
|
||||||
|
RAM_A12
|
||||||
|
Text GLabel 6300 3650 0 50 Input ~ 0
|
||||||
|
RAM_A11
|
||||||
|
Text GLabel 6300 3550 0 50 Input ~ 0
|
||||||
|
RAM_A10
|
||||||
|
Text GLabel 6300 3450 0 50 Input ~ 0
|
||||||
|
RAM_A9
|
||||||
|
Text GLabel 6300 3350 0 50 Input ~ 0
|
||||||
|
RAM_A8
|
||||||
|
Text GLabel 6300 3250 0 50 Input ~ 0
|
||||||
|
RAM_A7
|
||||||
|
Text GLabel 6300 3150 0 50 Input ~ 0
|
||||||
|
RAM_A6
|
||||||
|
Text GLabel 6300 3050 0 50 Input ~ 0
|
||||||
|
RAM_A5
|
||||||
|
Text GLabel 6300 2950 0 50 Input ~ 0
|
||||||
|
RAM_A4
|
||||||
|
Text GLabel 6300 2850 0 50 Input ~ 0
|
||||||
|
RAM_A3
|
||||||
|
Text GLabel 6300 2750 0 50 Input ~ 0
|
||||||
|
RAM_A2
|
||||||
|
Text GLabel 6300 2650 0 50 Input ~ 0
|
||||||
|
RAM_A1
|
||||||
|
Text GLabel 6300 2550 0 50 Input ~ 0
|
||||||
|
RAM_A0
|
||||||
|
Text GLabel 4750 4150 2 50 Input ~ 0
|
||||||
|
ROM_/UB
|
||||||
|
Text GLabel 4750 4050 2 50 Input ~ 0
|
||||||
|
ROM_/LB
|
||||||
|
Text GLabel 4750 3750 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ15
|
||||||
|
Text GLabel 4750 3650 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ14
|
||||||
|
Text GLabel 4750 3550 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ13
|
||||||
|
Text GLabel 4750 3450 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ12
|
||||||
|
Text GLabel 4750 3350 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ11
|
||||||
|
Text GLabel 4750 3250 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ10
|
||||||
|
Text GLabel 4750 3150 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ9
|
||||||
|
Text GLabel 4750 3050 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ8
|
||||||
|
Text GLabel 4750 2850 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ7
|
||||||
|
Text GLabel 4750 2750 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ6
|
||||||
|
Text GLabel 4750 2650 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ5
|
||||||
|
Text GLabel 4750 2550 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ4
|
||||||
|
Text GLabel 4750 2450 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ3
|
||||||
|
Text GLabel 4750 2350 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ2
|
||||||
|
Text GLabel 4750 2250 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ1
|
||||||
|
Text GLabel 4750 2150 2 50 BiDi ~ 0
|
||||||
|
ROM_DQ0
|
||||||
|
Text GLabel 2050 4350 0 50 Input ~ 0
|
||||||
|
ROM_A22
|
||||||
|
Text GLabel 2050 4250 0 50 Input ~ 0
|
||||||
|
ROM_A21
|
||||||
|
Text GLabel 2050 4150 0 50 Input ~ 0
|
||||||
|
ROM_A20
|
||||||
|
Text GLabel 2050 4050 0 50 Input ~ 0
|
||||||
|
ROM_A19
|
||||||
|
Text GLabel 2050 3950 0 50 Input ~ 0
|
||||||
|
ROM_A18
|
||||||
|
Text GLabel 2050 3850 0 50 Input ~ 0
|
||||||
|
ROM_A17
|
||||||
|
Text GLabel 2050 3750 0 50 Input ~ 0
|
||||||
|
ROM_A16
|
||||||
|
Text GLabel 2050 3650 0 50 Input ~ 0
|
||||||
|
ROM_A15
|
||||||
|
Text GLabel 2050 3550 0 50 Input ~ 0
|
||||||
|
ROM_A14
|
||||||
|
Text GLabel 2050 3450 0 50 Input ~ 0
|
||||||
|
ROM_A13
|
||||||
|
Text GLabel 2050 3350 0 50 Input ~ 0
|
||||||
|
ROM_A12
|
||||||
|
Text GLabel 2050 3250 0 50 Input ~ 0
|
||||||
|
ROM_A11
|
||||||
|
Text GLabel 2050 3150 0 50 Input ~ 0
|
||||||
|
ROM_A10
|
||||||
|
Text GLabel 2050 3050 0 50 Input ~ 0
|
||||||
|
ROM_A9
|
||||||
|
Text GLabel 2050 2950 0 50 Input ~ 0
|
||||||
|
ROM_A8
|
||||||
|
Text GLabel 2050 2850 0 50 Input ~ 0
|
||||||
|
ROM_A7
|
||||||
|
Text GLabel 2050 2750 0 50 Input ~ 0
|
||||||
|
ROM_A6
|
||||||
|
Text GLabel 2050 2650 0 50 Input ~ 0
|
||||||
|
ROM_A5
|
||||||
|
Text GLabel 2050 2550 0 50 Input ~ 0
|
||||||
|
ROM_A4
|
||||||
|
Text GLabel 2050 2450 0 50 Input ~ 0
|
||||||
|
ROM_A3
|
||||||
|
Text GLabel 2050 2350 0 50 Input ~ 0
|
||||||
|
ROM_A2
|
||||||
|
Text GLabel 2050 2250 0 50 Input ~ 0
|
||||||
|
ROM_A1
|
||||||
|
Text GLabel 2050 2150 0 50 Input ~ 0
|
||||||
|
ROM_A0
|
||||||
|
NoConn ~ 4250 4550
|
||||||
|
$Comp
|
||||||
|
L GND #PWR036
|
||||||
|
U 1 1 4BCA30BF
|
||||||
|
P 4750 5400
|
||||||
|
F 0 "#PWR036" H 4750 5400 30 0001 C CNN
|
||||||
|
F 1 "GND" H 4750 5330 30 0001 C CNN
|
||||||
|
1 4750 5400
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
Text GLabel 2050 4750 0 50 Input ~ 0
|
||||||
|
ROM_/WE
|
||||||
|
Text GLabel 2050 4650 0 50 Input ~ 0
|
||||||
|
ROM_/OE
|
||||||
|
$Comp
|
||||||
|
L C C502
|
||||||
|
U 1 1 4BAD3D55
|
||||||
|
P 3550 7000
|
||||||
|
F 0 "C502" H 3600 7100 50 0000 L CNN
|
||||||
|
F 1 "100n" H 3600 6900 50 0000 L CNN
|
||||||
|
F 2 "SM0805_FIXEDMASK" H 3550 7000 60 0001 C CNN
|
||||||
|
1 3550 7000
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L C C511
|
||||||
|
U 1 1 4BAD3D53
|
||||||
|
P 10150 2000
|
||||||
|
F 0 "C511" H 10200 2100 50 0000 L CNN
|
||||||
|
F 1 "100n" H 10200 1900 50 0000 L CNN
|
||||||
|
F 2 "SM0805_FIXEDMASK" H 10150 2000 60 0001 C CNN
|
||||||
|
1 10150 2000
|
||||||
|
0 -1 1 0
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L C C501
|
||||||
|
U 1 1 4BAD3D47
|
||||||
|
P 3250 7000
|
||||||
|
F 0 "C501" H 3300 7100 50 0000 L CNN
|
||||||
|
F 1 "100n" H 3300 6900 50 0000 L CNN
|
||||||
|
F 2 "SM0805_FIXEDMASK" H 3250 7000 60 0001 C CNN
|
||||||
|
1 3250 7000
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L GND #PWR037
|
||||||
|
U 1 1 4BAD3D2B
|
||||||
|
P 3550 7300
|
||||||
|
F 0 "#PWR037" H 3550 7300 30 0001 C CNN
|
||||||
|
F 1 "GND" H 3550 7230 30 0001 C CNN
|
||||||
|
1 3550 7300
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L +1.8V #PWR038
|
||||||
|
U 1 1 4BAD3D27
|
||||||
|
P 3550 6700
|
||||||
|
F 0 "#PWR038" H 3550 6840 20 0001 C CNN
|
||||||
|
F 1 "+1.8V" H 3550 6810 30 0000 C CNN
|
||||||
|
1 3550 6700
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L GND #PWR039
|
||||||
|
U 1 1 4BAD3D20
|
||||||
|
P 3250 7300
|
||||||
|
F 0 "#PWR039" H 3250 7300 30 0001 C CNN
|
||||||
|
F 1 "GND" H 3250 7230 30 0001 C CNN
|
||||||
|
1 3250 7300
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L +3.3V #PWR040
|
||||||
|
U 1 1 4BAD3D0B
|
||||||
|
P 3250 6700
|
||||||
|
F 0 "#PWR040" H 3250 6660 30 0001 C CNN
|
||||||
|
F 1 "+3.3V" H 3250 6810 30 0000 C CNN
|
||||||
|
1 3250 6700
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L GND #PWR041
|
||||||
|
U 1 1 4BAD33A7
|
||||||
|
P 3400 5400
|
||||||
|
F 0 "#PWR041" H 3400 5400 30 0001 C CNN
|
||||||
|
F 1 "GND" H 3400 5330 30 0001 C CNN
|
||||||
|
1 3400 5400
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L GND #PWR042
|
||||||
|
U 1 1 4BAD339F
|
||||||
|
P 7650 5000
|
||||||
|
F 0 "#PWR042" H 7650 5000 30 0001 C CNN
|
||||||
|
F 1 "GND" H 7650 4930 30 0001 C CNN
|
||||||
|
1 7650 5000
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L +1.8V #PWR043
|
||||||
|
U 1 1 4BAD32D2
|
||||||
|
P 3300 1550
|
||||||
|
F 0 "#PWR043" H 3300 1690 20 0001 C CNN
|
||||||
|
F 1 "+1.8V" H 3300 1660 30 0000 C CNN
|
||||||
|
1 3300 1550
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$Comp
|
||||||
|
L +3.3V #PWR044
|
||||||
|
U 1 1 4BAD32BE
|
||||||
|
P 3500 1550
|
||||||
|
F 0 "#PWR044" H 3500 1510 30 0001 C CNN
|
||||||
|
F 1 "+3.3V" H 3500 1660 30 0000 C CNN
|
||||||
|
1 3500 1550
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
Text Notes 6300 5700 0 60 ~ 0
|
||||||
|
4Mbits 45ns SRAM (battery RAM + custom chip work RAM)
|
||||||
|
Text Notes 2650 5700 0 60 ~ 0
|
||||||
|
128Mbits 70ns PSRAM (ROM area)
|
||||||
|
$Comp
|
||||||
|
L MT45W8MW16 U501
|
||||||
|
U 1 1 4B868602
|
||||||
|
P 3400 3450
|
||||||
|
F 0 "U501" H 3400 3550 60 0000 C CNN
|
||||||
|
F 1 "MT45W8MW16" H 3400 3450 60 0000 C CNN
|
||||||
|
F 2 "VFBGA54" H 3400 3450 60 0001 C CNN
|
||||||
|
1 3400 3450
|
||||||
|
1 0 0 -1
|
||||||
|
$EndComp
|
||||||
|
$EndSCHEMATC
|
||||||
17
pcb/kicad/RevE2/padreduce.sh
Executable file
17
pcb/kicad/RevE2/padreduce.sh
Executable file
@@ -0,0 +1,17 @@
|
|||||||
|
cp "$1" "$1".bak
|
||||||
|
|
||||||
|
sed -e 's/^%ADD\(..\)R/%ADD\1O/g' < "$1" > "$1".tmp1
|
||||||
|
|
||||||
|
grep ^%ADD..O "$1".tmp1 | while read ln; do LS=${ln:0:8}; X=${ln:8:8}; Y=${ln:17:8}; X2=`echo $X-.001 | bc -l`; Y2=`echo $Y-.001 | bc -l`; echo $LS`printf '%01.6f' $X2`X`printf '%01.6f' $Y2`*%; done > "$1".tmp2
|
||||||
|
|
||||||
|
grep ^%ADD..C "$1".tmp1 | while read ln; do LS=${ln:0:8}; X=${ln:8:8}; X2=`echo $X-.001 | bc -l`; echo $LS`printf '%01.6f' $X2`*%; done >> "$1".tmp2
|
||||||
|
|
||||||
|
while read ln; do echo "$ln" | grep '^%ADD' >/dev/null && break; echo "$ln"; done < "$1".tmp1 > "$1"
|
||||||
|
|
||||||
|
cat "$1".tmp2 >> "$1"
|
||||||
|
|
||||||
|
grep -A100000 'G04 APERTURE END LIST\*' "$1".tmp1 >> "$1"
|
||||||
|
|
||||||
|
rm "$1".tmp1 "$1".tmp2
|
||||||
|
|
||||||
|
|
||||||
1197
pcb/kicad/RevE2/pwr_misc.sch
Normal file
1197
pcb/kicad/RevE2/pwr_misc.sch
Normal file
File diff suppressed because it is too large
Load Diff
BIN
pcb/kicad/RevE2/sd2snes-bom.ods
Normal file
BIN
pcb/kicad/RevE2/sd2snes-bom.ods
Normal file
Binary file not shown.
35737
pcb/kicad/RevE2/sd2snes.brd
Normal file
35737
pcb/kicad/RevE2/sd2snes.brd
Normal file
File diff suppressed because it is too large
Load Diff
1067
pcb/kicad/RevE2/sd2snes.cmp
Normal file
1067
pcb/kicad/RevE2/sd2snes.cmp
Normal file
File diff suppressed because it is too large
Load Diff
1901
pcb/kicad/RevE2/sd2snes.net
Normal file
1901
pcb/kicad/RevE2/sd2snes.net
Normal file
File diff suppressed because it is too large
Load Diff
117
pcb/kicad/RevE2/sd2snes.pro
Normal file
117
pcb/kicad/RevE2/sd2snes.pro
Normal file
@@ -0,0 +1,117 @@
|
|||||||
|
update=Sat 25 Feb 2012 11:51:50 PM CET
|
||||||
|
version=1
|
||||||
|
last_client=pcbnew
|
||||||
|
[general]
|
||||||
|
version=1
|
||||||
|
[cvpcb]
|
||||||
|
version=1
|
||||||
|
NetIExt=net
|
||||||
|
[cvpcb/libraries]
|
||||||
|
EquName1=devcms
|
||||||
|
[eeschema]
|
||||||
|
version=1
|
||||||
|
LibDir=../../kicad
|
||||||
|
NetFmt=1
|
||||||
|
HPGLSpd=20
|
||||||
|
HPGLDm=15
|
||||||
|
HPGLNum=1
|
||||||
|
offX_A4=0
|
||||||
|
offY_A4=0
|
||||||
|
offX_A3=0
|
||||||
|
offY_A3=0
|
||||||
|
offX_A2=0
|
||||||
|
offY_A2=0
|
||||||
|
offX_A1=0
|
||||||
|
offY_A1=0
|
||||||
|
offX_A0=0
|
||||||
|
offY_A0=0
|
||||||
|
offX_A=0
|
||||||
|
offY_A=0
|
||||||
|
offX_B=0
|
||||||
|
offY_B=0
|
||||||
|
offX_C=0
|
||||||
|
offY_C=0
|
||||||
|
offX_D=0
|
||||||
|
offY_D=0
|
||||||
|
offX_E=0
|
||||||
|
offY_E=0
|
||||||
|
RptD_X=0
|
||||||
|
RptD_Y=100
|
||||||
|
RptLab=1
|
||||||
|
LabSize=50
|
||||||
|
[eeschema/libraries]
|
||||||
|
LibName1=power
|
||||||
|
LibName2=device
|
||||||
|
LibName3=transistors
|
||||||
|
LibName4=conn
|
||||||
|
LibName5=linear
|
||||||
|
LibName6=regul
|
||||||
|
LibName7=74xx
|
||||||
|
LibName8=cmos4000
|
||||||
|
LibName9=adc-dac
|
||||||
|
LibName10=memory
|
||||||
|
LibName11=xilinx
|
||||||
|
LibName12=special
|
||||||
|
LibName13=microcontrollers
|
||||||
|
LibName14=dsp
|
||||||
|
LibName15=microchip
|
||||||
|
LibName16=analog_switches
|
||||||
|
LibName17=motorola
|
||||||
|
LibName18=texas
|
||||||
|
LibName19=intel
|
||||||
|
LibName20=audio
|
||||||
|
LibName21=interface
|
||||||
|
LibName22=digital-audio
|
||||||
|
LibName23=philips
|
||||||
|
LibName24=display
|
||||||
|
LibName25=cypress
|
||||||
|
LibName26=siliconi
|
||||||
|
LibName27=opto
|
||||||
|
LibName28=atmel
|
||||||
|
LibName29=contrib
|
||||||
|
LibName30=valves
|
||||||
|
LibName31=libs/snescart
|
||||||
|
LibName32=libs/misc-74
|
||||||
|
LibName33=libs/vreg
|
||||||
|
LibName34=libs/lpc1754
|
||||||
|
LibName35=libs/sd_card
|
||||||
|
LibName36=libs/cy62148ev30
|
||||||
|
LibName37=libs/mt45w8mw16
|
||||||
|
LibName38=libs/cs4344
|
||||||
|
LibName39=libs/double_sch_kcom
|
||||||
|
LibName40=libs/usb_minib
|
||||||
|
LibName41=libs/mic23250
|
||||||
|
[pcbnew]
|
||||||
|
version=1
|
||||||
|
PadDrlX=0
|
||||||
|
PadDimH=197
|
||||||
|
PadDimV=276
|
||||||
|
BoardThickness=630
|
||||||
|
TxtPcbV=800
|
||||||
|
TxtPcbH=600
|
||||||
|
TxtModV=600
|
||||||
|
TxtModH=600
|
||||||
|
TxtModW=120
|
||||||
|
VEgarde=40
|
||||||
|
DrawLar=70
|
||||||
|
EdgeLar=40
|
||||||
|
TxtLar=120
|
||||||
|
MSegLar=79
|
||||||
|
LastNetListRead=sd2snes.net
|
||||||
|
[pcbnew/libraries]
|
||||||
|
LibDir=../../kicad
|
||||||
|
LibName1=sockets
|
||||||
|
LibName2=connect
|
||||||
|
LibName3=discret
|
||||||
|
LibName4=pin_array
|
||||||
|
LibName5=divers
|
||||||
|
LibName6=libcms
|
||||||
|
LibName7=display
|
||||||
|
LibName8=valves
|
||||||
|
LibName9=led
|
||||||
|
LibName10=dip_sockets
|
||||||
|
LibName11=libs/mypackages
|
||||||
|
LibName12=libs/snescart
|
||||||
|
LibName13=libs/sdcard
|
||||||
|
LibName14=libs/snail
|
||||||
|
LibName15=libs/snail2
|
||||||
94
pcb/kicad/RevE2/sd2snes.sch
Normal file
94
pcb/kicad/RevE2/sd2snes.sch
Normal file
@@ -0,0 +1,94 @@
|
|||||||
|
EESchema Schematic File Version 2 date Mon 02 Jan 2012 11:27:18 PM CET
|
||||||
|
LIBS:power
|
||||||
|
LIBS:device
|
||||||
|
LIBS:transistors
|
||||||
|
LIBS:conn
|
||||||
|
LIBS:linear
|
||||||
|
LIBS:regul
|
||||||
|
LIBS:74xx
|
||||||
|
LIBS:cmos4000
|
||||||
|
LIBS:adc-dac
|
||||||
|
LIBS:memory
|
||||||
|
LIBS:xilinx
|
||||||
|
LIBS:special
|
||||||
|
LIBS:microcontrollers
|
||||||
|
LIBS:dsp
|
||||||
|
LIBS:microchip
|
||||||
|
LIBS:analog_switches
|
||||||
|
LIBS:motorola
|
||||||
|
LIBS:texas
|
||||||
|
LIBS:intel
|
||||||
|
LIBS:audio
|
||||||
|
LIBS:interface
|
||||||
|
LIBS:digital-audio
|
||||||
|
LIBS:philips
|
||||||
|
LIBS:display
|
||||||
|
LIBS:cypress
|
||||||
|
LIBS:siliconi
|
||||||
|
LIBS:opto
|
||||||
|
LIBS:atmel
|
||||||
|
LIBS:contrib
|
||||||
|
LIBS:valves
|
||||||
|
LIBS:snescart
|
||||||
|
LIBS:misc-74
|
||||||
|
LIBS:vreg
|
||||||
|
LIBS:lpc1754
|
||||||
|
LIBS:sd_card
|
||||||
|
LIBS:cy62148ev30
|
||||||
|
LIBS:mt45w8mw16
|
||||||
|
LIBS:cs4344
|
||||||
|
LIBS:double_sch_kcom
|
||||||
|
LIBS:usb_minib
|
||||||
|
LIBS:mic23250
|
||||||
|
LIBS:sd2snes-cache
|
||||||
|
EELAYER 25 0
|
||||||
|
EELAYER END
|
||||||
|
$Descr A4 11700 8267
|
||||||
|
encoding utf-8
|
||||||
|
Sheet 1 6
|
||||||
|
Title "sd2snes Mark II"
|
||||||
|
Date "2 jan 2012"
|
||||||
|
Rev "E2"
|
||||||
|
Comp "Maximilian Rehkopf"
|
||||||
|
Comment1 ""
|
||||||
|
Comment2 ""
|
||||||
|
Comment3 ""
|
||||||
|
Comment4 ""
|
||||||
|
$EndDescr
|
||||||
|
Wire Notes Line
|
||||||
|
3650 4200 6150 4200
|
||||||
|
Text Notes 3300 3250 0 100 ~ 0
|
||||||
|
Changes from Rev.A / TODO:\n [x] remove FPGA from JTAG chain\n [x] remove SNES IRQ_DIR+IRQ, replace with IRQ_OE. IRQ is unidirectional cart -> console\n (replace 1gate w/ transistor)\n [x] disconnect P2.10 from FPGA, using a different GPIO for IRQ / INIT_B\n [x] add pullup to P2.10\n [ ] add JTAG pullups\n [x] add series resistor for CPU_CLK\n [x] add a jumper in PIC MCLR line to MCU\n [x] change PIC to DIP8 type for easier preprogramming\n [x] change "P1" to "P401" in pin description in silk screen\n [x] filter CIC data lines\n [x] rearrange SD card interface/LEDs on MCU\n [x] RAs for SNES signals?\n [x] reroute/add decoupling capacitors\n [x] filter SNES control signals (RD, WR, PARD, PAWR, CPU_CLK, IRQ)\n [x] replace 4Mbit SRAM with much cheaper TSOP-II type\n [x] add inverse polarity protection\n [x] separate GND plane for DAC\n [ ] separate JTAG pads for FPGA\n [x] add USE_BATT jumper\n [x] move PROG_B to P1.15
|
||||||
|
$Sheet
|
||||||
|
S 1250 1250 1700 1250
|
||||||
|
U 4B6E16F2
|
||||||
|
F0 "SNES Slot" 60
|
||||||
|
F1 "snesslot.sch" 60
|
||||||
|
$EndSheet
|
||||||
|
Text Notes 750 7700 0 500 ~ 100
|
||||||
|
sd2snes Mark II
|
||||||
|
$Sheet
|
||||||
|
S 1250 3300 1600 1150
|
||||||
|
U 4BAA6ABD
|
||||||
|
F0 "Memory" 60
|
||||||
|
F1 "memory.sch" 60
|
||||||
|
$EndSheet
|
||||||
|
$Sheet
|
||||||
|
S 8050 1250 1600 1250
|
||||||
|
U 4B6ED75B
|
||||||
|
F0 "MCU" 60
|
||||||
|
F1 "mcu.sch" 60
|
||||||
|
$EndSheet
|
||||||
|
$Sheet
|
||||||
|
S 5900 1250 1600 1250
|
||||||
|
U 4B6EC9C3
|
||||||
|
F0 "Power Supply / Misc." 60
|
||||||
|
F1 "pwr_misc.sch" 60
|
||||||
|
$EndSheet
|
||||||
|
$Sheet
|
||||||
|
S 3650 1250 1650 1250
|
||||||
|
U 4B6E18FC
|
||||||
|
F0 "FPGA" 60
|
||||||
|
F1 "fpga.sch" 60
|
||||||
|
$EndSheet
|
||||||
|
$EndSCHEMATC
|
||||||
2059
pcb/kicad/RevE2/snesslot.sch
Normal file
2059
pcb/kicad/RevE2/snesslot.sch
Normal file
File diff suppressed because it is too large
Load Diff
@@ -1,17 +1,21 @@
|
|||||||
PCBNEW-LibModule-V1 Wed 14 Sep 2011 12:39:55 AM CEST
|
PCBNEW-LibModule-V1 Sun 26 Feb 2012 12:35:43 AM CET
|
||||||
# encoding utf-8
|
# encoding utf-8
|
||||||
$INDEX
|
$INDEX
|
||||||
BT_KEYSTONE_1059_20MM
|
BT_KEYSTONE_1059_20MM
|
||||||
CP_TANTAL_SMD_D
|
CP_TANTAL_SMD_D
|
||||||
DIP-36
|
DIP-36
|
||||||
HC49US
|
HC49US
|
||||||
|
HRS-DM1AA
|
||||||
LED-3MM-FIXED
|
LED-3MM-FIXED
|
||||||
LQFP80-.5
|
LQFP80-.5
|
||||||
|
L_4.2X4.2
|
||||||
PAD_1x1mm
|
PAD_1x1mm
|
||||||
PQFP208_ALTPADS
|
PQFP208_ALTPADS
|
||||||
QFN10-2x2
|
QFN10-2x2
|
||||||
QFN10-2x2_LONGPADS
|
QFN10-2x2_LONGPADS
|
||||||
R_PACK_0804
|
R_PACK_0804
|
||||||
|
R_PACK_0804_LONGPADS
|
||||||
|
R_PACK_1206
|
||||||
SM0805_FIXEDMASK
|
SM0805_FIXEDMASK
|
||||||
SM1210L
|
SM1210L
|
||||||
SM1210L_NEW
|
SM1210L_NEW
|
||||||
@@ -23,8 +27,11 @@ TSOP40
|
|||||||
TSOPII-32
|
TSOPII-32
|
||||||
TSOPII-44
|
TSOPII-44
|
||||||
TSSOP10
|
TSSOP10
|
||||||
|
TSSOP10_LONGPADS
|
||||||
TSSOP48
|
TSSOP48
|
||||||
|
TSSOP48_LONGPADS
|
||||||
USB-MINIB-THT
|
USB-MINIB-THT
|
||||||
|
USB_MINIB_SMT
|
||||||
VFBGA36
|
VFBGA36
|
||||||
VFBGA48
|
VFBGA48
|
||||||
VFBGA54
|
VFBGA54
|
||||||
@@ -4107,41 +4114,6 @@ Of 0.000000 0.000000 0.000000
|
|||||||
Ro 0.000000 0.000000 0.000000
|
Ro 0.000000 0.000000 0.000000
|
||||||
$EndSHAPE3D
|
$EndSHAPE3D
|
||||||
$EndMODULE SM1210L_NEW
|
$EndMODULE SM1210L_NEW
|
||||||
$MODULE LED-3MM-FIXED
|
|
||||||
Po 0 0 0 15 4D251EA9 00000000 ~~
|
|
||||||
Li LED-3MM-FIXED
|
|
||||||
Cd LED 3mm - Lead pitch 100mil (2,54mm)
|
|
||||||
Kw LED led 3mm 3MM 100mil 2,54mm
|
|
||||||
Sc 00000000
|
|
||||||
AR /4B6ED75B/4C0DA78D
|
|
||||||
Op 0 0 0
|
|
||||||
At VIRTUAL
|
|
||||||
T0 -300 -2125 320 320 0 70 N V 21 N"D403"
|
|
||||||
T1 25 3575 320 320 2700 70 N V 21 N"LED_2mA_1.7V,_red"
|
|
||||||
DS 669 669 669 394 80 21
|
|
||||||
DS 669 -669 669 -394 80 21
|
|
||||||
DA 0 0 669 669 2700 80 21
|
|
||||||
$PAD
|
|
||||||
Sh "1" C 660 660 0 0 0
|
|
||||||
Dr 400 0 0
|
|
||||||
At STD N 00E8FFFF
|
|
||||||
Ne 1 "+3.3V"
|
|
||||||
Po -500 0
|
|
||||||
$EndPAD
|
|
||||||
$PAD
|
|
||||||
Sh "2" C 660 660 0 0 0
|
|
||||||
Dr 400 0 0
|
|
||||||
At STD N 00E8FFFF
|
|
||||||
Ne 2 "N-000262"
|
|
||||||
Po 500 0
|
|
||||||
$EndPAD
|
|
||||||
$SHAPE3D
|
|
||||||
Na "libs/led3_vertical_red.wrl"
|
|
||||||
Sc 1.000000 1.000000 1.000000
|
|
||||||
Of 0.000000 0.000000 0.000000
|
|
||||||
Ro 0.000000 0.000000 0.000000
|
|
||||||
$EndSHAPE3D
|
|
||||||
$EndMODULE LED-3MM-FIXED
|
|
||||||
$MODULE HC49US
|
$MODULE HC49US
|
||||||
Po 0 0 0 15 4D2590A9 00000000 ~~
|
Po 0 0 0 15 4D2590A9 00000000 ~~
|
||||||
Li HC49US
|
Li HC49US
|
||||||
@@ -5668,4 +5640,878 @@ Ne 33 "N-000035"
|
|||||||
Po -3828 1870
|
Po -3828 1870
|
||||||
$EndPAD
|
$EndPAD
|
||||||
$EndMODULE TSOP40
|
$EndMODULE TSOP40
|
||||||
|
$MODULE R_PACK_1206
|
||||||
|
Po 0 0 0 15 4EF2E0E8 00000000 ~~
|
||||||
|
Li R_PACK_1206
|
||||||
|
Sc 00000000
|
||||||
|
AR R_PACK_1206
|
||||||
|
Op 0 0 0
|
||||||
|
T0 0 0 600 600 0 120 N V 21 N "R_PACK_1206"
|
||||||
|
T1 0 0 600 600 0 120 N V 21 N "VAL**"
|
||||||
|
DS -866 -827 866 -827 79 21
|
||||||
|
DS 866 -827 866 827 79 21
|
||||||
|
DS 866 827 -866 827 79 21
|
||||||
|
DS -866 827 -866 -827 79 21
|
||||||
|
$PAD
|
||||||
|
Sh "1" R 248 453 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -510 384
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" R 173 453 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -157 384
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "3" R 173 453 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 157 384
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "4" R 248 453 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 510 384
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "5" R 248 453 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 510 -384
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "6" R 173 453 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 157 -384
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "7" R 173 453 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -157 -384
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "8" R 248 453 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -510 -384
|
||||||
|
$EndPAD
|
||||||
|
$EndMODULE R_PACK_1206
|
||||||
|
$MODULE TSSOP10_LONGPADS
|
||||||
|
Po 0 0 0 15 4EF2E58B 00000000 ~~
|
||||||
|
Li TSSOP10_LONGPADS
|
||||||
|
Sc 00000000
|
||||||
|
AR
|
||||||
|
Op 0 0 0
|
||||||
|
T0 0 0 600 600 0 120 N V 21 N "Test"
|
||||||
|
T1 0 0 600 600 0 120 N V 21 N "VAL**"
|
||||||
|
DC -394 394 -315 394 60 21
|
||||||
|
DS -590 -590 590 -590 60 21
|
||||||
|
DS 590 -590 590 590 60 21
|
||||||
|
DS -590 590 590 590 60 21
|
||||||
|
DS -590 -590 -590 590 60 21
|
||||||
|
$PAD
|
||||||
|
Sh "1" R 118 551 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -393 965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" R 118 551 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -196 965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "3" R 118 551 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 0 965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "4" R 118 551 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 196 965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "5" R 118 551 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 393 965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "6" R 118 551 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 393 -965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "7" R 118 551 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 196 -965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "8" R 118 551 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 0 -965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "9" R 118 551 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -196 -965
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "10" R 118 551 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -393 -965
|
||||||
|
$EndPAD
|
||||||
|
$EndMODULE TSSOP10_LONGPADS
|
||||||
|
$MODULE L_4.2X4.2
|
||||||
|
Po 0 0 0 15 4EF777D2 00000000 ~~
|
||||||
|
Li L_4.2X4.2
|
||||||
|
Sc 00000000
|
||||||
|
AR
|
||||||
|
Op 0 0 0
|
||||||
|
T0 0 0 600 600 0 120 N V 21 N "L_4.2X4.2"
|
||||||
|
T1 0 0 600 600 0 120 N V 21 N "VAL**"
|
||||||
|
DS -1024 -984 1024 -984 79 21
|
||||||
|
DS 1024 -984 1024 984 79 21
|
||||||
|
DS 1024 984 -1024 984 79 21
|
||||||
|
DS -1024 984 -1024 -984 79 21
|
||||||
|
$PAD
|
||||||
|
Sh "1" R 591 1654 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -571 0
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" R 591 1654 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 571 0
|
||||||
|
$EndPAD
|
||||||
|
$EndMODULE L_4.2X4.2
|
||||||
|
$MODULE LED-3MM-FIXED
|
||||||
|
Po 0 0 0 15 4EF9035D 00000000 ~~
|
||||||
|
Li LED-3MM-FIXED
|
||||||
|
Cd LED 3mm - Lead pitch 100mil (2,54mm)
|
||||||
|
Kw LED led 3mm 3MM 100mil 2,54mm
|
||||||
|
Sc 00000000
|
||||||
|
AR /4B6ED75B/4C0DA78D
|
||||||
|
Op 0 0 0
|
||||||
|
At VIRTUAL
|
||||||
|
T0 -300 -2125 320 320 0 70 N V 21 N "D403"
|
||||||
|
T1 25 3575 320 320 2700 70 N V 21 N "LED_2mA_1.7V,_red"
|
||||||
|
DS 669 669 669 394 80 21
|
||||||
|
DS 669 -669 669 -394 80 21
|
||||||
|
DA 0 0 669 669 2700 80 21
|
||||||
|
$PAD
|
||||||
|
Sh "1" C 660 660 0 0 0
|
||||||
|
Dr 400 0 0
|
||||||
|
At STD N 00E0FFFF
|
||||||
|
Ne 1 "+3.3V"
|
||||||
|
Po -500 0
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" C 660 660 0 0 0
|
||||||
|
Dr 400 0 0
|
||||||
|
At STD N 00E0FFFF
|
||||||
|
Ne 2 "N-000262"
|
||||||
|
Po 500 0
|
||||||
|
$EndPAD
|
||||||
|
$SHAPE3D
|
||||||
|
Na "libs/led3_vertical_red.wrl"
|
||||||
|
Sc 1.000000 1.000000 1.000000
|
||||||
|
Of 0.000000 0.000000 0.000000
|
||||||
|
Ro 0.000000 0.000000 0.000000
|
||||||
|
$EndSHAPE3D
|
||||||
|
$EndMODULE LED-3MM-FIXED
|
||||||
|
$MODULE USB_MINIB_SMT
|
||||||
|
Po 0 0 0 15 4F34EE0A 00000000 ~~
|
||||||
|
Li USB_MINIB_SMT
|
||||||
|
Sc 00000000
|
||||||
|
AR /4B6ED75B/4BF00175
|
||||||
|
Op 0 0 0
|
||||||
|
T0 -2553 -147 320 320 0 70 N V 21 N "J421"
|
||||||
|
T1 0 0 320 320 0 80 N I 21 N "USB_Mini-B_SMT"
|
||||||
|
DS -1516 2047 1516 2047 79 21
|
||||||
|
DS 1516 2047 1516 -1575 79 21
|
||||||
|
DS 1516 -1575 -1516 -1575 79 21
|
||||||
|
DS -1516 -1575 -1516 2047 79 21
|
||||||
|
$PAD
|
||||||
|
Sh "6" R 787 1299 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 1 "GND"
|
||||||
|
Po -1752 -1161
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "7" R 787 1299 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 1 "GND"
|
||||||
|
Po 1752 -1161
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "6" R 787 984 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 1 "GND"
|
||||||
|
Po -1752 1161
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "7" R 787 984 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 1 "GND"
|
||||||
|
Po 1752 1161
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "" C 354 354 0 0 0
|
||||||
|
Dr 354 0 0
|
||||||
|
At HOLE N 00E0FFFF
|
||||||
|
Ne 0 ""
|
||||||
|
Po -866 0
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "" C 354 354 0 0 0
|
||||||
|
Dr 354 0 0
|
||||||
|
At HOLE N 00E0FFFF
|
||||||
|
Ne 0 ""
|
||||||
|
Po 866 0
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "3" R 197 1496 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 3 "N-000315"
|
||||||
|
Po 0 -1418
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "4" R 197 1496 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 315 -1418
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "5" R 197 1496 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 1 "GND"
|
||||||
|
Po 630 -1418
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "1" R 197 1496 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 4 "N-000328"
|
||||||
|
Po -630 -1418
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" R 197 1496 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "N-000310"
|
||||||
|
Po -315 -1418
|
||||||
|
$EndPAD
|
||||||
|
$EndMODULE USB_MINIB_SMT
|
||||||
|
$MODULE HRS-DM1AA
|
||||||
|
Po 0 0 0 15 4F34F118 00000000 ~~
|
||||||
|
Li HRS-DM1AA
|
||||||
|
Sc 00000000
|
||||||
|
AR /4B6ED75B/4BAA6A9C
|
||||||
|
Op 0 0 0
|
||||||
|
T0 -5000 -6425 320 320 0 70 N V 21 N "J411"
|
||||||
|
T1 0 0 320 320 0 70 N V 21 N "Hirose_DM1AA"
|
||||||
|
DS 4134 -5984 5512 -5984 120 21
|
||||||
|
DS 5512 6024 -5512 6024 120 21
|
||||||
|
DS -5512 -5984 -4685 -5984 120 21
|
||||||
|
DS -5512 4685 -5512 6024 120 21
|
||||||
|
DS 5511 6025 5511 4686 120 21
|
||||||
|
DS 5511 -2637 5511 3584 120 21
|
||||||
|
DS 5511 -5983 5511 -3779 120 21
|
||||||
|
DS 4133 -5511 3779 -5511 120 21
|
||||||
|
DS -4686 -5511 -4529 -5511 120 21
|
||||||
|
DS -5512 2521 -5512 2796 120 21
|
||||||
|
DS -5512 -983 -5512 1773 120 21
|
||||||
|
DS -5512 -2637 -5512 -1731 120 21
|
||||||
|
DS -5512 -5983 -5512 -3779 120 21
|
||||||
|
DS -4686 -5983 -4686 -5511 120 21
|
||||||
|
DS 4133 -5511 4133 -5983 120 21
|
||||||
|
$PAD
|
||||||
|
Sh "" C 512 512 0 0 0
|
||||||
|
Dr 512 0 0
|
||||||
|
At HOLE N 00E0FFFF
|
||||||
|
Ne 0 ""
|
||||||
|
Po -4686 -4999
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "" C 512 512 0 0 0
|
||||||
|
Dr 512 0 0
|
||||||
|
At HOLE N 00E0FFFF
|
||||||
|
Ne 0 ""
|
||||||
|
Po 4133 -4999
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "1" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 10 "SD_DAT3"
|
||||||
|
Po 2391 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 6 "SD_CMD"
|
||||||
|
Po 1407 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "3" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "GND"
|
||||||
|
Po 422 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "4" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 1 "+3.3V"
|
||||||
|
Po -562 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "5" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 5 "SD_CLK"
|
||||||
|
Po -1546 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "6" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "GND"
|
||||||
|
Po -2530 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "7" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 7 "SD_DAT0"
|
||||||
|
Po -3485 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "8" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 8 "SD_DAT1"
|
||||||
|
Po -4155 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "9" R 433 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 9 "SD_DAT2"
|
||||||
|
Po 3375 -5865
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "GND1" R 787 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "GND"
|
||||||
|
Po 5708 -3208
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "GND1" R 787 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "GND"
|
||||||
|
Po 5708 4135
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "GND1" R 787 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "GND"
|
||||||
|
Po -5710 -3208
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "GND1" R 787 787 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "GND"
|
||||||
|
Po -5710 4135
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "DT" R 787 394 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 4 "N-000318"
|
||||||
|
Po -5552 -1377
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "WP" R 787 394 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 3 "N-000295"
|
||||||
|
Po -5552 2147
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "GND2" R 787 394 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "GND"
|
||||||
|
Po -5552 3170
|
||||||
|
$EndPAD
|
||||||
|
$EndMODULE HRS-DM1AA
|
||||||
|
$MODULE R_PACK_0804_LONGPADS
|
||||||
|
Po 0 0 0 15 4F496244 00000000 ~~
|
||||||
|
Li R_PACK_0804_LONGPADS
|
||||||
|
Sc 00000000
|
||||||
|
AR /4B6E16F2/4D96310E
|
||||||
|
Op 0 0 0
|
||||||
|
T0 325 750 320 320 0 70 N V 21 N "RA105"
|
||||||
|
T1 0 0 320 320 0 70 N V 21 N "100"
|
||||||
|
DS -551 -472 -551 472 79 21
|
||||||
|
DS 551 -472 551 472 79 21
|
||||||
|
DS -551 -472 551 -472 79 21
|
||||||
|
DS 551 472 -551 472 79 21
|
||||||
|
$PAD
|
||||||
|
Sh "7" R 118 276 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 5 "N-000012"
|
||||||
|
Po -98 -236
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "6" R 118 276 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 7 "N-000143"
|
||||||
|
Po 98 -236
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" R 118 276 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 2 "/SNES_Slot/SNES_EXT_/RD"
|
||||||
|
Po -98 236
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "3" R 118 276 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 3 "/SNES_Slot/SNES_EXT_/ROMSEL"
|
||||||
|
Po 98 236
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "8" R 197 276 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 8 "N-000147"
|
||||||
|
Po -335 -236
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "5" R 197 276 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 6 "N-000038"
|
||||||
|
Po 335 -236
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "4" R 197 276 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 4 "/SNES_Slot/SNES_EXT_A23"
|
||||||
|
Po 335 236
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "1" R 197 276 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 1 "/SNES_Slot/SNES_EXT_/IRQ"
|
||||||
|
Po -335 236
|
||||||
|
$EndPAD
|
||||||
|
$EndMODULE R_PACK_0804_LONGPADS
|
||||||
|
$MODULE TSSOP48_LONGPADS
|
||||||
|
Po 0 0 0 15 4F497040 00000000 ~~
|
||||||
|
Li TSSOP48_LONGPADS
|
||||||
|
Sc 00000000
|
||||||
|
AR
|
||||||
|
Op 0 0 0
|
||||||
|
T0 0 -551 320 320 0 70 N V 21 N "Test"
|
||||||
|
T1 0 630 320 320 0 70 N V 21 N "VAL**"
|
||||||
|
DS -2461 1161 -2461 -1161 79 21
|
||||||
|
DS 2461 -1161 2461 1161 79 21
|
||||||
|
DC -2205 906 -2087 906 79 21
|
||||||
|
DS -2460 -1160 2460 -1160 79 21
|
||||||
|
DS -2460 1160 2460 1160 79 21
|
||||||
|
$PAD
|
||||||
|
Sh "1" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -2263 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -2066 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "3" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1870 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "4" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1673 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "5" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1476 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "6" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1279 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "7" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1082 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "8" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -885 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "9" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -688 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "10" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -492 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "11" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -295 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "12" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -98 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "13" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 98 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "14" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 295 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "15" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 492 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "16" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 688 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "17" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 885 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "18" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1082 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "19" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1279 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "20" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1476 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "21" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1673 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "22" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1870 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "23" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 2066 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "24" R 118 630 0 0 1800
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 2263 1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "25" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 2263 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "26" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 2066 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "27" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1870 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "28" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1673 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "29" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1476 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "30" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1279 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "31" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 1082 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "32" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 885 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "33" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 688 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "34" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 492 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "35" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 295 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "36" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 98 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "37" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -98 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "38" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -295 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "39" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -492 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "40" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -688 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "41" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -885 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "42" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1082 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "43" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1279 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "44" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1476 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "45" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1673 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "46" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -1870 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "47" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -2066 -1614
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "48" R 118 630 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At SMD N 00888000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -2263 -1614
|
||||||
|
$EndPAD
|
||||||
|
$EndMODULE TSSOP48_LONGPADS
|
||||||
$EndLIBRARY
|
$EndLIBRARY
|
||||||
|
|||||||
@@ -1,7 +1,8 @@
|
|||||||
PCBNEW-LibModule-V1 Mon 26 Jul 2010 02:13:00 PM CEST
|
PCBNEW-LibModule-V1 Tue 27 Dec 2011 12:52:27 PM CET
|
||||||
|
# encoding utf-8
|
||||||
$INDEX
|
$INDEX
|
||||||
SD-RSMT-2-MQ-WF
|
|
||||||
HRS-DM1AA
|
HRS-DM1AA
|
||||||
|
SD-RSMT-2-MQ-WF
|
||||||
$EndINDEX
|
$EndINDEX
|
||||||
$MODULE SD-RSMT-2-MQ-WF
|
$MODULE SD-RSMT-2-MQ-WF
|
||||||
Po 0 0 0 15 4C4D74E3 00000000 ~~
|
Po 0 0 0 15 4C4D74E3 00000000 ~~
|
||||||
@@ -124,40 +125,39 @@ Po 3740 709
|
|||||||
$EndPAD
|
$EndPAD
|
||||||
$EndMODULE SD-RSMT-2-MQ-WF
|
$EndMODULE SD-RSMT-2-MQ-WF
|
||||||
$MODULE HRS-DM1AA
|
$MODULE HRS-DM1AA
|
||||||
Po 0 0 0 15 4C4D706D 00000000 ~~
|
Po 0 0 0 15 4EF9108C 00000000 ~~
|
||||||
Li HRS-DM1AA
|
Li HRS-DM1AA
|
||||||
Sc 00000000
|
Sc 00000000
|
||||||
AR
|
AR HRS-DM1AA
|
||||||
Op 0 0 0
|
Op 0 0 0
|
||||||
T0 0 0 300 300 0 60 N V 21 N "HRS-DM1AA"
|
T0 0 0 300 300 0 60 N V 21 N "HRS-DM1AA"
|
||||||
T1 0 0 300 300 0 60 N V 21 N "VAL**"
|
T1 0 0 300 300 0 60 N V 21 N "VAL**"
|
||||||
DS -5906 4725 -5906 4686 120 21
|
DS 4134 -5984 5512 -5984 120 21
|
||||||
DS 5905 6025 5905 4686 120 21
|
DS 5512 6024 -5512 6024 120 21
|
||||||
DS 5905 -2637 5905 3584 120 21
|
DS -5512 -5984 -4685 -5984 120 21
|
||||||
DS 5905 -5983 5905 -3779 120 21
|
DS -5512 4685 -5512 6024 120 21
|
||||||
|
DS 5511 6025 5511 4686 120 21
|
||||||
|
DS 5511 -2637 5511 3584 120 21
|
||||||
|
DS 5511 -5983 5511 -3779 120 21
|
||||||
DS 4133 -5511 3779 -5511 120 21
|
DS 4133 -5511 3779 -5511 120 21
|
||||||
DS -4686 -5511 -4529 -5511 120 21
|
DS -4686 -5511 -4529 -5511 120 21
|
||||||
DS -5906 6025 -5906 4725 120 21
|
DS -5512 2521 -5512 2796 120 21
|
||||||
DS -5906 2521 -5906 2796 120 21
|
DS -5512 -983 -5512 1773 120 21
|
||||||
DS -5906 -983 -5906 1773 120 21
|
DS -5512 -2637 -5512 -1731 120 21
|
||||||
DS -5906 -2637 -5906 -1731 120 21
|
DS -5512 -5983 -5512 -3779 120 21
|
||||||
DS -5906 -5983 -5906 -3779 120 21
|
|
||||||
DS -5906 -5983 -4686 -5983 120 21
|
|
||||||
DS -4686 -5983 -4686 -5511 120 21
|
DS -4686 -5983 -4686 -5511 120 21
|
||||||
DS 4133 -5511 4133 -5983 120 21
|
DS 4133 -5511 4133 -5983 120 21
|
||||||
DS 4133 -5983 5905 -5983 120 21
|
|
||||||
DS 5905 6025 -5906 6025 120 21
|
|
||||||
$PAD
|
$PAD
|
||||||
Sh "~" C 512 512 0 0 0
|
Sh "~" C 512 512 0 0 0
|
||||||
Dr 512 0 0
|
Dr 512 0 0
|
||||||
At STD N 00E0FFFF
|
At STD N 0000FFFF
|
||||||
Ne 0 ""
|
Ne 0 ""
|
||||||
Po -4686 -4999
|
Po -4686 -4999
|
||||||
$EndPAD
|
$EndPAD
|
||||||
$PAD
|
$PAD
|
||||||
Sh "~" C 512 512 0 0 0
|
Sh "~" C 512 512 0 0 0
|
||||||
Dr 512 0 0
|
Dr 512 0 0
|
||||||
At STD N 00E0FFFF
|
At STD N 0000FFFF
|
||||||
Ne 0 ""
|
Ne 0 ""
|
||||||
Po 4133 -4999
|
Po 4133 -4999
|
||||||
$EndPAD
|
$EndPAD
|
||||||
|
|||||||
@@ -1,7 +1,8 @@
|
|||||||
PCBNEW-LibModule-V1 Mon 26 Jul 2010 09:33:33 PM CEST
|
PCBNEW-LibModule-V1 Sun 26 Feb 2012 12:17:38 AM CET
|
||||||
|
# encoding utf-8
|
||||||
$INDEX
|
$INDEX
|
||||||
SD-RSMT-2-MQ-WF
|
|
||||||
HRS-DM1AA
|
HRS-DM1AA
|
||||||
|
SD-RSMT-2-MQ-WF
|
||||||
$EndINDEX
|
$EndINDEX
|
||||||
$MODULE SD-RSMT-2-MQ-WF
|
$MODULE SD-RSMT-2-MQ-WF
|
||||||
Po 0 0 0 15 4C4D74E3 00000000 ~~
|
Po 0 0 0 15 4C4D74E3 00000000 ~~
|
||||||
@@ -124,10 +125,10 @@ Po 3740 709
|
|||||||
$EndPAD
|
$EndPAD
|
||||||
$EndMODULE SD-RSMT-2-MQ-WF
|
$EndMODULE SD-RSMT-2-MQ-WF
|
||||||
$MODULE HRS-DM1AA
|
$MODULE HRS-DM1AA
|
||||||
Po 0 0 0 15 4C4DE307 00000000 ~~
|
Po 0 0 0 15 4F496C0E 00000000 ~~
|
||||||
Li HRS-DM1AA
|
Li HRS-DM1AA
|
||||||
Sc 00000000
|
Sc 00000000
|
||||||
AR
|
AR HRS-DM1AA
|
||||||
Op 0 0 0
|
Op 0 0 0
|
||||||
T0 0 0 300 300 0 60 N V 21 N "HRS-DM1AA"
|
T0 0 0 300 300 0 60 N V 21 N "HRS-DM1AA"
|
||||||
T1 0 0 300 300 0 60 N V 21 N "VAL**"
|
T1 0 0 300 300 0 60 N V 21 N "VAL**"
|
||||||
@@ -147,16 +148,16 @@ DS -5512 -5983 -5512 -3779 120 21
|
|||||||
DS -4686 -5983 -4686 -5511 120 21
|
DS -4686 -5983 -4686 -5511 120 21
|
||||||
DS 4133 -5511 4133 -5983 120 21
|
DS 4133 -5511 4133 -5983 120 21
|
||||||
$PAD
|
$PAD
|
||||||
Sh "~" C 512 512 0 0 0
|
Sh "" C 512 512 0 0 0
|
||||||
Dr 512 0 0
|
Dr 512 0 0
|
||||||
At STD N 00E0FFFF
|
At HOLE N 00E0FFFF
|
||||||
Ne 0 ""
|
Ne 0 ""
|
||||||
Po -4686 -4999
|
Po -4686 -4999
|
||||||
$EndPAD
|
$EndPAD
|
||||||
$PAD
|
$PAD
|
||||||
Sh "~" C 512 512 0 0 0
|
Sh "" C 512 512 0 0 0
|
||||||
Dr 512 0 0
|
Dr 512 0 0
|
||||||
At STD N 00E0FFFF
|
At HOLE N 00E0FFFF
|
||||||
Ne 0 ""
|
Ne 0 ""
|
||||||
Po 4133 -4999
|
Po 4133 -4999
|
||||||
$EndPAD
|
$EndPAD
|
||||||
|
|||||||
@@ -1,4 +1,4 @@
|
|||||||
PCBNEW-LibModule-V1 Mon 04 Jul 2011 12:35:33 AM CEST
|
PCBNEW-LibModule-V1 Thu 09 Feb 2012 09:51:59 PM CET
|
||||||
# encoding utf-8
|
# encoding utf-8
|
||||||
$INDEX
|
$INDEX
|
||||||
SNESCART_EXT
|
SNESCART_EXT
|
||||||
@@ -537,7 +537,7 @@ Po 14331 -3780
|
|||||||
$EndPAD
|
$EndPAD
|
||||||
$EndMODULE SNESCART_EXT
|
$EndMODULE SNESCART_EXT
|
||||||
$MODULE SNESCART_EXT2
|
$MODULE SNESCART_EXT2
|
||||||
Po 0 0 0 15 4E0F6C87 00000000 ~~
|
Po 0 0 0 15 4F3431E9 00000000 ~~
|
||||||
Li SNESCART_EXT2
|
Li SNESCART_EXT2
|
||||||
Sc 00000000
|
Sc 00000000
|
||||||
AR /4B6E16F2/4B6E1766
|
AR /4B6E16F2/4B6E1766
|
||||||
@@ -546,6 +546,18 @@ Op 0 0 0
|
|||||||
.SolderPaste -4
|
.SolderPaste -4
|
||||||
T0 -4134 2953 600 600 0 120 N V 21 N "J101"
|
T0 -4134 2953 600 600 0 120 N V 21 N "J101"
|
||||||
T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
|
T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
|
||||||
|
DS -20039 -5000 -20039 -8898 39 28
|
||||||
|
DS -18465 -4016 -18465 -5000 39 28
|
||||||
|
DS -19449 -2402 -19449 -4016 39 28
|
||||||
|
DS -17717 -2402 -17717 1693 39 28
|
||||||
|
DS 17717 -2402 17717 1693 39 28
|
||||||
|
DS 19921 -4094 19921 -2402 39 28
|
||||||
|
DS 19291 -29252 19291 -27756 39 28
|
||||||
|
DS -19488 -29252 -19488 -27756 39 28
|
||||||
|
DS -8524 -30709 -8524 -29252 39 28
|
||||||
|
DS 8622 -29252 8622 -30709 39 28
|
||||||
|
DS -20039 -24409 -20039 -12244 39 28
|
||||||
|
DS -19488 -27087 -19488 -24409 39 28
|
||||||
DC 1142 -11378 1929 -11378 79 20
|
DC 1142 -11378 1929 -11378 79 20
|
||||||
DC 1142 -11378 1929 -11339 79 21
|
DC 1142 -11378 1929 -11339 79 21
|
||||||
DS 19921 -24409 19921 -8976 39 28
|
DS 19921 -24409 19921 -8976 39 28
|
||||||
@@ -556,46 +568,33 @@ DS 19291 -8189 19291 -6890 39 28
|
|||||||
DS 18307 -8189 19291 -8189 39 28
|
DS 18307 -8189 19291 -8189 39 28
|
||||||
DS 18307 -8976 18307 -8189 39 28
|
DS 18307 -8976 18307 -8189 39 28
|
||||||
DS 19921 -8976 18307 -8976 39 28
|
DS 19921 -8976 18307 -8976 39 28
|
||||||
DS -20039 -4803 -20039 -8898 39 28
|
|
||||||
DS -20039 -24528 -20039 -12244 39 28
|
|
||||||
DS -18465 -12244 -20039 -12244 39 28
|
DS -18465 -12244 -20039 -12244 39 28
|
||||||
DS -18465 -11457 -18465 -12244 39 28
|
DS -18465 -11457 -18465 -12244 39 28
|
||||||
DS -19449 -11457 -18465 -11457 39 28
|
DS -19449 -11457 -18465 -11457 39 28
|
||||||
DS -19449 -8898 -19449 -11457 39 28
|
DS -19449 -8898 -19449 -11457 39 28
|
||||||
DS -20039 -8898 -19449 -8898 39 28
|
DS -20039 -8898 -19449 -8898 39 28
|
||||||
DS -19488 -27087 -19488 -24528 39 28
|
|
||||||
DA -17441 1693 -17441 1969 900 39 28
|
DA -17441 1693 -17441 1969 900 39 28
|
||||||
DA -13071 1693 -12795 1693 900 39 28
|
DA -13071 1693 -12795 1693 900 39 28
|
||||||
DA -11535 1693 -11535 1969 900 39 28
|
DA -11535 1693 -11535 1969 900 39 28
|
||||||
DA 11535 1693 11811 1693 900 39 28
|
DA 11535 1693 11811 1693 900 39 28
|
||||||
DA 13071 1693 13071 1969 900 39 28
|
DA 13071 1693 13071 1969 900 39 28
|
||||||
DA 17441 1693 17717 1693 900 39 28
|
DA 17441 1693 17717 1693 900 39 28
|
||||||
DS 8622 -29331 19291 -29331 40 28
|
DS 8622 -29252 19291 -29252 40 28
|
||||||
DS -8524 -30709 8622 -30709 40 28
|
DS -8524 -30709 8622 -30709 40 28
|
||||||
DS -19488 -29331 -8524 -29331 40 28
|
DS -19488 -29252 -8524 -29252 40 28
|
||||||
DC 2796 -17047 3583 -17047 75 20
|
DC 2796 -17047 3583 -17047 75 20
|
||||||
DC 2795 -17047 3582 -17047 75 21
|
DC 2795 -17047 3582 -17047 75 21
|
||||||
DS 8622 -29331 8622 -30709 40 28
|
|
||||||
DS -8524 -30709 -8524 -29331 40 28
|
|
||||||
DS -19488 -29331 -19488 -27756 40 28
|
|
||||||
DS -19488 -27756 -18504 -27756 40 28
|
DS -19488 -27756 -18504 -27756 40 28
|
||||||
DS -18504 -27756 -18504 -27087 40 28
|
DS -18504 -27756 -18504 -27087 40 28
|
||||||
DS -18504 -27087 -19488 -27087 40 28
|
DS -18504 -27087 -19488 -27087 40 28
|
||||||
DS -19488 -24528 -20039 -24528 40 28
|
DS -19488 -24409 -20039 -24409 40 28
|
||||||
DS -20039 -4803 -18465 -4803 40 28
|
DS -20039 -5000 -18465 -5000 40 28
|
||||||
DS -18465 -4803 -18465 -4016 40 28
|
|
||||||
DS -18465 -4016 -19449 -4016 40 28
|
DS -18465 -4016 -19449 -4016 40 28
|
||||||
DS -19449 -4016 -19449 -2205 40 28
|
DS -19449 -2402 -17717 -2402 40 28
|
||||||
DS -19449 -2205 -17717 -2205 40 28
|
|
||||||
DS -17717 -2205 -17717 -2165 40 28
|
|
||||||
DS 19291 -27087 18307 -27087 40 28
|
DS 19291 -27087 18307 -27087 40 28
|
||||||
DS 18307 -27087 18307 -27756 40 28
|
DS 18307 -27087 18307 -27756 40 28
|
||||||
DS 18307 -27756 19291 -27756 40 28
|
DS 18307 -27756 19291 -27756 40 28
|
||||||
DS 19291 -27756 19291 -29331 40 28
|
DS 17717 -2402 19921 -2402 40 28
|
||||||
DS 17717 1693 17717 -2165 40 28
|
|
||||||
DS 17717 -2165 17717 -2205 40 28
|
|
||||||
DS 17717 -2205 19921 -2205 40 28
|
|
||||||
DS 19921 -2205 19921 -4094 40 28
|
|
||||||
DS 19921 -4094 19291 -4094 40 28
|
DS 19921 -4094 19291 -4094 40 28
|
||||||
DS 19291 -4094 19291 -6102 40 28
|
DS 19291 -4094 19291 -6102 40 28
|
||||||
DS 19291 -6102 18307 -6102 40 28
|
DS 19291 -6102 18307 -6102 40 28
|
||||||
@@ -604,7 +603,6 @@ DS 13071 1969 17441 1969 40 28
|
|||||||
DS 11811 1693 11811 -2480 40 28
|
DS 11811 1693 11811 -2480 40 28
|
||||||
DS 11811 -2480 12795 -2480 40 28
|
DS 11811 -2480 12795 -2480 40 28
|
||||||
DS 12795 -2480 12795 1693 40 28
|
DS 12795 -2480 12795 1693 40 28
|
||||||
DS -17717 1693 -17717 -2165 40 28
|
|
||||||
DS -13071 1969 -17441 1969 40 28
|
DS -13071 1969 -17441 1969 40 28
|
||||||
DS -11811 1693 -11811 -2480 40 28
|
DS -11811 1693 -11811 -2480 40 28
|
||||||
DS -11811 -2480 -12795 -2480 40 28
|
DS -11811 -2480 -12795 -2480 40 28
|
||||||
@@ -864,6 +862,7 @@ Dr 0 0 0
|
|||||||
At CONN N 00000001
|
At CONN N 00000001
|
||||||
Ne 0 ""
|
Ne 0 ""
|
||||||
Po -16732 197
|
Po -16732 197
|
||||||
|
Le -65794
|
||||||
$EndPAD
|
$EndPAD
|
||||||
$PAD
|
$PAD
|
||||||
Sh "33" R 591 2756 0 0 0
|
Sh "33" R 591 2756 0 0 0
|
||||||
@@ -871,6 +870,7 @@ Dr 0 0 0
|
|||||||
At CONN N 00000001
|
At CONN N 00000001
|
||||||
Ne 49 "/SNES_Slot/SNES_EXT_REFRESH"
|
Ne 49 "/SNES_Slot/SNES_EXT_REFRESH"
|
||||||
Po -15748 197
|
Po -15748 197
|
||||||
|
Le -197380
|
||||||
$EndPAD
|
$EndPAD
|
||||||
$PAD
|
$PAD
|
||||||
Sh "34" R 591 2756 0 0 0
|
Sh "34" R 591 2756 0 0 0
|
||||||
|
|||||||
@@ -1,8 +1,9 @@
|
|||||||
PCBNEW-LibModule-V1 Mon 04 Jul 2011 12:37:18 AM CEST
|
PCBNEW-LibModule-V1 Fri 10 Feb 2012 10:51:00 AM CET
|
||||||
# encoding utf-8
|
# encoding utf-8
|
||||||
$INDEX
|
$INDEX
|
||||||
SNESCART_EXT
|
SNESCART_EXT
|
||||||
SNESCART_EXT2
|
SNESCART_EXT2
|
||||||
|
SNESCART_EXT2_SMTUSB
|
||||||
$EndINDEX
|
$EndINDEX
|
||||||
$MODULE SNESCART_EXT
|
$MODULE SNESCART_EXT
|
||||||
Po 0 0 0 15 4D200467 00000000 ~~
|
Po 0 0 0 15 4D200467 00000000 ~~
|
||||||
@@ -537,7 +538,7 @@ Po 14331 -3780
|
|||||||
$EndPAD
|
$EndPAD
|
||||||
$EndMODULE SNESCART_EXT
|
$EndMODULE SNESCART_EXT
|
||||||
$MODULE SNESCART_EXT2
|
$MODULE SNESCART_EXT2
|
||||||
Po 0 0 0 15 4E10EF0E 00000000 ~~
|
Po 0 0 0 15 4F3431E9 00000000 ~~
|
||||||
Li SNESCART_EXT2
|
Li SNESCART_EXT2
|
||||||
Sc 00000000
|
Sc 00000000
|
||||||
AR /4B6E16F2/4B6E1766
|
AR /4B6E16F2/4B6E1766
|
||||||
@@ -546,6 +547,16 @@ Op 0 0 0
|
|||||||
.SolderPaste -4
|
.SolderPaste -4
|
||||||
T0 -4134 2953 600 600 0 120 N V 21 N "J101"
|
T0 -4134 2953 600 600 0 120 N V 21 N "J101"
|
||||||
T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
|
T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
|
||||||
|
DS -20039 -5000 -20039 -8898 39 28
|
||||||
|
DS -18465 -4016 -18465 -5000 39 28
|
||||||
|
DS -19449 -2402 -19449 -4016 39 28
|
||||||
|
DS -17717 -2402 -17717 1693 39 28
|
||||||
|
DS 17717 -2402 17717 1693 39 28
|
||||||
|
DS 19921 -4094 19921 -2402 39 28
|
||||||
|
DS 19291 -29252 19291 -27756 39 28
|
||||||
|
DS -19488 -29252 -19488 -27756 39 28
|
||||||
|
DS -8524 -30709 -8524 -29252 39 28
|
||||||
|
DS 8622 -29252 8622 -30709 39 28
|
||||||
DS -20039 -24409 -20039 -12244 39 28
|
DS -20039 -24409 -20039 -12244 39 28
|
||||||
DS -19488 -27087 -19488 -24409 39 28
|
DS -19488 -27087 -19488 -24409 39 28
|
||||||
DC 1142 -11378 1929 -11378 79 20
|
DC 1142 -11378 1929 -11378 79 20
|
||||||
@@ -558,7 +569,6 @@ DS 19291 -8189 19291 -6890 39 28
|
|||||||
DS 18307 -8189 19291 -8189 39 28
|
DS 18307 -8189 19291 -8189 39 28
|
||||||
DS 18307 -8976 18307 -8189 39 28
|
DS 18307 -8976 18307 -8189 39 28
|
||||||
DS 19921 -8976 18307 -8976 39 28
|
DS 19921 -8976 18307 -8976 39 28
|
||||||
DS -20039 -4803 -20039 -8898 39 28
|
|
||||||
DS -18465 -12244 -20039 -12244 39 28
|
DS -18465 -12244 -20039 -12244 39 28
|
||||||
DS -18465 -11457 -18465 -12244 39 28
|
DS -18465 -11457 -18465 -12244 39 28
|
||||||
DS -19449 -11457 -18465 -11457 39 28
|
DS -19449 -11457 -18465 -11457 39 28
|
||||||
@@ -570,32 +580,22 @@ DA -11535 1693 -11535 1969 900 39 28
|
|||||||
DA 11535 1693 11811 1693 900 39 28
|
DA 11535 1693 11811 1693 900 39 28
|
||||||
DA 13071 1693 13071 1969 900 39 28
|
DA 13071 1693 13071 1969 900 39 28
|
||||||
DA 17441 1693 17717 1693 900 39 28
|
DA 17441 1693 17717 1693 900 39 28
|
||||||
DS 8622 -29331 19291 -29331 40 28
|
DS 8622 -29252 19291 -29252 40 28
|
||||||
DS -8524 -30709 8622 -30709 40 28
|
DS -8524 -30709 8622 -30709 40 28
|
||||||
DS -19488 -29331 -8524 -29331 40 28
|
DS -19488 -29252 -8524 -29252 40 28
|
||||||
DC 2796 -17047 3583 -17047 75 20
|
DC 2796 -17047 3583 -17047 75 20
|
||||||
DC 2795 -17047 3582 -17047 75 21
|
DC 2795 -17047 3582 -17047 75 21
|
||||||
DS 8622 -29331 8622 -30709 40 28
|
|
||||||
DS -8524 -30709 -8524 -29331 40 28
|
|
||||||
DS -19488 -29331 -19488 -27756 40 28
|
|
||||||
DS -19488 -27756 -18504 -27756 40 28
|
DS -19488 -27756 -18504 -27756 40 28
|
||||||
DS -18504 -27756 -18504 -27087 40 28
|
DS -18504 -27756 -18504 -27087 40 28
|
||||||
DS -18504 -27087 -19488 -27087 40 28
|
DS -18504 -27087 -19488 -27087 40 28
|
||||||
DS -19488 -24409 -20039 -24409 40 28
|
DS -19488 -24409 -20039 -24409 40 28
|
||||||
DS -20039 -4803 -18465 -4803 40 28
|
DS -20039 -5000 -18465 -5000 40 28
|
||||||
DS -18465 -4803 -18465 -4016 40 28
|
|
||||||
DS -18465 -4016 -19449 -4016 40 28
|
DS -18465 -4016 -19449 -4016 40 28
|
||||||
DS -19449 -4016 -19449 -2205 40 28
|
DS -19449 -2402 -17717 -2402 40 28
|
||||||
DS -19449 -2205 -17717 -2205 40 28
|
|
||||||
DS -17717 -2205 -17717 -2165 40 28
|
|
||||||
DS 19291 -27087 18307 -27087 40 28
|
DS 19291 -27087 18307 -27087 40 28
|
||||||
DS 18307 -27087 18307 -27756 40 28
|
DS 18307 -27087 18307 -27756 40 28
|
||||||
DS 18307 -27756 19291 -27756 40 28
|
DS 18307 -27756 19291 -27756 40 28
|
||||||
DS 19291 -27756 19291 -29331 40 28
|
DS 17717 -2402 19921 -2402 40 28
|
||||||
DS 17717 1693 17717 -2165 40 28
|
|
||||||
DS 17717 -2165 17717 -2205 40 28
|
|
||||||
DS 17717 -2205 19921 -2205 40 28
|
|
||||||
DS 19921 -2205 19921 -4094 40 28
|
|
||||||
DS 19921 -4094 19291 -4094 40 28
|
DS 19921 -4094 19291 -4094 40 28
|
||||||
DS 19291 -4094 19291 -6102 40 28
|
DS 19291 -4094 19291 -6102 40 28
|
||||||
DS 19291 -6102 18307 -6102 40 28
|
DS 19291 -6102 18307 -6102 40 28
|
||||||
@@ -604,7 +604,6 @@ DS 13071 1969 17441 1969 40 28
|
|||||||
DS 11811 1693 11811 -2480 40 28
|
DS 11811 1693 11811 -2480 40 28
|
||||||
DS 11811 -2480 12795 -2480 40 28
|
DS 11811 -2480 12795 -2480 40 28
|
||||||
DS 12795 -2480 12795 1693 40 28
|
DS 12795 -2480 12795 1693 40 28
|
||||||
DS -17717 1693 -17717 -2165 40 28
|
|
||||||
DS -13071 1969 -17441 1969 40 28
|
DS -13071 1969 -17441 1969 40 28
|
||||||
DS -11811 1693 -11811 -2480 40 28
|
DS -11811 1693 -11811 -2480 40 28
|
||||||
DS -11811 -2480 -12795 -2480 40 28
|
DS -11811 -2480 -12795 -2480 40 28
|
||||||
@@ -1147,4 +1146,614 @@ Po 14331 -3780
|
|||||||
Le 23484672
|
Le 23484672
|
||||||
$EndPAD
|
$EndPAD
|
||||||
$EndMODULE SNESCART_EXT2
|
$EndMODULE SNESCART_EXT2
|
||||||
|
$MODULE SNESCART_EXT2_SMTUSB
|
||||||
|
Po 0 0 0 15 4F34E870 00000000 ~~
|
||||||
|
Li SNESCART_EXT2_SMTUSB
|
||||||
|
Sc 00000000
|
||||||
|
AR /4B6E16F2/4B6E1766
|
||||||
|
Op 0 0 0
|
||||||
|
.SolderMask 4
|
||||||
|
.SolderPaste -4
|
||||||
|
T0 -4134 2953 600 600 0 120 N V 21 N "J101"
|
||||||
|
T1 0 2953 600 600 0 120 N V 21 N "SNESCART_EXT"
|
||||||
|
DS 8858 -29252 19291 -29252 39 28
|
||||||
|
DS 8622 -30709 8858 -30709 39 28
|
||||||
|
DS -20039 -5000 -20039 -8898 39 28
|
||||||
|
DS -18465 -4016 -18465 -5000 39 28
|
||||||
|
DS -19449 -2402 -19449 -4016 39 28
|
||||||
|
DS -17717 -2402 -17717 1693 39 28
|
||||||
|
DS 17717 -2402 17717 1693 39 28
|
||||||
|
DS 19921 -4094 19921 -2402 39 28
|
||||||
|
DS 19291 -29252 19291 -27756 39 28
|
||||||
|
DS -19488 -29252 -19488 -27756 39 28
|
||||||
|
DS -8524 -30709 -8524 -29252 39 28
|
||||||
|
DS 8858 -29252 8858 -30709 39 28
|
||||||
|
DS -20039 -24409 -20039 -12244 39 28
|
||||||
|
DS -19488 -27087 -19488 -24409 39 28
|
||||||
|
DC 1142 -11378 1929 -11378 79 20
|
||||||
|
DC 1142 -11378 1929 -11339 79 21
|
||||||
|
DS 19921 -24409 19921 -8976 39 28
|
||||||
|
DS 19291 -27087 19291 -24409 39 28
|
||||||
|
DS 19291 -24409 19921 -24409 39 28
|
||||||
|
DS 18307 -6890 19291 -6890 39 28
|
||||||
|
DS 19291 -8189 19291 -6890 39 28
|
||||||
|
DS 18307 -8189 19291 -8189 39 28
|
||||||
|
DS 18307 -8976 18307 -8189 39 28
|
||||||
|
DS 19921 -8976 18307 -8976 39 28
|
||||||
|
DS -18465 -12244 -20039 -12244 39 28
|
||||||
|
DS -18465 -11457 -18465 -12244 39 28
|
||||||
|
DS -19449 -11457 -18465 -11457 39 28
|
||||||
|
DS -19449 -8898 -19449 -11457 39 28
|
||||||
|
DS -20039 -8898 -19449 -8898 39 28
|
||||||
|
DA -17441 1693 -17441 1969 900 39 28
|
||||||
|
DA -13071 1693 -12795 1693 900 39 28
|
||||||
|
DA -11535 1693 -11535 1969 900 39 28
|
||||||
|
DA 11535 1693 11811 1693 900 39 28
|
||||||
|
DA 13071 1693 13071 1969 900 39 28
|
||||||
|
DA 17441 1693 17717 1693 900 39 28
|
||||||
|
DS -8524 -30709 8622 -30709 40 28
|
||||||
|
DS -19488 -29252 -8524 -29252 40 28
|
||||||
|
DC 2796 -17047 3583 -17047 75 20
|
||||||
|
DC 2795 -17047 3582 -17047 75 21
|
||||||
|
DS -19488 -27756 -18504 -27756 40 28
|
||||||
|
DS -18504 -27756 -18504 -27087 40 28
|
||||||
|
DS -18504 -27087 -19488 -27087 40 28
|
||||||
|
DS -19488 -24409 -20039 -24409 40 28
|
||||||
|
DS -20039 -5000 -18465 -5000 40 28
|
||||||
|
DS -18465 -4016 -19449 -4016 40 28
|
||||||
|
DS -19449 -2402 -17717 -2402 40 28
|
||||||
|
DS 19291 -27087 18307 -27087 40 28
|
||||||
|
DS 18307 -27087 18307 -27756 40 28
|
||||||
|
DS 18307 -27756 19291 -27756 40 28
|
||||||
|
DS 17717 -2402 19921 -2402 40 28
|
||||||
|
DS 19921 -4094 19291 -4094 40 28
|
||||||
|
DS 19291 -4094 19291 -6102 40 28
|
||||||
|
DS 19291 -6102 18307 -6102 40 28
|
||||||
|
DS 18307 -6102 18307 -6890 40 28
|
||||||
|
DS 13071 1969 17441 1969 40 28
|
||||||
|
DS 11811 1693 11811 -2480 40 28
|
||||||
|
DS 11811 -2480 12795 -2480 40 28
|
||||||
|
DS 12795 -2480 12795 1693 40 28
|
||||||
|
DS -13071 1969 -17441 1969 40 28
|
||||||
|
DS -11811 1693 -11811 -2480 40 28
|
||||||
|
DS -11811 -2480 -12795 -2480 40 28
|
||||||
|
DS -12795 -2480 -12795 1693 40 28
|
||||||
|
DS -11535 1969 11535 1969 40 28
|
||||||
|
$PAD
|
||||||
|
Sh "1" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 50 "/SNES_Slot/SNES_EXT_SYS_CLK"
|
||||||
|
Po -16732 197
|
||||||
|
Le 19
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "2" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -15748 197
|
||||||
|
Le 86
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "3" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 47 "/SNES_Slot/SNES_EXT_PA6"
|
||||||
|
Po -14764 197
|
||||||
|
Le 98
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "4" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 3 "/SNES_Slot/SNES_EXT_/PARD"
|
||||||
|
Po -13780 197
|
||||||
|
Le 353
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "5" R 787 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 57 "GND"
|
||||||
|
Po -10925 197
|
||||||
|
Le 46326
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "6" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 11 "/SNES_Slot/SNES_EXT_A11"
|
||||||
|
Po -9843 197
|
||||||
|
Le 41840
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "7" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 10 "/SNES_Slot/SNES_EXT_A10"
|
||||||
|
Po -8858 197
|
||||||
|
Le 33
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "8" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 31 "/SNES_Slot/SNES_EXT_A9"
|
||||||
|
Po -7874 197
|
||||||
|
Le 10
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "9" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 30 "/SNES_Slot/SNES_EXT_A8"
|
||||||
|
Po -6890 197
|
||||||
|
Le 40686
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "10" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 29 "/SNES_Slot/SNES_EXT_A7"
|
||||||
|
Po -5906 197
|
||||||
|
Le 32
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "11" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 28 "/SNES_Slot/SNES_EXT_A6"
|
||||||
|
Po -4921 197
|
||||||
|
Le 26720752
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "12" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 27 "/SNES_Slot/SNES_EXT_A5"
|
||||||
|
Po -3937 197
|
||||||
|
Le 44474
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "13" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 26 "/SNES_Slot/SNES_EXT_A4"
|
||||||
|
Po -2953 197
|
||||||
|
Le 41300
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "14" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 25 "/SNES_Slot/SNES_EXT_A3"
|
||||||
|
Po -1969 197
|
||||||
|
Le 26690192
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "15" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 20 "/SNES_Slot/SNES_EXT_A2"
|
||||||
|
Po -984 197
|
||||||
|
Le 778140282
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "16" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 9 "/SNES_Slot/SNES_EXT_A1"
|
||||||
|
Po 0 197
|
||||||
|
Le 45976
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "17" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 8 "/SNES_Slot/SNES_EXT_A0"
|
||||||
|
Po 984 197
|
||||||
|
Le 26692384
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "18" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 2 "/SNES_Slot/SNES_EXT_/IRQ"
|
||||||
|
Po 1969 197
|
||||||
|
Le 33
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "19" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 33 "/SNES_Slot/SNES_EXT_D0"
|
||||||
|
Po 2953 197
|
||||||
|
Le 101
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "20" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 34 "/SNES_Slot/SNES_EXT_D1"
|
||||||
|
Po 3937 197
|
||||||
|
Le 72
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "21" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 35 "/SNES_Slot/SNES_EXT_D2"
|
||||||
|
Po 4921 197
|
||||||
|
Le 1362898584
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "22" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 36 "/SNES_Slot/SNES_EXT_D3"
|
||||||
|
Po 5906 197
|
||||||
|
Le 193
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "23" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 5 "/SNES_Slot/SNES_EXT_/RD"
|
||||||
|
Po 6890 197
|
||||||
|
Le 1
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "24" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 56 "EXT_CIC_DATA1"
|
||||||
|
Po 7874 197
|
||||||
|
Le -268371600
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "25" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 54 "CIC_RESET"
|
||||||
|
Po 8858 197
|
||||||
|
Le 44216
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "26" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 58 "SNES_/RESET"
|
||||||
|
Po 9843 197
|
||||||
|
Le 26710224
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "27" R 787 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 1 "+5VL"
|
||||||
|
Po 10925 197
|
||||||
|
Le -268358496
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "28" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 41 "/SNES_Slot/SNES_EXT_PA0"
|
||||||
|
Po 13780 197
|
||||||
|
Le 40657
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "29" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 43 "/SNES_Slot/SNES_EXT_PA2"
|
||||||
|
Po 14764 197
|
||||||
|
Le 42
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "30" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 45 "/SNES_Slot/SNES_EXT_PA4"
|
||||||
|
Po 15748 197
|
||||||
|
Le 27776368
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "31" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00008000
|
||||||
|
Ne 51 "AUDIO_L"
|
||||||
|
Po 16732 197
|
||||||
|
Le 1376453976
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "32" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 0 ""
|
||||||
|
Po -16732 197
|
||||||
|
Le -65794
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "33" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 49 "/SNES_Slot/SNES_EXT_REFRESH"
|
||||||
|
Po -15748 197
|
||||||
|
Le -197380
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "34" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 48 "/SNES_Slot/SNES_EXT_PA7"
|
||||||
|
Po -14764 197
|
||||||
|
Le 26706208
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "35" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 4 "/SNES_Slot/SNES_EXT_/PAWR"
|
||||||
|
Po -13780 197
|
||||||
|
Le 48
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "36" R 787 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 57 "GND"
|
||||||
|
Po -10925 197
|
||||||
|
Le 26698352
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "37" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 12 "/SNES_Slot/SNES_EXT_A12"
|
||||||
|
Po -9843 197
|
||||||
|
Le 26703872
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "38" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 13 "/SNES_Slot/SNES_EXT_A13"
|
||||||
|
Po -8858 197
|
||||||
|
Le 2513
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "39" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 14 "/SNES_Slot/SNES_EXT_A14"
|
||||||
|
Po -7874 197
|
||||||
|
Le 48
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "40" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 15 "/SNES_Slot/SNES_EXT_A15"
|
||||||
|
Po -6890 197
|
||||||
|
Le 14164224
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "41" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 16 "/SNES_Slot/SNES_EXT_A16"
|
||||||
|
Po -5906 197
|
||||||
|
Le 14319616
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "42" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 17 "/SNES_Slot/SNES_EXT_A17"
|
||||||
|
Po -4921 197
|
||||||
|
Le 14154752
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "43" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 18 "/SNES_Slot/SNES_EXT_A18"
|
||||||
|
Po -3937 197
|
||||||
|
Le 192512
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "44" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 19 "/SNES_Slot/SNES_EXT_A19"
|
||||||
|
Po -2953 197
|
||||||
|
Le 39524
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "45" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 21 "/SNES_Slot/SNES_EXT_A20"
|
||||||
|
Po -1969 197
|
||||||
|
Le 1077956333
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "46" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 22 "/SNES_Slot/SNES_EXT_A21"
|
||||||
|
Po -984 197
|
||||||
|
Le 39959
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "47" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 23 "/SNES_Slot/SNES_EXT_A22"
|
||||||
|
Po 0 197
|
||||||
|
Le 1077938791
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "48" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 24 "/SNES_Slot/SNES_EXT_A23"
|
||||||
|
Po 984 197
|
||||||
|
Le 40274
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "49" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 6 "/SNES_Slot/SNES_EXT_/ROMSEL"
|
||||||
|
Po 1969 197
|
||||||
|
Le 40357
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "50" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 37 "/SNES_Slot/SNES_EXT_D4"
|
||||||
|
Po 2953 197
|
||||||
|
Le 40449
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "51" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 38 "/SNES_Slot/SNES_EXT_D5"
|
||||||
|
Po 3937 197
|
||||||
|
Le 1077956333
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "52" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 39 "/SNES_Slot/SNES_EXT_D6"
|
||||||
|
Po 4921 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "53" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 40 "/SNES_Slot/SNES_EXT_D7"
|
||||||
|
Po 5906 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "54" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 7 "/SNES_Slot/SNES_EXT_/WR"
|
||||||
|
Po 6890 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "55" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 55 "EXT_CIC_DATA0"
|
||||||
|
Po 7874 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "56" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 53 "CIC_CLK"
|
||||||
|
Po 8858 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "57" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 32 "/SNES_Slot/SNES_EXT_CPU_CLK"
|
||||||
|
Po 9843 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "58" R 787 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 1 "+5VL"
|
||||||
|
Po 10925 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "59" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 42 "/SNES_Slot/SNES_EXT_PA1"
|
||||||
|
Po 13780 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "60" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 44 "/SNES_Slot/SNES_EXT_PA3"
|
||||||
|
Po 14764 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "61" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 46 "/SNES_Slot/SNES_EXT_PA5"
|
||||||
|
Po 15748 197
|
||||||
|
Le 1077941145
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "62" R 591 2756 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00000001
|
||||||
|
Ne 52 "AUDIO_R"
|
||||||
|
Po 16732 197
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "" R 4921 3150 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00C00000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -15256 394
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "" R 4921 3150 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00C00000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 15256 394
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "" R 23622 3150 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00C00000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 0 394
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "" R 2362 1969 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00400000
|
||||||
|
Ne 0 ""
|
||||||
|
Po -10945 -3819
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$PAD
|
||||||
|
Sh "" R 2283 2362 0 0 0
|
||||||
|
Dr 0 0 0
|
||||||
|
At CONN N 00400000
|
||||||
|
Ne 0 ""
|
||||||
|
Po 14331 -3780
|
||||||
|
Le 23484672
|
||||||
|
$EndPAD
|
||||||
|
$EndMODULE SNESCART_EXT2_SMTUSB
|
||||||
$EndLIBRARY
|
$EndLIBRARY
|
||||||
|
|||||||
28645
pcb/kicad/sd2snes.brd
28645
pcb/kicad/sd2snes.brd
File diff suppressed because it is too large
Load Diff
@@ -1,19 +1,23 @@
|
|||||||
OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 logospr.o65 text.o65 dma.o65 menu.o65 pad.o65 time.o65 mainmenu.o65 # gfx.o65 # vars.o65
|
OBJS = header.ips reset.o65 main.o65 font.o65 palette.o65 data.o65 const.o65 logo.o65 logospr.o65 text.o65 dma.o65 menu.o65 pad.o65 time.o65 mainmenu.o65 sysinfo.o65 spc700.o65 spcplay.o65 # gfx.o65 # vars.o65
|
||||||
|
|
||||||
all: menu.bin
|
all: clean menu.bin map
|
||||||
|
|
||||||
smc: menu.bin
|
smc: menu.bin
|
||||||
cat menu.bin sd2snes.rom > menu.smc
|
cat menu.bin sd2snes.rom > menu.smc
|
||||||
|
|
||||||
|
map: menu.bin
|
||||||
|
utils/mkmap.sh $(OBJS)
|
||||||
|
|
||||||
menu.bin: $(OBJS)
|
menu.bin: $(OBJS)
|
||||||
sneslink -fsmc -o $@ $^
|
sneslink -fsmc -o $@ $^ 2>&1 | tee link.log
|
||||||
|
|
||||||
# Generic rule to create .o65 out from .a65
|
# Generic rule to create .o65 out from .a65
|
||||||
%.o65: %.a65
|
%.o65: %.a65
|
||||||
snescom -J -Wall -o $@ $<
|
snescom -J -Wall -o $@ $< 2>&1 | tee $@.log
|
||||||
|
|
||||||
# Generic rule to create .ips out from .a65
|
# Generic rule to create .ips out from .a65
|
||||||
%.ips: %.a65
|
%.ips: %.a65
|
||||||
snescom -I -J -Wall -o $@ $<
|
snescom -I -J -Wall -o $@ $< 2>&1 | tee $@.log
|
||||||
|
|
||||||
clean:
|
clean:
|
||||||
rm -f *.ips *.o65 *~ menu.bin
|
rm -f *.ips *.o65 *~ menu.bin
|
||||||
|
|||||||
@@ -2,7 +2,8 @@ version .byt " v0.1",0
|
|||||||
zero .word 0
|
zero .word 0
|
||||||
bg2tile .byt $20
|
bg2tile .byt $20
|
||||||
|
|
||||||
space64 .byt $20, $20, $20, $20, $20, $20, $20, $20
|
space64
|
||||||
|
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
||||||
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
||||||
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
||||||
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
||||||
|
|||||||
@@ -26,7 +26,8 @@ textdmasize .word 0 ; number of bytes to copy each frame
|
|||||||
|
|
||||||
infloop .byt 0,0 ; to be filled w/ 80 FE
|
infloop .byt 0,0 ; to be filled w/ 80 FE
|
||||||
|
|
||||||
printloop_wram .byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
printloop_wram
|
||||||
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
@@ -34,7 +35,8 @@ printloop_wram .byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
|||||||
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
|
||||||
loprint_wram .byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
loprint_wram
|
||||||
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
|||||||
101
snes/const.a65
101
snes/const.a65
@@ -3,7 +3,7 @@ zero .word 0
|
|||||||
bg2tile .byt $20
|
bg2tile .byt $20
|
||||||
hdma_pal_src .byt 44
|
hdma_pal_src .byt 44
|
||||||
.byt $60, $2d
|
.byt $60, $2d
|
||||||
.byt 14
|
.byt 10
|
||||||
.byt $00, $00
|
.byt $00, $00
|
||||||
.byt 2
|
.byt 2
|
||||||
.byt $60, $2d
|
.byt $60, $2d
|
||||||
@@ -29,7 +29,7 @@ hdma_pal_src .byt 44
|
|||||||
.byt $20, $25
|
.byt $20, $25
|
||||||
.byt 11
|
.byt 11
|
||||||
.byt $40, $29
|
.byt $40, $29
|
||||||
.byt 31
|
.byt 29
|
||||||
.byt $60, $2d
|
.byt $60, $2d
|
||||||
.byt 2
|
.byt 2
|
||||||
.byt $20, $04
|
.byt $20, $04
|
||||||
@@ -69,11 +69,11 @@ hdma_cg_addr_src
|
|||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00
|
.byt $00
|
||||||
hdma_mode_src .byt 64, $03, $01, $05, $00
|
hdma_mode_src .byt 56, $03, $01, $05, $00
|
||||||
hdma_scroll_src .byt 64
|
hdma_scroll_src .byt 56
|
||||||
.byt $00, $00, $ff, $0f
|
.byt $00, $00, $ff, $03
|
||||||
.byt $01
|
.byt $01
|
||||||
.byt $fc, $00, $05, $00
|
.byt $fc, $00, $1f, $03
|
||||||
.byt $00
|
.byt $00
|
||||||
; colors:
|
; colors:
|
||||||
; upper border: + #547fff -> 10,15,31
|
; upper border: + #547fff -> 10,15,31
|
||||||
@@ -93,30 +93,31 @@ hdma_math_src .byt 1 ; these are filled in...
|
|||||||
.byt $00, $e0
|
.byt $00, $e0
|
||||||
.byt 0
|
.byt 0
|
||||||
|
|
||||||
oam_data_l .byt 75, 56, 31, $0e
|
oam_data_l .byt 88, 56, 0, $08
|
||||||
.byt 83, 56, 1, $0e
|
.byt 96, 56, 1, $08
|
||||||
.byt 91, 56, 2, $0e
|
.byt 104, 56, 2, $08
|
||||||
.byt 99, 56, 3, $0e
|
.byt 112, 56, 3, $08
|
||||||
.byt 107, 56, 4, $0e
|
.byt 120, 56, 4, $08
|
||||||
.byt 115, 56, 5, $0e
|
.byt 128, 56, 5, $08
|
||||||
.byt 123, 56, 6, $0e
|
.byt 136, 56, 6, $08
|
||||||
.byt 131, 56, 7, $0e
|
.byt 88, 64, 7, $08
|
||||||
.byt 75, 64, 8, $0e
|
.byt 96, 64, 8, $08
|
||||||
.byt 83, 64, 9, $0e
|
.byt 104, 64, 9, $08
|
||||||
.byt 91, 64, 10, $0e
|
.byt 112, 64, 10, $08
|
||||||
.byt 99, 64, 11, $0e
|
.byt 88, 72, 14, $08
|
||||||
.byt 107, 64, 12, $0e
|
.byt 96, 72, 15, $08
|
||||||
.byt 115, 64, 13, $0e
|
.byt 157, 56, 21, $0a
|
||||||
.byt 123, 64, 14, $0e
|
.byt 171, 56, 22, $0c
|
||||||
.byt 131, 64, 15, $0e
|
.byt 179, 56, 23, $0c
|
||||||
.byt 75, 72, 16, $0e
|
.byt 171, 64, 24, $0c
|
||||||
.byt 83, 72, 17, $0e
|
.byt 171, 72, 26, $0c
|
||||||
.byt 91, 72, 18, $0e
|
.byt 171, 80, 28, $0c
|
||||||
.byt 99, 72, 19, $0e
|
.byt 171, 88, 30, $0c
|
||||||
.byt 75, 80, 24, $0e
|
.byt 171, 96, 32, $0c
|
||||||
.byt 83, 80, 25, $0e
|
.byt 193, 56, 34, $0e
|
||||||
.byt 91, 80, 26, $0e
|
.byt 193, 64, 35, $0e
|
||||||
oam_data_h .byt 0, 0, 0, 0, 0, 0, 0, 0
|
.byt 193, 72, 36, $0e
|
||||||
|
oam_data_h .byt 0, 0, 0, 0, 0, 0, 0, 0, 0
|
||||||
|
|
||||||
space64 .byt $20, $20, $20, $20, $20, $20, $20, $20
|
space64 .byt $20, $20, $20, $20, $20, $20, $20, $20
|
||||||
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
.byt $20, $20, $20, $20, $20, $20, $20, $20
|
||||||
@@ -136,8 +137,10 @@ window_nh .byt 24
|
|||||||
window_sh .byt 25
|
window_sh .byt 25
|
||||||
window_wv .byt 26
|
window_wv .byt 26
|
||||||
window_ev .byt 27
|
window_ev .byt 27
|
||||||
text_clkset .byt 28,"Please set the clock.", 29,0
|
window_tl .byt 28
|
||||||
text_buttonB .byt "Dpad: sel/chg, B: OK", 0
|
window_tr .byt 29
|
||||||
|
text_clkset .byt "Please set the clock.", 0
|
||||||
|
text_buttonB .byt "Dpad: sel/chg, A: OK", 0
|
||||||
time_win_x .byt 18
|
time_win_x .byt 18
|
||||||
time_win_y .byt 15
|
time_win_y .byt 15
|
||||||
time_win_w .byt 27
|
time_win_w .byt 27
|
||||||
@@ -146,7 +149,15 @@ main_win_x .byt 18
|
|||||||
main_win_y .byt 11
|
main_win_y .byt 11
|
||||||
main_win_w .byt 27
|
main_win_w .byt 27
|
||||||
main_win_h .byt 13
|
main_win_h .byt 13
|
||||||
text_mainmenu .byt 28,"Main Menu", 29, 0
|
text_mainmenu .byt "Main Menu", 0
|
||||||
|
sysinfo_win_x .byt 10
|
||||||
|
sysinfo_win_y .byt 9
|
||||||
|
sysinfo_win_w .byt 43
|
||||||
|
sysinfo_win_h .byt 17
|
||||||
|
last_win_x .byt 2
|
||||||
|
last_win_y .byt 12
|
||||||
|
last_win_w .byt 60
|
||||||
|
last_win_h .byt 5
|
||||||
|
|
||||||
text_mm_file .byt "File Browser", 0
|
text_mm_file .byt "File Browser", 0
|
||||||
text_mm_last .byt "Run last game", 0
|
text_mm_last .byt "Run last game", 0
|
||||||
@@ -154,5 +165,27 @@ text_mm_time .byt "Set Clock", 0
|
|||||||
text_mm_scic .byt "Enable SuperCIC", 0
|
text_mm_scic .byt "Enable SuperCIC", 0
|
||||||
text_mm_vmode_menu .byt "Menu video mode", 0
|
text_mm_vmode_menu .byt "Menu video mode", 0
|
||||||
text_mm_vmode_game .byt "Game video mode", 0
|
text_mm_vmode_game .byt "Game video mode", 0
|
||||||
|
text_mm_sysinfo .byt "System Information", 0
|
||||||
|
text_statusbar_keys .byt "A:Select B:Back X:Menu", 0
|
||||||
|
text_last .byt "Run previous ROM: Press Start again to confirm", 0
|
||||||
|
text_system .byt "CPU Rev.: x PPU1 Rev.: y PPU2 Rev.: z",0
|
||||||
|
|
||||||
text_statusbar_keys .byt "B:Select A:Back X:Menu", 0
|
|
||||||
|
text_spcplay .byt "SPC Music Player", 0
|
||||||
|
spcplay_win_x .byt 15
|
||||||
|
spcplay_win_y .byt 15
|
||||||
|
spcplay_win_w .byt 33
|
||||||
|
spcplay_win_h .byt 5
|
||||||
|
|
||||||
|
text_spcload .byt "Loading SPC data to SPC700...", 0
|
||||||
|
text_spcstarta .byt "**** Now playing SPC tune ****", 0
|
||||||
|
text_spcstartb .byt "Name: ",0
|
||||||
|
text_spcstartc .byt "Song: ",0
|
||||||
|
text_spcstartd .byt "Artist:",0
|
||||||
|
|
||||||
|
spcstart_win_x .byt 10
|
||||||
|
spcstart_win_y .byt 13
|
||||||
|
spcstart_win_w .byt 44
|
||||||
|
spcstart_win_h .byt 9
|
||||||
|
|
||||||
|
text_spcid .byt "SNES-SPC700"
|
||||||
|
|||||||
@@ -1,19 +1,22 @@
|
|||||||
|
*=$7E0000
|
||||||
.data
|
.data
|
||||||
;don't anger the stack!
|
;don't anger the stack!
|
||||||
dirptr_addr .word 0
|
dirptr_addr .word 0
|
||||||
dirptr_bank .byt 0
|
dirptr_bank .word 0
|
||||||
dirstart_addr .word 0
|
dirstart_addr .word 0
|
||||||
dirstart_bank .byt 0
|
dirstart_bank .word 0
|
||||||
dirend_addr .word 0
|
dirend_addr .word 0
|
||||||
dirend_bank .byt 0
|
dirend_bank .word 0
|
||||||
dirend_idx .word 0
|
dirend_idx .word 0
|
||||||
dirptr_idx .word 0
|
dirptr_idx .word 0
|
||||||
dirent_addr .word 0
|
dirent_addr .word 0
|
||||||
dirent_bank .byt 0
|
dirent_bank .word 0
|
||||||
dirent_type .byt 0
|
dirent_type .byt 0
|
||||||
dirend_onscreen .byt 0
|
dirend_onscreen .byt 0
|
||||||
dirlog_idx .byt 0,0,0 ; long ptr
|
dirlog_idx .byt 0,0,0 ; long ptr
|
||||||
|
direntry_fits_idx
|
||||||
|
.byt 0,0
|
||||||
|
longptr .byt 0,0,0 ; general purpose long ptr
|
||||||
;----------parameters for text output----------
|
;----------parameters for text output----------
|
||||||
print_x .byt 0 ;x coordinate
|
print_x .byt 0 ;x coordinate
|
||||||
.byt 0
|
.byt 0
|
||||||
@@ -23,9 +26,10 @@ print_src .word 0 ;source data address
|
|||||||
print_bank .byt 0 ;source data bank
|
print_bank .byt 0 ;source data bank
|
||||||
print_pal .word 0 ;palette number for text output
|
print_pal .word 0 ;palette number for text output
|
||||||
print_temp .word 0 ;work variable
|
print_temp .word 0 ;work variable
|
||||||
print_count .byt 0 ;how many characters may be printed?
|
print_ptr .byt 0,0,0 ;read pointer
|
||||||
print_count_tmp .byt 0 ;work variable
|
print_count .word 0 ;how many characters may be printed?
|
||||||
print_done .word 0 ;how many characters were printed?
|
print_done .word 0 ;how many characters were printed?
|
||||||
|
print_over .byt 0 ;was the string printed incompletely?
|
||||||
;----------parameters for dma----------
|
;----------parameters for dma----------
|
||||||
dma_a_bank .byt 0
|
dma_a_bank .byt 0
|
||||||
dma_a_addr .word 0
|
dma_a_addr .word 0
|
||||||
@@ -77,6 +81,7 @@ time_y10 .byt 0
|
|||||||
time_y100 .byt 0
|
time_y100 .byt 0
|
||||||
time_sel .byt 0
|
time_sel .byt 0
|
||||||
time_exit .byt 0
|
time_exit .byt 0
|
||||||
|
time_cancel .byt 0
|
||||||
time_ptr .byt 0
|
time_ptr .byt 0
|
||||||
time_tmp .byt 0
|
time_tmp .byt 0
|
||||||
;--
|
;--
|
||||||
@@ -169,5 +174,27 @@ dirlog .word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
|||||||
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
|
||||||
|
direntry_fits
|
||||||
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
.byt 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
direntry_xscroll_state
|
||||||
|
.word 0
|
||||||
|
direntry_xscroll
|
||||||
|
.word 0
|
||||||
|
direntry_xscroll_wait
|
||||||
|
.word 0
|
||||||
infloop .byt 0,0 ; to be filled w/ 80 FE
|
infloop .byt 0,0 ; to be filled w/ 80 FE
|
||||||
|
tgt_bright
|
||||||
|
.byt 0
|
||||||
|
cur_bright
|
||||||
|
.byt 0
|
||||||
|
|
||||||
|
;------------------------
|
||||||
|
saved_sp
|
||||||
|
.word 0
|
||||||
|
warm_signature
|
||||||
|
.word 0
|
||||||
|
snes_system_config
|
||||||
|
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
|
||||||
wram_fadeloop .byt 0
|
wram_fadeloop .byt 0
|
||||||
|
|||||||
24
snes/dma.a65
24
snes/dma.a65
@@ -1,21 +1,4 @@
|
|||||||
|
|
||||||
dma0:
|
|
||||||
rep #$10 : .xl
|
|
||||||
sep #$20 : .as
|
|
||||||
lda dma_mode
|
|
||||||
sta $4300
|
|
||||||
lda dma_b_reg
|
|
||||||
sta $4301
|
|
||||||
lda dma_a_bank
|
|
||||||
ldx dma_a_addr
|
|
||||||
stx $4302
|
|
||||||
sta $4304
|
|
||||||
ldx dma_len
|
|
||||||
stx $4305
|
|
||||||
lda #$01
|
|
||||||
sta $420b
|
|
||||||
rts
|
|
||||||
|
|
||||||
setup_hdma:
|
setup_hdma:
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
rep #$10 : .xl
|
rep #$10 : .xl
|
||||||
@@ -67,8 +50,11 @@ setup_hdma:
|
|||||||
sty $4352
|
sty $4352
|
||||||
sta $4354
|
sta $4354
|
||||||
|
|
||||||
; lda #$06
|
lda #$3a
|
||||||
; sta $420c ;enable HDMA ch. 1+2
|
sta $420c ;enable HDMA ch. 1+3+4+5
|
||||||
|
jsr waitblank
|
||||||
|
lda #$3e
|
||||||
|
sta $420c ;enable HDMA ch. 2 too
|
||||||
lda #$81 ;VBlank NMI + Auto Joypad Read
|
lda #$81 ;VBlank NMI + Auto Joypad Read
|
||||||
sta $4200 ;enable V-BLANK NMI
|
sta $4200 ;enable V-BLANK NMI
|
||||||
rts
|
rts
|
||||||
|
|||||||
23
snes/dma.i65
23
snes/dma.i65
@@ -1,13 +1,22 @@
|
|||||||
|
#define hash #
|
||||||
|
#define f(x) x
|
||||||
|
#define imm(a) f(hash)a
|
||||||
|
|
||||||
#define DMA0(mode, len, a_bank, a_addr, b_reg)\
|
#define DMA0(mode, len, a_bank, a_addr, b_reg)\
|
||||||
lda mode \
|
php \
|
||||||
: sta dma_mode \
|
: sep imm($20) : .as \
|
||||||
|
: rep imm($10) : .xl \
|
||||||
|
: lda mode \
|
||||||
|
: sta $4300 \
|
||||||
: ldx a_addr \
|
: ldx a_addr \
|
||||||
: lda a_bank \
|
: lda a_bank \
|
||||||
: stx dma_a_addr \
|
: stx $4302 \
|
||||||
: sta dma_a_bank \
|
: sta $4304 \
|
||||||
: ldx len \
|
: ldx len \
|
||||||
: stx dma_len \
|
: stx $4305 \
|
||||||
: lda b_reg \
|
: lda b_reg \
|
||||||
: sta dma_b_reg \
|
: sta $4301 \
|
||||||
: jsr dma0
|
: lda imm($01) \
|
||||||
|
: sta $420b \
|
||||||
|
: plp
|
||||||
|
|
||||||
|
|||||||
2567
snes/font.a65
2567
snes/font.a65
File diff suppressed because it is too large
Load Diff
@@ -1,6 +1,16 @@
|
|||||||
; This file is part of the snescom-asm demo - a demo of how to build a SNES program.
|
; This file is a modified version of the header.a65 file from:
|
||||||
|
; snescom-asm demo - a demo of how to build a SNES program.
|
||||||
; See http://bisqwit.iki.fi/source/snescom.html for details.
|
; See http://bisqwit.iki.fi/source/snescom.html for details.
|
||||||
|
|
||||||
|
; fill whole area beforehand so the linker does not create multiple
|
||||||
|
; objects from it. (necessary for map creation)
|
||||||
|
|
||||||
|
*= $C0FF00
|
||||||
|
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
|
||||||
|
|
||||||
; Begin assembling to this address.
|
; Begin assembling to this address.
|
||||||
*= $C0FF00
|
*= $C0FF00
|
||||||
|
|
||||||
|
|||||||
3755
snes/logo.a65
3755
snes/logo.a65
File diff suppressed because it is too large
Load Diff
168
snes/logospr.a65
168
snes/logospr.a65
@@ -1,80 +1,69 @@
|
|||||||
logospr .byt $00, $00, $00, $00, $00, $00, $00, $00
|
logospr .byt $50, $2f, $75, $2a, $7e, $21, $4a, $14
|
||||||
|
.byt $6f, $3e, $5b, $1b, $60, $20, $54, $00
|
||||||
|
.byt $10, $0f, $15, $0a, $1f, $00, $3e, $01
|
||||||
|
.byt $1e, $01, $3a, $05, $01, $1e, $21, $1f
|
||||||
|
.byt $f4, $8f, $fc, $83, $7f, $84, $fe, $05
|
||||||
|
.byt $fe, $07, $fb, $07, $fe, $02, $fe, $00
|
||||||
|
.byt $0c, $8b, $08, $0f, $03, $04, $83, $80
|
||||||
|
.byt $03, $00, $07, $04, $00, $01, $01, $01
|
||||||
|
.byt $0f, $f8, $4f, $b8, $f7, $00, $b7, $58
|
||||||
|
.byt $af, $e0, $ff, $f0, $0f, $10, $df, $e0
|
||||||
|
.byt $08, $f8, $40, $b8, $f8, $08, $f8, $08
|
||||||
|
.byt $e0, $10, $f0, $10, $00, $e0, $c0, $c0
|
||||||
|
.byt $ff, $00, $fb, $00, $f9, $00, $f8, $00
|
||||||
|
.byt $f8, $00, $f0, $00, $f0, $00, $f0, $00
|
||||||
|
.byt $00, $01, $03, $03, $00, $00, $00, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $00, $ff, $00, $7f, $fe, $61, $eb, $0a
|
||||||
|
.byt $7f, $00, $1f, $00, $00, $00, $00, $00
|
||||||
|
.byt $00, $ff, $00, $ff, $3f, $40, $35, $39
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $0f, $e0, $1f, $c0, $bf, $c0, $ff, $00
|
||||||
|
.byt $ff, $00, $fe, $00, $70, $00, $00, $00
|
||||||
|
.byt $10, $e0, $60, $80, $c0, $c0, $00, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $f0, $00, $e0, $00, $e0, $00, $c0, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $7f, $2b, $5e, $1f, $7e, $3f, $6b, $2b
|
||||||
|
.byt $4f, $0f, $da, $1a, $c0, $22, $c0, $35
|
||||||
|
.byt $0a, $1e, $3e, $1e, $00, $1e, $14, $0a
|
||||||
|
.byt $30, $20, $25, $25, $1d, $1d, $0a, $0a
|
||||||
|
.byt $ff, $00, $ff, $00, $ff, $00, $ff, $00
|
||||||
|
.byt $ff, $00, $ff, $00, $ff, $00, $ff, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $ff, $00, $ff, $00, $83, $00, $00, $00
|
||||||
|
.byt $80, $00, $80, $00, $80, $00, $80, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $e0, $00, $e0, $00, $80, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $e0, $a0, $a1, $a0, $41, $80, $01, $c0
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $de, $3f, $9e, $7f, $bf, $7f, $bf, $7f
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $ff, $ff, $fe, $ff, $01, $fe, $00, $fe
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $ff, $00, $ff, $00, $ff, $00, $fe, $01
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $80, $80, $00, $80, $80, $80
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $ff, $7f, $7f, $7f, $7f, $7f, $7f, $ff
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $2f, $07, $13, $07, $11, $02, $48, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $df, $d8, $cb, $cc, $cd, $ce, $87, $86
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $ff, $ff, $ff, $ff, $00, $ff, $c5, $3b
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $ff, $00, $ff, $00, $ff, $00, $7f, $83
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $c0, $e0, $a0, $e0, $00, $00, $80, $80
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $ff, $0f, $ff, $3f, $7f, $bf, $7f, $ff
|
.byt $c0, $3f, $d5, $2a, $ff, $00, $7f, $00
|
||||||
|
.byt $7f, $00, $7f, $00, $3f, $00, $0f, $00
|
||||||
|
.byt $3f, $3f, $3f, $3f, $3f, $3f, $1e, $1e
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $04, $00, $08, $00, $10, $00, $10, $00
|
.byt $ff, $00, $ff, $00, $ff, $00, $ff, $00
|
||||||
|
.byt $ff, $00, $ff, $00, $fe, $00, $fc, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $f8, $f8, $f0, $f0, $e0, $e0, $e0, $e0
|
|
||||||
.byt $7f, $20, $7f, $20, $60, $00, $00, $20
|
|
||||||
.byt $00, $3f, $c0, $3f, $ff, $40, $ff, $00
|
|
||||||
.byt $3f, $20, $3f, $20, $20, $3f, $40, $7f
|
|
||||||
.byt $5f, $7f, $1f, $3f, $20, $7f, $20, $3f
|
|
||||||
.byt $c1, $01, $80, $00, $01, $01, $40, $40
|
|
||||||
.byt $00, $c0, $40, $c0, $c0, $40, $c0, $40
|
|
||||||
.byt $ff, $7f, $ff, $3e, $7e, $be, $3f, $bf
|
|
||||||
.byt $bf, $bf, $bf, $ff, $3f, $ff, $3f, $ff
|
|
||||||
.byt $ff, $00, $ff, $00, $01, $01, $01, $81
|
|
||||||
.byt $80, $fc, $5c, $4c, $00, $00, $18, $00
|
|
||||||
.byt $fe, $01, $ff, $01, $01, $ff, $00, $fe
|
|
||||||
.byt $3f, $fd, $bb, $db, $ff, $ff, $e7, $e7
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $c0, $c0
|
|
||||||
.byt $80, $80, $00, $00, $01, $00, $03, $00
|
|
||||||
.byt $ff, $ff, $ff, $ff, $ff, $ff, $3f, $ff
|
|
||||||
.byt $7f, $ff, $ff, $ff, $fe, $fe, $fc, $fc
|
|
||||||
.byt $46, $00, $41, $00, $40, $00, $40, $00
|
|
||||||
.byt $40, $00, $80, $00, $80, $00, $00, $00
|
|
||||||
.byt $81, $81, $80, $80, $80, $80, $80, $80
|
|
||||||
.byt $80, $80, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $44, $44, $00, $00, $78, $00, $03, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $bb, $83, $ff, $ff, $07, $07, $00, $00
|
.byt $80, $00, $80, $00, $80, $00, $80, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $80, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $03, $00, $fc, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $ff, $ff, $ff, $ff, $fc, $fc, $00, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $60, $00, $c0, $00, $00, $00, $00, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $80, $80, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $e0, $5f, $a0, $5f, $bf, $40, $bf, $60
|
|
||||||
.byt $bf, $7f, $bf, $7f, $80, $40, $00, $40
|
|
||||||
.byt $20, $7f, $20, $3f, $3f, $3f, $3f, $3f
|
|
||||||
.byt $3f, $3f, $3f, $3f, $3f, $00, $bf, $80
|
|
||||||
.byt $00, $80, $10, $c0, $c0, $40, $e0, $40
|
|
||||||
.byt $c0, $c0, $e0, $e0, $60, $60, $00, $40
|
|
||||||
.byt $7f, $ff, $2f, $af, $bf, $bf, $9f, $9f
|
|
||||||
.byt $bf, $bf, $9f, $bf, $9f, $3f, $bf, $3f
|
|
||||||
.byt $13, $00, $10, $00, $10, $00, $08, $00
|
|
||||||
.byt $08, $00, $08, $00, $08, $00, $00, $00
|
|
||||||
.byt $e0, $e0, $e0, $e0, $e0, $e0, $f0, $f0
|
|
||||||
.byt $f0, $f0, $f0, $f0, $f0, $f0, $f8, $f8
|
|
||||||
.byt $fc, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
@@ -93,36 +82,67 @@ logospr .byt $00, $00, $00, $00, $00, $00, $00, $00
|
|||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $20, $c0, $00, $80, $40, $c0, $40
|
||||||
.byt $3f, $7f, $3f, $7f, $c0, $7f, $80, $3f
|
.byt $00, $80, $40, $c0, $c0, $c0, $40, $00
|
||||||
.byt $3f, $3f, $1f, $1f, $00, $00, $00, $00
|
.byt $00, $20, $40, $00, $40, $00, $40, $00
|
||||||
.byt $80, $80, $80, $80, $00, $40, $40, $40
|
.byt $00, $40, $40, $00, $40, $00, $00, $40
|
||||||
.byt $40, $7f, $60, $7f, $3f, $3f, $1f, $1f
|
.byt $7b, $06, $3a, $47, $3e, $43, $4c, $41
|
||||||
.byt $80, $c0, $80, $c0, $00, $c0, $40, $c0
|
.byt $0f, $00, $1f, $10, $0f, $10, $1f, $10
|
||||||
.byt $80, $80, $00, $00, $00, $00, $00, $00
|
.byt $06, $01, $06, $01, $02, $01, $30, $03
|
||||||
.byt $3f, $3f, $3f, $3f, $3f, $3f, $3f, $7f
|
.byt $08, $02, $05, $00, $0b, $00, $05, $00
|
||||||
.byt $7f, $ff, $ff, $ff, $ff, $ff, $ff, $ff
|
.byt $fc, $02, $d8, $7c, $80, $00, $80, $00
|
||||||
.byt $08, $00, $08, $00, $08, $00, $00, $00
|
.byt $80, $40, $c0, $40, $80, $80, $00, $00
|
||||||
.byt $00, $00, $00, $00, $20, $00, $40, $00
|
.byt $00, $00, $00, $40, $40, $00, $40, $40
|
||||||
.byt $f0, $f0, $f0, $f0, $f0, $f0, $f0, $f0
|
.byt $80, $00, $00, $00, $00, $80, $80, $00
|
||||||
.byt $f0, $f0, $e0, $e0, $c0, $c0, $80, $80
|
.byt $07, $19, $0e, $10, $14, $1a, $18, $16
|
||||||
|
.byt $10, $0e, $02, $1c, $00, $1e, $10, $1e
|
||||||
|
.byt $0e, $08, $0e, $00, $0e, $0a, $0e, $06
|
||||||
|
.byt $1e, $1e, $0e, $0c, $0e, $0e, $0e, $0e
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $0b, $1f, $15, $1e, $1e, $1e, $06, $1e
|
||||||
|
.byt $0f, $1f, $1f, $0f, $0f, $0f, $0f, $0f
|
||||||
|
.byt $04, $0e, $0b, $0f, $01, $0f, $09, $0e
|
||||||
|
.byt $09, $0f, $14, $1f, $0a, $0f, $05, $0f
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $0f, $1f, $0f, $0f, $05, $05, $0a, $0a
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $0f, $0f, $1f, $1f, $1f, $05, $1f, $0a
|
||||||
|
.byt $1f, $08, $1f, $00, $1f, $0a, $1f, $15
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $02, $00, $10
|
||||||
|
.byt $00, $0e, $00, $15, $10, $0f, $10, $0f
|
||||||
|
.byt $1f, $1f, $1f, $1f, $1d, $1d, $0f, $0f
|
||||||
|
.byt $11, $11, $0a, $0a, $10, $10, $10, $10
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $0a, $05, $05, $0a, $0f, $00, $0f, $00
|
||||||
|
.byt $0f, $0a, $07, $05, $00, $00, $00, $00
|
||||||
|
.byt $0a, $0a, $05, $05, $0f, $0f, $0f, $0f
|
||||||
|
.byt $05, $05, $02, $02, $00, $00, $00, $00
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $5f, $2f, $5f, $2f, $70, $2f, $40, $1f
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
.byt $1f, $00, $1f, $00, $1f, $00, $3f, $00
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
||||||
|
.byt $09, $00, $01, $08, $0f, $08, $05, $00
|
||||||
|
.byt $03, $05, $07, $05, $00, $02, $06, $00
|
||||||
|
.byt $07, $00, $07, $00, $05, $02, $03, $00
|
||||||
|
.byt $04, $03, $05, $02, $00, $06, $00, $02
|
||||||
|
.byt $00, $06, $02, $04, $06, $04, $00, $02
|
||||||
|
.byt $02, $00, $00, $02, $02, $00, $02, $00
|
||||||
|
.byt $00, $02, $00, $02, $02, $06, $04, $06
|
||||||
|
.byt $06, $06, $04, $06, $06, $06, $06, $06
|
||||||
|
.byt $02, $04, $00, $06, $02, $04, $00, $06
|
||||||
|
.byt $06, $06, $04, $06, $00, $04, $00, $00
|
||||||
|
.byt $06, $06, $06, $06, $06, $06, $06, $06
|
||||||
|
.byt $06, $06, $06, $04, $04, $02, $00, $06
|
||||||
|
|||||||
213
snes/main.a65
213
snes/main.a65
@@ -4,13 +4,45 @@
|
|||||||
GAME_MAIN:
|
GAME_MAIN:
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda #$00
|
lda #$00
|
||||||
sta @AVR_CMD
|
sta @MCU_CMD ; clear MCU command register
|
||||||
rep #$20 : .al
|
rep #$20 : .al
|
||||||
lda #$0000
|
lda #$0000
|
||||||
sta @AVR_PARAM
|
sta @MCU_PARAM ; clear MCU command parameters
|
||||||
sta @AVR_PARAM+2
|
sta @MCU_PARAM+2
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
stz $4200 ; inhibit VBlank NMI
|
stz $4200 ; inhibit VBlank NMI
|
||||||
|
rep #$20 : .al
|
||||||
|
lda @warm_signature ; Was CMD_RESET issued before reset?
|
||||||
|
cmp #$fa50 ; If yes, then perform warm boot procedure
|
||||||
|
bne coldboot
|
||||||
|
lda #$0000
|
||||||
|
sta @warm_signature
|
||||||
|
lda @saved_sp ; Restore previous stack pointer
|
||||||
|
tcs
|
||||||
|
sep #$20 : .as
|
||||||
|
|
||||||
|
jsr killdma ; The following initialization processes must not touch memory
|
||||||
|
jsr waitblank ; structures used by the main menu !
|
||||||
|
jsr snes_init
|
||||||
|
cli
|
||||||
|
lda #$01
|
||||||
|
sta $420d ; fast cpu
|
||||||
|
jsr setup_gfx
|
||||||
|
jsr colortest
|
||||||
|
jsr tests
|
||||||
|
jsr setup_hdma
|
||||||
|
lda #$0f
|
||||||
|
sta cur_bright
|
||||||
|
sta tgt_bright
|
||||||
|
sta $2100
|
||||||
|
|
||||||
|
jmp @set_bank ; Set bios bank, just to be sure
|
||||||
|
set_bank:
|
||||||
|
plp ; Restore processor state
|
||||||
|
rts ; Jump to the routine which called the sub-routine issuing CMD_RESET
|
||||||
|
|
||||||
|
coldboot: ; Regular, cold-start init
|
||||||
|
sep #$20 : .as
|
||||||
jsr killdma
|
jsr killdma
|
||||||
jsr waitblank
|
jsr waitblank
|
||||||
jsr snes_init
|
jsr snes_init
|
||||||
@@ -18,9 +50,11 @@ GAME_MAIN:
|
|||||||
sta $420d ; fast cpu
|
sta $420d ; fast cpu
|
||||||
jsr setup_gfx
|
jsr setup_gfx
|
||||||
jsr colortest
|
jsr colortest
|
||||||
jsr setup_hdma
|
|
||||||
jsr menu_init
|
jsr menu_init
|
||||||
jsr tests
|
jsr tests
|
||||||
|
jsr setup_hdma
|
||||||
|
jsr screen_on
|
||||||
|
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda @RTC_STATUS
|
lda @RTC_STATUS
|
||||||
beq +
|
beq +
|
||||||
@@ -32,50 +66,93 @@ GAME_MAIN:
|
|||||||
jmp @infloop ;infinite loop in WRAM
|
jmp @infloop ;infinite loop in WRAM
|
||||||
|
|
||||||
killdma:
|
killdma:
|
||||||
stz $420b
|
stz $4300
|
||||||
stz $420c
|
stz $4301
|
||||||
|
stz $4302
|
||||||
|
stz $4303
|
||||||
|
stz $4304
|
||||||
|
stz $4305
|
||||||
|
stz $4306
|
||||||
|
stz $4307
|
||||||
|
stz $4308
|
||||||
|
stz $4309
|
||||||
|
stz $430a
|
||||||
|
stz $430b
|
||||||
stz $4310
|
stz $4310
|
||||||
stz $4311
|
stz $4311
|
||||||
stz $4312
|
stz $4312
|
||||||
stz $4313
|
stz $4313
|
||||||
stz $4314
|
stz $4314
|
||||||
|
stz $4315
|
||||||
|
stz $4316
|
||||||
|
stz $4317
|
||||||
|
stz $4318
|
||||||
|
stz $4319
|
||||||
|
stz $431a
|
||||||
|
stz $431b
|
||||||
stz $4320
|
stz $4320
|
||||||
stz $4321
|
stz $4321
|
||||||
stz $4322
|
stz $4322
|
||||||
stz $4323
|
stz $4323
|
||||||
stz $4324
|
stz $4324
|
||||||
|
stz $4325
|
||||||
|
stz $4326
|
||||||
|
stz $4327
|
||||||
|
stz $4328
|
||||||
|
stz $4329
|
||||||
|
stz $432a
|
||||||
|
stz $432b
|
||||||
stz $4330
|
stz $4330
|
||||||
stz $4331
|
stz $4331
|
||||||
stz $4332
|
stz $4332
|
||||||
stz $4333
|
stz $4333
|
||||||
stz $4334
|
stz $4334
|
||||||
|
stz $4335
|
||||||
|
stz $4336
|
||||||
|
stz $4337
|
||||||
|
stz $4338
|
||||||
|
stz $4339
|
||||||
|
stz $433a
|
||||||
|
stz $433b
|
||||||
stz $4340
|
stz $4340
|
||||||
stz $4341
|
stz $4341
|
||||||
stz $4342
|
stz $4342
|
||||||
stz $4343
|
stz $4343
|
||||||
stz $4344
|
stz $4344
|
||||||
|
stz $4345
|
||||||
|
stz $4346
|
||||||
|
stz $4347
|
||||||
|
stz $4348
|
||||||
|
stz $4349
|
||||||
|
stz $434a
|
||||||
|
stz $434b
|
||||||
stz $4350
|
stz $4350
|
||||||
stz $4351
|
stz $4351
|
||||||
stz $4352
|
stz $4352
|
||||||
stz $4353
|
stz $4353
|
||||||
stz $4354
|
stz $4354
|
||||||
stz $4360
|
stz $4355
|
||||||
stz $4361
|
stz $4356
|
||||||
stz $4362
|
stz $4357
|
||||||
stz $4363
|
stz $4358
|
||||||
stz $4364
|
stz $4359
|
||||||
|
stz $435a
|
||||||
|
stz $435b
|
||||||
|
|
||||||
|
stz $420b
|
||||||
|
stz $420c
|
||||||
rts
|
rts
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
waitblank:
|
waitblank:
|
||||||
|
php
|
||||||
|
sep #$30 : .as : .xs
|
||||||
- lda $4212
|
- lda $4212
|
||||||
and #$80
|
and #$80
|
||||||
bne -
|
bne -
|
||||||
- lda $4212
|
- lda $4212
|
||||||
and #$80
|
and #$80
|
||||||
beq -
|
beq -
|
||||||
|
plp
|
||||||
rts
|
rts
|
||||||
|
|
||||||
colortest:
|
colortest:
|
||||||
@@ -91,21 +168,14 @@ setup_gfx:
|
|||||||
stz $420b
|
stz $420b
|
||||||
stz $420c
|
stz $420c
|
||||||
;clear tilemap buffers
|
;clear tilemap buffers
|
||||||
ldx #$0000
|
ldx #$8000
|
||||||
stx $2181
|
stx $2181
|
||||||
lda #$01
|
lda #$00
|
||||||
sta $2183
|
sta $2183
|
||||||
DMA0(#$08, #0, #^zero, #!zero, #$80)
|
DMA0(#$08, #$8000, #^zero, #!zero, #$80)
|
||||||
|
|
||||||
;copy 2bpp font (can be used as 4-bit lores font!)
|
;generate fonts
|
||||||
ldx #$4000
|
jsr genfonts
|
||||||
stx $2116
|
|
||||||
DMA0(#$01, #$2000, #^font2, #!font2, #$18)
|
|
||||||
|
|
||||||
;copy 4bpp font
|
|
||||||
ldx #$0000
|
|
||||||
stx $2116
|
|
||||||
DMA0(#$01, #$4000, #^font4, #!font4, #$18)
|
|
||||||
|
|
||||||
;clear BG1 tilemap
|
;clear BG1 tilemap
|
||||||
ldx #BG1_TILE_BASE
|
ldx #BG1_TILE_BASE
|
||||||
@@ -127,27 +197,33 @@ setup_gfx:
|
|||||||
stx $2116
|
stx $2116
|
||||||
DMA0(#$01, #$4000, #^logo, #!logo, #$18)
|
DMA0(#$01, #$4000, #^logo, #!logo, #$18)
|
||||||
|
|
||||||
;copy logo tilemap
|
;generate logo tilemap
|
||||||
ldx #BG1_TILE_BASE
|
ldx #BG1_TILE_BASE
|
||||||
stx $2116
|
stx $2116
|
||||||
DMA0(#$01, #$280, #^logomap, #!logomap, #$18)
|
ldx #$0100
|
||||||
|
- stx $2118
|
||||||
|
inx
|
||||||
|
cpx #$01e0
|
||||||
|
bne -
|
||||||
|
|
||||||
|
|
||||||
;copy sprites tiles
|
;copy sprites tiles
|
||||||
ldx #OAM_TILE_BASE
|
ldx #OAM_TILE_BASE
|
||||||
stx $2116
|
stx $2116
|
||||||
DMA0(#$01, #$400, #^logospr, #!logospr, #$18)
|
DMA0(#$01, #$500, #^logospr, #!logospr, #$18)
|
||||||
|
|
||||||
;set OAM tables
|
;set OAM tables
|
||||||
ldx #$0000
|
ldx #$0000
|
||||||
stx $2102
|
stx $2102
|
||||||
DMA0(#$00, #$5C, #^oam_data_l, #!oam_data_l, #$04)
|
DMA0(#$00, #$60, #^oam_data_l, #!oam_data_l, #$04)
|
||||||
ldx #$0100
|
ldx #$0100
|
||||||
stx $2102
|
stx $2102
|
||||||
DMA0(#$00, #$08, #^oam_data_h, #!oam_data_h, #$04)
|
DMA0(#$00, #$09, #^oam_data_h, #!oam_data_h, #$04)
|
||||||
|
|
||||||
;set palette
|
;set palette
|
||||||
stz $2121
|
stz $2121
|
||||||
DMA0(#$00, #$200, #^palette, #!palette, #$22)
|
DMA0(#$00, #$200, #^palette, #!palette, #$22)
|
||||||
|
stz $2121
|
||||||
|
|
||||||
;copy hdma tables so we can work "without" the cartridge
|
;copy hdma tables so we can work "without" the cartridge
|
||||||
;palette
|
;palette
|
||||||
@@ -200,7 +276,7 @@ setup_gfx:
|
|||||||
tests:
|
tests:
|
||||||
sep #$20 : .as ;8-bit accumulator
|
sep #$20 : .as ;8-bit accumulator
|
||||||
rep #$10 : .xl ;16-bit index
|
rep #$10 : .xl ;16-bit index
|
||||||
lda #$03 ;mode 3, mode 5 via HDMA :D
|
lda #$03 ;mode 3, mode 5 via HDMA
|
||||||
sta $2105
|
sta $2105
|
||||||
lda #$58 ;Tilemap addr 0xB000
|
lda #$58 ;Tilemap addr 0xB000
|
||||||
ora #$02 ;SC size 32x64
|
ora #$02 ;SC size 32x64
|
||||||
@@ -226,11 +302,17 @@ tests:
|
|||||||
lda #$1f
|
lda #$1f
|
||||||
sta $212e
|
sta $212e
|
||||||
sta $212f
|
sta $212f
|
||||||
stz $2121
|
; stz $2121
|
||||||
lda #$0f
|
lda #8
|
||||||
sta $2100 ;screen on, full brightness
|
|
||||||
lda #9
|
|
||||||
sta bar_yl
|
sta bar_yl
|
||||||
|
stz cur_bright
|
||||||
|
stz tgt_bright
|
||||||
|
rts
|
||||||
|
|
||||||
|
screen_on:
|
||||||
|
stz $2100 ;screen on, 0% brightness
|
||||||
|
lda #$0f
|
||||||
|
sta tgt_bright
|
||||||
rts
|
rts
|
||||||
|
|
||||||
snes_init:
|
snes_init:
|
||||||
@@ -250,6 +332,7 @@ snes_init:
|
|||||||
stz $420a ;
|
stz $420a ;
|
||||||
stz $420b ;
|
stz $420b ;
|
||||||
stz $420c ;
|
stz $420c ;
|
||||||
|
stz $420d ;
|
||||||
lda #$8f
|
lda #$8f
|
||||||
sta $2100 ;INIDISP: force blank
|
sta $2100 ;INIDISP: force blank
|
||||||
lda #$03 ; 8x8+16x16; name=0; base=3
|
lda #$03 ; 8x8+16x16; name=0; base=3
|
||||||
@@ -341,7 +424,7 @@ snes_init:
|
|||||||
|
|
||||||
fadeloop:
|
fadeloop:
|
||||||
sep #$30 : .as : .xs
|
sep #$30 : .as : .xs
|
||||||
ldx #$0f
|
ldx cur_bright
|
||||||
and #$00
|
and #$00
|
||||||
pha
|
pha
|
||||||
plb
|
plb
|
||||||
@@ -387,3 +470,59 @@ fadeloop_start
|
|||||||
|
|
||||||
fadeloop_end:
|
fadeloop_end:
|
||||||
.byt $ff
|
.byt $ff
|
||||||
|
|
||||||
|
genfonts:
|
||||||
|
php
|
||||||
|
rep #$10 : .xl
|
||||||
|
sep #$20 : .as
|
||||||
|
|
||||||
|
;clear VRAM font areas
|
||||||
|
ldx #$0000
|
||||||
|
stx $2116
|
||||||
|
DMA0(#$09, #$4000, #^zero, #!zero, #$18)
|
||||||
|
|
||||||
|
ldx #$4000
|
||||||
|
stx $2116
|
||||||
|
DMA0(#$09, #$2000, #^zero, #!zero, #$18)
|
||||||
|
|
||||||
|
sep #$10 : .xs
|
||||||
|
rep #$20 : .al
|
||||||
|
|
||||||
|
stz $2116
|
||||||
|
ldx #$01
|
||||||
|
stx $4300
|
||||||
|
ldx #^font
|
||||||
|
stx $4304
|
||||||
|
lda #!font
|
||||||
|
sta $4302
|
||||||
|
lda #$0010
|
||||||
|
sta $4305
|
||||||
|
ldx #$18
|
||||||
|
stx $4301
|
||||||
|
lda #$0000
|
||||||
|
- sta $2116
|
||||||
|
ldx #$10
|
||||||
|
stx $4305
|
||||||
|
ldx #$01
|
||||||
|
stx $420b
|
||||||
|
clc
|
||||||
|
adc #$20
|
||||||
|
cmp #$2000
|
||||||
|
bne -
|
||||||
|
ldx #^font
|
||||||
|
stx $4304
|
||||||
|
lda #!font
|
||||||
|
sta $4302
|
||||||
|
lda #$4000
|
||||||
|
- sta $2116
|
||||||
|
ldx #$10
|
||||||
|
stx $4305
|
||||||
|
ldx #$01
|
||||||
|
stx $420b
|
||||||
|
clc
|
||||||
|
adc #$10
|
||||||
|
cmp #$5000
|
||||||
|
bne -
|
||||||
|
plp
|
||||||
|
rts
|
||||||
|
|
||||||
|
|||||||
@@ -1,6 +1,6 @@
|
|||||||
#include "memmap.i65"
|
#include "memmap.i65"
|
||||||
;number of menu entries
|
;number of menu entries
|
||||||
main_entries .byt 1
|
main_entries .byt 2
|
||||||
;menu entry data
|
;menu entry data
|
||||||
main_enttab ;Set Clock
|
main_enttab ;Set Clock
|
||||||
.word !text_mm_time
|
.word !text_mm_time
|
||||||
@@ -8,6 +8,11 @@ main_enttab ;Set Clock
|
|||||||
.word !time_init-1
|
.word !time_init-1
|
||||||
.byt ^time_init
|
.byt ^time_init
|
||||||
.byt 1, 0
|
.byt 1, 0
|
||||||
|
;System Information
|
||||||
|
.word !text_mm_sysinfo
|
||||||
|
.byt ^text_mm_sysinfo
|
||||||
|
.word !show_sysinfo-1
|
||||||
|
.byt ^show_sysinfo
|
||||||
;SuperCIC
|
;SuperCIC
|
||||||
.word !text_mm_scic
|
.word !text_mm_scic
|
||||||
.byt ^text_mm_scic
|
.byt ^text_mm_scic
|
||||||
@@ -115,13 +120,13 @@ mm_menuloop
|
|||||||
and pad1trig+1
|
and pad1trig+1
|
||||||
bne mmkey_b
|
bne mmkey_b
|
||||||
bra mm_menuloop
|
bra mm_menuloop
|
||||||
mmkey_a
|
mmkey_b
|
||||||
jsr restore_screen
|
jsr restore_screen
|
||||||
plp
|
plp
|
||||||
rts
|
rts
|
||||||
|
|
||||||
mmkey_b
|
mmkey_a
|
||||||
jsr mmkey_b_2
|
jsr mmkey_a_2
|
||||||
jmp mm_redraw
|
jmp mm_redraw
|
||||||
|
|
||||||
mmkey_down
|
mmkey_down
|
||||||
@@ -151,10 +156,10 @@ mmkey_up_2
|
|||||||
+
|
+
|
||||||
rts
|
rts
|
||||||
|
|
||||||
mmkey_b_2
|
mmkey_a_2
|
||||||
jsr restore_screen
|
jsr restore_screen
|
||||||
phk ; push return bank for subroutine
|
phk ; push return bank for subroutine
|
||||||
per mmkey_b_2_return-1 ; push return addr for subroutine
|
per mmkey_a_2_return-1 ; push return addr for subroutine
|
||||||
xba
|
xba
|
||||||
lda #$00
|
lda #$00
|
||||||
xba
|
xba
|
||||||
@@ -170,7 +175,7 @@ mmkey_b_2
|
|||||||
pha ; push subroutine addr
|
pha ; push subroutine addr
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
rtl ; jump to subroutine
|
rtl ; jump to subroutine
|
||||||
mmkey_b_2_return
|
mmkey_a_2_return
|
||||||
rts
|
rts
|
||||||
|
|
||||||
mm_do_refresh
|
mm_do_refresh
|
||||||
|
|||||||
@@ -6,19 +6,35 @@
|
|||||||
/* These must be defined as constants, because they're used
|
/* These must be defined as constants, because they're used
|
||||||
* in calculation that is sent to PPU as parameters */
|
* in calculation that is sent to PPU as parameters */
|
||||||
|
|
||||||
|
#define APUIO0 $2140
|
||||||
|
#define APUIO1 $2141
|
||||||
|
#define APUIO2 $2142
|
||||||
|
#define APUIO3 $2143
|
||||||
|
|
||||||
#define BG1_TILE_BASE $5800
|
#define BG1_TILE_BASE $5800
|
||||||
#define BG2_TILE_BASE $5000
|
#define BG2_TILE_BASE $5000
|
||||||
|
|
||||||
#define OAM_TILE_BASE $6000
|
#define OAM_TILE_BASE $6000
|
||||||
|
|
||||||
#define BG1_TILE_BUF $7FB000
|
#define BG1_TILE_BUF $7EB000
|
||||||
#define BG2_TILE_BUF $7FA000
|
#define BG2_TILE_BUF $7EA000
|
||||||
|
|
||||||
#define BG1_TILE_BAK $7F9000
|
#define BG1_TILE_BAK $7E9000
|
||||||
#define BG2_TILE_BAK $7F8000
|
#define BG2_TILE_BAK $7E8000
|
||||||
|
|
||||||
#define AVR_CMD $307000
|
#define MCU_CMD $307000
|
||||||
#define AVR_PARAM $307004
|
#define MCU_PARAM $307004
|
||||||
#define RTC_STATUS $307100
|
#define RTC_STATUS $307100
|
||||||
|
#define LAST_STATUS $307101
|
||||||
|
#define SYSINFO_BLK $307200
|
||||||
|
#define LAST_GAME $307420
|
||||||
|
|
||||||
#define ROOT_DIR $C10000
|
#define ROOT_DIR $C10000
|
||||||
|
|
||||||
|
#define CMD_SYSINFO $03
|
||||||
|
#define CMD_LOADSPC $05
|
||||||
|
#define CMD_RESET $06
|
||||||
|
|
||||||
|
#define SPC_DATA $FD0000
|
||||||
|
#define SPC_HEADER $FE0000
|
||||||
|
#define SPC_DSP_REGS $FE0100
|
||||||
|
|||||||
314
snes/menu.a65
314
snes/menu.a65
@@ -23,6 +23,8 @@ menu_init:
|
|||||||
ldx #$0000
|
ldx #$0000
|
||||||
stx dirptr_idx
|
stx dirptr_idx
|
||||||
stx menu_sel
|
stx menu_sel
|
||||||
|
stx direntry_xscroll
|
||||||
|
stx direntry_xscroll_state
|
||||||
lda #$01
|
lda #$01
|
||||||
sta menu_dirty
|
sta menu_dirty
|
||||||
rep #$20 : .al
|
rep #$20 : .al
|
||||||
@@ -40,13 +42,13 @@ menuloop_s1
|
|||||||
lda isr_done
|
lda isr_done
|
||||||
lsr
|
lsr
|
||||||
bcc menuloop_s1
|
bcc menuloop_s1
|
||||||
|
|
||||||
stz isr_done
|
stz isr_done
|
||||||
jsr printtime
|
jsr printtime
|
||||||
jsr menu_updates ;update stuff, check keys etc
|
jsr menu_updates ;update stuff, check keys etc
|
||||||
lda menu_dirty ;is there ANY reason to redraw the menu?
|
lda menu_dirty ;is there ANY reason to redraw the menu?
|
||||||
cmp #$01
|
cmp #$01
|
||||||
beq menuloop_redraw ;then do
|
beq menuloop_redraw ;then do
|
||||||
|
jsr scroll_direntry
|
||||||
bra menuloop_s1
|
bra menuloop_s1
|
||||||
menuloop_redraw
|
menuloop_redraw
|
||||||
stz menu_dirty
|
stz menu_dirty
|
||||||
@@ -126,6 +128,9 @@ menu_updates:
|
|||||||
lda #$80
|
lda #$80
|
||||||
and pad1trig+1
|
and pad1trig+1
|
||||||
bne key_b
|
bne key_b
|
||||||
|
lda #$10
|
||||||
|
and pad1trig+1
|
||||||
|
bne key_start
|
||||||
lda #$20
|
lda #$20
|
||||||
and pad1trig+1
|
and pad1trig+1
|
||||||
bne key_select
|
bne key_select
|
||||||
@@ -157,10 +162,12 @@ key_a
|
|||||||
key_x
|
key_x
|
||||||
jsr menu_key_x
|
jsr menu_key_x
|
||||||
bra menuupd_out
|
bra menuupd_out
|
||||||
|
|
||||||
key_select
|
key_select
|
||||||
jsr menu_key_select
|
jsr menu_key_select
|
||||||
bra menuupd_out
|
bra menuupd_out
|
||||||
|
key_start
|
||||||
|
jsr menu_key_start
|
||||||
|
bra menuupd_out
|
||||||
|
|
||||||
menuupd_out
|
menuupd_out
|
||||||
lda #$09
|
lda #$09
|
||||||
@@ -179,6 +186,7 @@ menu_redraw_out
|
|||||||
redraw_filelist
|
redraw_filelist
|
||||||
ldy #$0000
|
ldy #$0000
|
||||||
sty dirptr_idx
|
sty dirptr_idx
|
||||||
|
sty direntry_fits_idx
|
||||||
stz dirend_idx
|
stz dirend_idx
|
||||||
stz dirend_onscreen
|
stz dirend_onscreen
|
||||||
redraw_filelist_loop
|
redraw_filelist_loop
|
||||||
@@ -188,52 +196,43 @@ redraw_filelist_loop
|
|||||||
lsr
|
lsr
|
||||||
cmp listdisp
|
cmp listdisp
|
||||||
beq redraw_filelist_last
|
beq redraw_filelist_last
|
||||||
lda dirptr_bank
|
|
||||||
phb
|
|
||||||
pha
|
|
||||||
plb
|
|
||||||
rep #$20 : .al
|
rep #$20 : .al
|
||||||
lda (dirptr_addr), y
|
lda [dirptr_addr], y
|
||||||
sta @dirent_addr
|
sta @dirent_addr
|
||||||
iny
|
iny
|
||||||
iny
|
iny
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda (dirptr_addr), y ; load fileinfo bank
|
lda [dirptr_addr], y ; load fileinfo bank
|
||||||
clc
|
clc
|
||||||
adc #$c0 ; add $C0 for memory map
|
adc #$c0 ; add $C0 for memory map
|
||||||
sta @dirent_bank ; store as current bank
|
sta @dirent_bank ; store as current bank
|
||||||
cmp #$c0 ; if bank was 0 -> dirend entry in DB
|
cmp #$c0 ; if bank was 0 -> dirend entry in DB
|
||||||
beq redraw_filelist_dirend ; handle dirend
|
beq redraw_filelist_dirend ; handle dirend
|
||||||
iny
|
iny
|
||||||
lda (dirptr_addr), y
|
lda [dirptr_addr], y
|
||||||
iny
|
iny
|
||||||
sta @dirent_type
|
sta @dirent_type
|
||||||
plb
|
|
||||||
sty dirptr_idx
|
sty dirptr_idx
|
||||||
jsr print_direntry
|
jsr print_direntry
|
||||||
|
inc direntry_fits_idx
|
||||||
bra redraw_filelist_loop
|
bra redraw_filelist_loop
|
||||||
redraw_filelist_dirend
|
redraw_filelist_dirend
|
||||||
plb
|
|
||||||
dey ; recover last valid direntry number
|
dey ; recover last valid direntry number
|
||||||
dey ; (we had 2x iny of the direntry pointer above,
|
dey ; (we had 2x iny of the direntry pointer above,
|
||||||
|
beq +
|
||||||
dey ; so account for those too)
|
dey ; so account for those too)
|
||||||
dey
|
dey
|
||||||
dey
|
dey
|
||||||
dey
|
dey
|
||||||
sty dirend_idx ; dirend_idx <- last valid directory entry.
|
+ sty dirend_idx ; dirend_idx <- last valid directory entry.
|
||||||
lda #$01 ; encountered during redraw, so must be on screen
|
lda #$01 ; encountered during redraw, so must be on screen
|
||||||
sta dirend_onscreen
|
sta dirend_onscreen
|
||||||
bra redraw_filelist_out
|
bra redraw_filelist_out
|
||||||
redraw_filelist_last ;check if next offscreen item is end of dir
|
redraw_filelist_last ;check if next offscreen item is end of dir
|
||||||
lda dirptr_bank
|
|
||||||
phb
|
|
||||||
pha
|
|
||||||
plb
|
|
||||||
iny
|
iny
|
||||||
iny
|
iny
|
||||||
lda (dirptr_addr), y
|
lda [dirptr_addr], y
|
||||||
beq redraw_filelist_dirend
|
beq redraw_filelist_dirend
|
||||||
plb
|
|
||||||
redraw_filelist_out
|
redraw_filelist_out
|
||||||
ldx #$0000
|
ldx #$0000
|
||||||
stx dirptr_idx
|
stx dirptr_idx
|
||||||
@@ -272,6 +271,10 @@ dirent_is_file
|
|||||||
lda #$0000
|
lda #$0000
|
||||||
bra dirent_type_cont
|
bra dirent_type_cont
|
||||||
+
|
+
|
||||||
|
cmp #$0003 ;SPC -> palette 2
|
||||||
|
bne +
|
||||||
|
lda #$0002
|
||||||
|
bra dirent_type_cont
|
||||||
cmp #$0004 ;IPS -> palette 2 (green)
|
cmp #$0004 ;IPS -> palette 2 (green)
|
||||||
bne +
|
bne +
|
||||||
lda #$0002
|
lda #$0002
|
||||||
@@ -294,6 +297,8 @@ dirent_type_cont
|
|||||||
txa
|
txa
|
||||||
clc
|
clc
|
||||||
adc @fd_fnoff
|
adc @fd_fnoff
|
||||||
|
clc
|
||||||
|
adc @direntry_xscroll
|
||||||
sta @fd_fnoff
|
sta @fd_fnoff
|
||||||
plb
|
plb
|
||||||
|
|
||||||
@@ -308,12 +313,14 @@ dirent_type_cont
|
|||||||
lda dirent_bank
|
lda dirent_bank
|
||||||
sta print_bank
|
sta print_bank
|
||||||
jsr hiprint
|
jsr hiprint
|
||||||
|
|
||||||
lda cursor_x
|
lda cursor_x
|
||||||
clc
|
clc
|
||||||
adc print_done
|
adc print_done
|
||||||
sta print_x
|
sta print_x
|
||||||
|
|
||||||
|
lda print_over
|
||||||
|
ldy direntry_fits_idx
|
||||||
|
sta !direntry_fits, y
|
||||||
lda #54
|
lda #54
|
||||||
sec
|
sec
|
||||||
sbc print_done
|
sbc print_done
|
||||||
@@ -349,10 +356,11 @@ dirent_type_cont_2
|
|||||||
rts
|
rts
|
||||||
|
|
||||||
menu_key_down:
|
menu_key_down:
|
||||||
|
jsr scroll_direntry_clean
|
||||||
lda listdisp
|
lda listdisp
|
||||||
dec
|
dec
|
||||||
cmp menu_sel
|
cmp menu_sel
|
||||||
bne +
|
bne down_noscroll
|
||||||
lda #$01
|
lda #$01
|
||||||
sta menu_dirty
|
sta menu_dirty
|
||||||
lda dirend_onscreen
|
lda dirend_onscreen
|
||||||
@@ -361,10 +369,13 @@ menu_key_down:
|
|||||||
lda dirptr_addr
|
lda dirptr_addr
|
||||||
clc
|
clc
|
||||||
adc #$04
|
adc #$04
|
||||||
sta dirptr_addr
|
bcc +
|
||||||
|
inc dirptr_bank
|
||||||
|
+ sta dirptr_addr
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
rts
|
rts
|
||||||
+ lda dirend_onscreen
|
down_noscroll
|
||||||
|
lda dirend_onscreen
|
||||||
beq +
|
beq +
|
||||||
lda dirend_idx
|
lda dirend_idx
|
||||||
lsr
|
lsr
|
||||||
@@ -379,8 +390,9 @@ down_out
|
|||||||
rts
|
rts
|
||||||
|
|
||||||
menu_key_up:
|
menu_key_up:
|
||||||
|
jsr scroll_direntry_clean
|
||||||
lda menu_sel
|
lda menu_sel
|
||||||
bne +
|
bne up_noscroll
|
||||||
lda #$01
|
lda #$01
|
||||||
sta menu_dirty
|
sta menu_dirty
|
||||||
rep #$20 : .al
|
rep #$20 : .al
|
||||||
@@ -389,15 +401,19 @@ menu_key_up:
|
|||||||
beq up_out
|
beq up_out
|
||||||
sec
|
sec
|
||||||
sbc #$04
|
sbc #$04
|
||||||
sta dirptr_addr
|
bcs +
|
||||||
|
dec dirptr_bank
|
||||||
|
+ sta dirptr_addr
|
||||||
bra up_out
|
bra up_out
|
||||||
+ dec
|
up_noscroll
|
||||||
|
dec
|
||||||
sta menu_sel
|
sta menu_sel
|
||||||
up_out
|
up_out
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
rts
|
rts
|
||||||
|
|
||||||
menuupd_lastcursor
|
menuupd_lastcursor
|
||||||
|
jsr scroll_direntry_clean
|
||||||
lda dirend_idx
|
lda dirend_idx
|
||||||
lsr
|
lsr
|
||||||
lsr
|
lsr
|
||||||
@@ -406,6 +422,8 @@ menuupd_lastcursor
|
|||||||
|
|
||||||
; go back one page
|
; go back one page
|
||||||
menu_key_left:
|
menu_key_left:
|
||||||
|
stz direntry_xscroll
|
||||||
|
stz direntry_xscroll_state
|
||||||
lda #$01 ; must redraw afterwards
|
lda #$01 ; must redraw afterwards
|
||||||
sta menu_dirty
|
sta menu_dirty
|
||||||
rep #$20 : .al
|
rep #$20 : .al
|
||||||
@@ -431,6 +449,8 @@ menu_key_left:
|
|||||||
|
|
||||||
; go forth one page
|
; go forth one page
|
||||||
menu_key_right:
|
menu_key_right:
|
||||||
|
stz direntry_xscroll
|
||||||
|
stz direntry_xscroll_state
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda dirend_onscreen
|
lda dirend_onscreen
|
||||||
bne menuupd_lastcursor
|
bne menuupd_lastcursor
|
||||||
@@ -446,29 +466,28 @@ menu_key_right:
|
|||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
rts
|
rts
|
||||||
|
|
||||||
menu_key_b:
|
menu_key_a:
|
||||||
jsr select_item
|
jsr select_item
|
||||||
rts
|
rts
|
||||||
|
|
||||||
menu_key_select:
|
menu_key_select:
|
||||||
lda barstep
|
|
||||||
beq do_setup448
|
|
||||||
do_setup224
|
|
||||||
jsr setup_224
|
|
||||||
rts
|
|
||||||
do_setup448
|
|
||||||
jsr setup_448
|
|
||||||
rts
|
rts
|
||||||
|
|
||||||
menu_key_a:
|
menu_key_start:
|
||||||
|
jsr select_last_file
|
||||||
|
rts
|
||||||
|
|
||||||
|
menu_key_b:
|
||||||
|
stz direntry_xscroll
|
||||||
|
stz direntry_xscroll_state
|
||||||
rep #$20 : .al
|
rep #$20 : .al
|
||||||
lda dirstart_addr
|
lda dirstart_addr
|
||||||
beq skip_key_a
|
beq skip_key_b
|
||||||
sta dirptr_addr
|
sta dirptr_addr
|
||||||
lda #$0000
|
lda #$0000
|
||||||
sta menu_sel
|
sta menu_sel
|
||||||
bra select_item
|
bra select_item
|
||||||
skip_key_a
|
skip_key_b
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
rts
|
rts
|
||||||
|
|
||||||
@@ -480,16 +499,14 @@ select_item:
|
|||||||
asl
|
asl
|
||||||
tay
|
tay
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda dirptr_bank
|
|
||||||
phb
|
|
||||||
pha
|
|
||||||
plb
|
|
||||||
iny
|
iny
|
||||||
iny
|
iny
|
||||||
iny
|
iny
|
||||||
lda (dirptr_addr), y
|
lda [dirptr_addr], y
|
||||||
cmp #$01
|
cmp #$01
|
||||||
beq sel_is_file
|
beq sel_is_file
|
||||||
|
cmp #$03
|
||||||
|
beq sel_is_spc
|
||||||
cmp #$04
|
cmp #$04
|
||||||
beq sel_is_file
|
beq sel_is_file
|
||||||
cmp #$80
|
cmp #$80
|
||||||
@@ -497,7 +514,6 @@ select_item:
|
|||||||
cmp #$81
|
cmp #$81
|
||||||
beq sel_is_parent
|
beq sel_is_parent
|
||||||
select_item_cont
|
select_item_cont
|
||||||
plb
|
|
||||||
rts
|
rts
|
||||||
sel_is_file
|
sel_is_file
|
||||||
jsr select_file
|
jsr select_file
|
||||||
@@ -508,24 +524,28 @@ sel_is_parent
|
|||||||
sel_is_dir
|
sel_is_dir
|
||||||
jsr select_dir
|
jsr select_dir
|
||||||
bra select_item_cont
|
bra select_item_cont
|
||||||
|
sel_is_spc
|
||||||
|
jsr select_spc
|
||||||
|
bra select_item_cont
|
||||||
|
|
||||||
select_file:
|
select_file:
|
||||||
; have avr load the rom
|
; have MCU load the rom
|
||||||
dey
|
dey
|
||||||
rep #$20 : .al
|
rep #$20 : .al
|
||||||
lda (dirptr_addr), y
|
lda [dirptr_addr], y
|
||||||
and #$00ff
|
and #$00ff
|
||||||
sta @AVR_PARAM+2
|
sta @MCU_PARAM+2
|
||||||
dey
|
dey
|
||||||
dey
|
dey
|
||||||
lda (dirptr_addr), y
|
lda [dirptr_addr], y
|
||||||
sta @AVR_PARAM
|
sta @MCU_PARAM
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda #$01
|
|
||||||
sta @AVR_CMD
|
|
||||||
lda #$00
|
lda #$00
|
||||||
sta @$4200
|
sta @$4200
|
||||||
sei
|
sei
|
||||||
|
lda #$01
|
||||||
|
sta @MCU_CMD
|
||||||
|
select_file_fade:
|
||||||
jsl @wram_fadeloop
|
jsl @wram_fadeloop
|
||||||
rts
|
rts
|
||||||
|
|
||||||
@@ -559,14 +579,14 @@ select_dir:
|
|||||||
; y = direntry ptr
|
; y = direntry ptr
|
||||||
txy
|
txy
|
||||||
dey
|
dey
|
||||||
lda (dirptr_addr), y
|
lda [dirptr_addr], y
|
||||||
clc
|
clc
|
||||||
adc #$c0
|
adc #$c0
|
||||||
sta @dirent_bank
|
sta @dirent_bank
|
||||||
dey
|
dey
|
||||||
dey
|
dey
|
||||||
rep #$20 : .al
|
rep #$20 : .al
|
||||||
lda (dirptr_addr), y
|
lda [dirptr_addr], y
|
||||||
sta @dirent_addr
|
sta @dirent_addr
|
||||||
tax
|
tax
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
@@ -585,6 +605,8 @@ select_dir:
|
|||||||
sta @dirstart_addr
|
sta @dirstart_addr
|
||||||
lda #$0000
|
lda #$0000
|
||||||
sta @menu_sel
|
sta @menu_sel
|
||||||
|
sta @direntry_xscroll
|
||||||
|
sta @direntry_xscroll_state
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda #$01
|
lda #$01
|
||||||
sta @menu_dirty
|
sta @menu_dirty
|
||||||
@@ -623,6 +645,27 @@ select_parent:
|
|||||||
sta @menu_dirty
|
sta @menu_dirty
|
||||||
rts
|
rts
|
||||||
|
|
||||||
|
select_spc:
|
||||||
|
dey
|
||||||
|
rep #$20 : .al
|
||||||
|
lda [dirptr_addr], y
|
||||||
|
and #$00ff
|
||||||
|
sta @MCU_PARAM+2
|
||||||
|
dey
|
||||||
|
dey
|
||||||
|
lda [dirptr_addr], y
|
||||||
|
sta @MCU_PARAM
|
||||||
|
sep #$20 : .as
|
||||||
|
lda #CMD_LOADSPC
|
||||||
|
sta @MCU_CMD
|
||||||
|
wait_spc:
|
||||||
|
lda @MCU_CMD
|
||||||
|
cmp #$00
|
||||||
|
bne wait_spc
|
||||||
|
jsr spcplayer
|
||||||
|
jsr restore_screen
|
||||||
|
rts
|
||||||
|
|
||||||
menu_key_x:
|
menu_key_x:
|
||||||
jsr mainmenu
|
jsr mainmenu
|
||||||
rts
|
rts
|
||||||
@@ -641,10 +684,10 @@ setup_224_adjsel
|
|||||||
+
|
+
|
||||||
lda #18*64
|
lda #18*64
|
||||||
sta textdmasize
|
sta textdmasize
|
||||||
lda #$0007
|
lda #$000b
|
||||||
sta hdma_scroll+8
|
sta hdma_scroll+8
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda #$07
|
lda #$0b
|
||||||
sta $2110
|
sta $2110
|
||||||
lda #$00
|
lda #$00
|
||||||
sta $2110
|
sta $2110
|
||||||
@@ -676,32 +719,6 @@ setup_224_adjsel
|
|||||||
plp
|
plp
|
||||||
rts
|
rts
|
||||||
|
|
||||||
setup_448:
|
|
||||||
php
|
|
||||||
rep #$30 : .xl : .al
|
|
||||||
lda #36
|
|
||||||
sta listdisp
|
|
||||||
lda #36*64
|
|
||||||
sta textdmasize
|
|
||||||
lda #$ffc6
|
|
||||||
sta hdma_scroll+8
|
|
||||||
sep #$20 : .as
|
|
||||||
lda #$c6
|
|
||||||
sta $2110
|
|
||||||
lda #$ff
|
|
||||||
sta $2110
|
|
||||||
lda #$01
|
|
||||||
sta barstep
|
|
||||||
ora #$08
|
|
||||||
sta $2133
|
|
||||||
lda #$04
|
|
||||||
sta hdma_math_selection
|
|
||||||
lda #$01
|
|
||||||
sta vidmode
|
|
||||||
sta menu_dirty
|
|
||||||
plp
|
|
||||||
rts
|
|
||||||
|
|
||||||
menu_statusbar
|
menu_statusbar
|
||||||
pha
|
pha
|
||||||
phx
|
phx
|
||||||
@@ -732,3 +749,142 @@ menu_statusbar
|
|||||||
pla
|
pla
|
||||||
rts
|
rts
|
||||||
|
|
||||||
|
select_last_file:
|
||||||
|
php
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
lda @LAST_STATUS
|
||||||
|
bne +
|
||||||
|
plp
|
||||||
|
rts
|
||||||
|
+ jsr backup_screen
|
||||||
|
lda #^text_last
|
||||||
|
sta window_tbank
|
||||||
|
ldx #!text_last
|
||||||
|
stx window_taddr
|
||||||
|
lda @last_win_x
|
||||||
|
sta window_x
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
sta bar_xl
|
||||||
|
pha
|
||||||
|
lda @last_win_y
|
||||||
|
sta window_y
|
||||||
|
inc
|
||||||
|
sta bar_yl
|
||||||
|
inc
|
||||||
|
pha
|
||||||
|
lda @last_win_w
|
||||||
|
sta window_w
|
||||||
|
lda @last_win_h
|
||||||
|
sta window_h
|
||||||
|
jsr draw_window
|
||||||
|
stz print_pal
|
||||||
|
lda #^LAST_GAME
|
||||||
|
ldx #!LAST_GAME
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
stz print_pal
|
||||||
|
pla
|
||||||
|
sta print_y
|
||||||
|
pla
|
||||||
|
sta print_x
|
||||||
|
lda #56
|
||||||
|
sta bar_wl
|
||||||
|
sta print_count
|
||||||
|
jsr hiprint
|
||||||
|
- lda isr_done
|
||||||
|
lsr
|
||||||
|
bcc -
|
||||||
|
jsr printtime
|
||||||
|
jsr read_pad
|
||||||
|
lda #$80
|
||||||
|
and pad1trig+1
|
||||||
|
bne +
|
||||||
|
lda #$10
|
||||||
|
and pad1trig+1
|
||||||
|
beq -
|
||||||
|
lda #$04
|
||||||
|
sta @MCU_CMD
|
||||||
|
jmp select_file_fade
|
||||||
|
+ jsr restore_screen
|
||||||
|
plp
|
||||||
|
rts
|
||||||
|
|
||||||
|
scroll_direntry_clean:
|
||||||
|
lda #$01
|
||||||
|
sta direntry_xscroll_state
|
||||||
|
stz direntry_xscroll
|
||||||
|
stz direntry_xscroll_wait
|
||||||
|
jsr scroll_direntry
|
||||||
|
stz direntry_xscroll_state
|
||||||
|
stz direntry_xscroll
|
||||||
|
rts
|
||||||
|
|
||||||
|
scroll_direntry:
|
||||||
|
ldy menu_sel
|
||||||
|
lda direntry_xscroll_state
|
||||||
|
bne +
|
||||||
|
lda direntry_fits, y
|
||||||
|
bne scroll_direntry_enter
|
||||||
|
; stz direntry_xscroll_state
|
||||||
|
rts
|
||||||
|
scroll_direntry_enter
|
||||||
|
lda #$01
|
||||||
|
sta direntry_xscroll_state
|
||||||
|
stz direntry_xscroll_wait
|
||||||
|
+ lda direntry_xscroll_wait
|
||||||
|
beq +
|
||||||
|
dec direntry_xscroll_wait
|
||||||
|
rts
|
||||||
|
|
||||||
|
+ lda direntry_xscroll
|
||||||
|
bne scroll_direntry_scrollfast
|
||||||
|
lda #$28
|
||||||
|
bra +
|
||||||
|
scroll_direntry_scrollfast
|
||||||
|
lda #$10
|
||||||
|
+ sta direntry_xscroll_wait
|
||||||
|
tya
|
||||||
|
clc
|
||||||
|
adc #$09
|
||||||
|
sta cursor_y
|
||||||
|
lda #$02
|
||||||
|
sta cursor_x
|
||||||
|
rep #$20 : .al
|
||||||
|
lda menu_sel
|
||||||
|
asl
|
||||||
|
asl
|
||||||
|
tay
|
||||||
|
lda [dirptr_addr], y
|
||||||
|
sta @dirent_addr
|
||||||
|
iny
|
||||||
|
iny
|
||||||
|
sep #$20 : .as
|
||||||
|
lda [dirptr_addr], y ; load fileinfo bank
|
||||||
|
clc
|
||||||
|
adc #$c0 ; add $C0 for memory map
|
||||||
|
sta @dirent_bank ; store as current bank
|
||||||
|
iny
|
||||||
|
lda [dirptr_addr], y
|
||||||
|
iny
|
||||||
|
sta @dirent_type
|
||||||
|
ldy menu_sel
|
||||||
|
sty direntry_fits_idx
|
||||||
|
phy
|
||||||
|
jsr print_direntry
|
||||||
|
ply
|
||||||
|
lda direntry_fits, y
|
||||||
|
bne +
|
||||||
|
lda #$ff
|
||||||
|
sta direntry_xscroll_state
|
||||||
|
lda #$28
|
||||||
|
sta direntry_xscroll_wait
|
||||||
|
+ lda direntry_xscroll_state
|
||||||
|
clc
|
||||||
|
adc direntry_xscroll
|
||||||
|
sta direntry_xscroll
|
||||||
|
bne +
|
||||||
|
lda #$01
|
||||||
|
sta direntry_xscroll_state
|
||||||
|
+ rts
|
||||||
|
|||||||
10
snes/pad.a65
10
snes/pad.a65
@@ -4,7 +4,15 @@ read_pad:
|
|||||||
read_pad1
|
read_pad1
|
||||||
ldx pad1mem ;byetUDLRaxlriiii
|
ldx pad1mem ;byetUDLRaxlriiii
|
||||||
lda $4218
|
lda $4218
|
||||||
ora $421a
|
and #$000f
|
||||||
|
bne +
|
||||||
|
lda $4218
|
||||||
|
+ sta pad1mem
|
||||||
|
lda $421a
|
||||||
|
and #$000f
|
||||||
|
bne +
|
||||||
|
lda $421a
|
||||||
|
+ ora pad1mem
|
||||||
sta pad1mem
|
sta pad1mem
|
||||||
and #$0f00
|
and #$0f00
|
||||||
bne read_pad1_count
|
bne read_pad1_count
|
||||||
|
|||||||
137
snes/palette.a65
137
snes/palette.a65
@@ -1,77 +1,64 @@
|
|||||||
palette
|
palette .byt $1f, $7c, $ff, $7f, $c6, $18, $18, $63
|
||||||
;8bit palette; 4bit palette0; 2bit palette0
|
.byt $00, $00, $ff, $43, $c6, $0c, $18, $33
|
||||||
.byt $42, $08, $ff, $7f, $c6, $18, $18, $63
|
.byt $00, $00, $f0, $43, $c3, $0c, $0c, $33
|
||||||
;2bit palette1
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
.byt $42, $08, $ff, $43, $c6, $0c, $18, $63
|
.byt $00, $00, $ff, $43, $c6, $0c, $18, $33
|
||||||
;2bit palette2
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
.byt $42, $08, $f0, $43, $c0, $0c, $18, $63
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
;2bit palette3
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
|
.byt $00, $00, $f0, $43, $c3, $0c, $0c, $33
|
||||||
|
.byt $40, $08, $60, $0c, $80, $10, $80, $0c
|
||||||
|
.byt $80, $14, $a0, $14, $05, $21, $30, $42
|
||||||
|
.byt $0f, $3e, $cd, $3d, $c1, $18, $52, $4a
|
||||||
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
|
.byt $d6, $5a, $6b, $2d, $39, $67, $7a, $6b
|
||||||
|
.byt $ce, $39, $46, $29, $94, $52, $ad, $35
|
||||||
|
.byt $a2, $14, $aa, $35, $c0, $18, $18, $63
|
||||||
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
|
.byt $e0, $1c, $a0, $18, $c3, $18, $29, $25
|
||||||
|
.byt $4a, $29, $ff, $7f, $21, $04, $bd, $73
|
||||||
|
.byt $fe, $7b, $e7, $18, $42, $08, $00, $00
|
||||||
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
|
.byt $a5, $14, $79, $7b, $e6, $1c, $63, $0c
|
||||||
|
.byt $de, $7f, $bd, $7f, $08, $21, $8c, $31
|
||||||
|
.byt $6a, $2d, $08, $25, $61, $29, $00, $21
|
||||||
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
|
.byt $c4, $45, $45, $5a, $a5, $6e, $e6, $7e
|
||||||
|
.byt $c7, $10, $b4, $66, $82, $35, $27, $35
|
||||||
|
.byt $8b, $3d, $66, $59, $85, $69, $6f, $76
|
||||||
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
|
.byt $83, $75, $37, $7f, $46, $45, $0a, $7a
|
||||||
|
.byt $9b, $7f, $d2, $7a, $15, $7f, $c0, $3c
|
||||||
|
.byt $08, $11, $21, $25, $86, $52, $0e, $25
|
||||||
|
.byt $d9, $1c, $f1, $1c, $9e, $14, $ef, $1c
|
||||||
|
.byt $ca, $18, $9d, $14, $36, $29, $d3, $72
|
||||||
|
.byt $50, $5a, $81, $28, $cd, $49, $6a, $26
|
||||||
|
.byt $c7, $15, $63, $25, $4f, $23, $ac, $1e
|
||||||
|
.byt $05, $0d, $0e, $2b, $25, $0d, $c4, $08
|
||||||
|
.byt $62, $04, $e7, $29, $b2, $18, $6c, $0c
|
||||||
|
.byt $82, $04, $ce, $19, $31, $1a, $ff, $17
|
||||||
|
.byt $dd, $1b, $7b, $1f, $4a, $11, $d6, $1a
|
||||||
|
.byt $29, $73, $4d, $63, $50, $4f, $d3, $26
|
||||||
|
.byt $b8, $37, $26, $08, $fe, $20, $94, $3f
|
||||||
|
.byt $a3, $04, $10, $42, $10, $42, $10, $42
|
||||||
.byt $10, $42, $10, $42, $10, $42, $10, $42
|
.byt $10, $42, $10, $42, $10, $42, $10, $42
|
||||||
;4bit palette1; 2bit palette4
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
.byt $42, $08, $ff, $43, $c6, $0c, $18, $63
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
;2bit palette5
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
|
.byt $1f, $7c, $1f, $7c, $1f, $7c, $1f, $7c
|
||||||
|
.byt $1f, $74, $00, $00, $08, $21, $8c, $31
|
||||||
|
.byt $ce, $39, $bd, $77, $7b, $6f, $39, $67
|
||||||
|
.byt $d6, $5a, $94, $52, $ff, $7f, $10, $42
|
||||||
|
.byt $4a, $29, $84, $10, $c6, $18, $52, $4a
|
||||||
|
.byt $1f, $74, $45, $11, $e3, $10, $a1, $0c
|
||||||
|
.byt $e8, $19, $4f, $27, $0e, $23, $ed, $22
|
||||||
|
.byt $2e, $23, $09, $1a, $cc, $22, $24, $11
|
||||||
.byt $10, $42, $10, $42, $10, $42, $10, $42
|
.byt $10, $42, $10, $42, $10, $42, $10, $42
|
||||||
;2bit palette6
|
.byt $1f, $74, $df, $17, $47, $15, $c3, $0c
|
||||||
.byt $10, $42, $10, $42, $10, $42, $10, $42
|
.byt $0e, $12, $7b, $13, $b9, $33, $06, $7f
|
||||||
;2bit palette7
|
.byt $2c, $63, $75, $3b, $72, $4f, $93, $16
|
||||||
.byt $10, $42, $10, $42, $10, $42, $10, $42
|
.byt $aa, $15, $24, $15, $17, $13, $50, $16
|
||||||
;4bit palette2
|
.byt $1f, $74, $0e, $21, $54, $29, $a6, $14
|
||||||
.byt $10, $42, $f0, $43, $c0, $0c, $18, $63
|
.byt $7e, $14, $5a, $2d, $10, $21, $0d, $25
|
||||||
;logo
|
.byt $eb, $20, $9c, $14, $99, $14, $37, $29
|
||||||
.byt $00, $00, $00, $00, $20, $04, $20, $00
|
.byt $f6, $1c, $96, $14, $d3, $1c, $f1, $1c
|
||||||
.byt $20, $00, $21, $00, $21, $08, $40, $08
|
|
||||||
.byt $40, $04, $42, $04, $42, $0c, $60, $0c
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $62, $0c, $61, $0c, $62, $00, $63, $0c
|
|
||||||
.byt $63, $10, $62, $08, $80, $10, $64, $0c
|
|
||||||
.byt $a0, $14, $84, $10, $a2, $0c, $a4, $0c
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $a4, $10, $c0, $18, $a4, $14, $a6, $14
|
|
||||||
.byt $a5, $14, $89, $14, $e0, $1c, $c5, $10
|
|
||||||
.byt $c6, $18, $e3, $0c, $e5, $1c, $00, $21
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $04, $0d, $ca, $18, $04, $11, $e7, $1c
|
|
||||||
.byt $20, $25, $21, $1d, $5d, $0c, $08, $15
|
|
||||||
.byt $40, $29, $08, $21, $5e, $10, $5d, $10
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $cf, $20, $7b, $10, $7e, $14, $27, $25
|
|
||||||
.byt $60, $31, $28, $25, $44, $29, $61, $29
|
|
||||||
.byt $46, $29, $29, $25, $62, $2d, $f3, $1c
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $66, $15, $d6, $18, $63, $31, $d8, $18
|
|
||||||
.byt $0e, $25, $80, $35, $48, $29, $bb, $18
|
|
||||||
.byt $4a, $29, $66, $2d, $4b, $29, $a3, $2d
|
|
||||||
.byt $a0, $39, $f6, $20, $6a, $15, $6a, $19
|
|
||||||
.byt $32, $21, $a1, $39, $a1, $41, $31, $29
|
|
||||||
.byt $4e, $31, $a2, $39, $c0, $3d, $6b, $2d
|
|
||||||
.byt $8a, $31, $6d, $2d, $c8, $19, $00, $42
|
|
||||||
.byt $8c, $31, $e3, $3d, $ac, $19, $e3, $45
|
|
||||||
.byt $ad, $15, $e3, $49, $02, $42, $e6, $2d
|
|
||||||
.byt $20, $42, $ad, $35, $24, $46, $24, $4e
|
|
||||||
.byt $28, $2e, $42, $46, $ee, $39, $45, $4a
|
|
||||||
.byt $2a, $16, $48, $2e, $0f, $1e, $46, $56
|
|
||||||
.byt $64, $4a, $44, $5e, $0f, $3e, $64, $4e
|
|
||||||
.byt $65, $5a, $83, $4e, $67, $4e, $30, $42
|
|
||||||
.byt $86, $4e, $32, $46, $6d, $2e, $52, $1a
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $00, $00, $00, $00, $00, $00, $00, $00
|
|
||||||
.byt $8b, $22, $a5, $56, $51, $46, $ab, $1a
|
|
||||||
.byt $a5, $6a, $a5, $6e, $c1, $76, $c7, $5a
|
|
||||||
.byt $93, $16, $e0, $7a, $72, $4a, $cc, $26
|
|
||||||
.byt $b0, $2a, $93, $4e, $e5, $7e, $e8, $5e
|
|
||||||
.byt $b5, $1e, $ed, $1e, $e6, $7e, $b5, $16
|
|
||||||
.byt $95, $52, $b3, $56, $b5, $56, $0a, $63
|
|
||||||
.byt $2d, $1b, $29, $67, $2f, $23, $f4, $2a
|
|
||||||
.byt $d6, $5a, $17, $1b, $4a, $6b, $4d, $67
|
|
||||||
.byt $f7, $5e, $f8, $62, $39, $1f, $18, $63
|
|
||||||
.byt $6c, $73, $78, $23, $39, $67, $7b, $1b
|
|
||||||
.byt $5a, $6b, $7b, $6f, $de, $17, $9c, $73
|
|
||||||
.byt $bd, $77, $ff, $13, $de, $7b, $ff, $7f
|
|
||||||
;sprite palette 7
|
|
||||||
.byt $3f, $7c, $20, $08, $84, $0c, $a5, $14
|
|
||||||
.byt $08, $21, $5a, $6b, $bc, $73, $fe, $7b
|
|
||||||
.byt $f7, $5e, $73, $4e, $10, $42, $42, $08
|
|
||||||
.byt $00, $00, $ad, $35, $b5, $56, $6b, $2d
|
|
||||||
|
|
||||||
|
|||||||
@@ -39,6 +39,8 @@ NMI_ROUTINE:
|
|||||||
php
|
php
|
||||||
txa
|
txa
|
||||||
dec
|
dec
|
||||||
|
dec
|
||||||
|
dec
|
||||||
plp
|
plp
|
||||||
bne small_bar
|
bne small_bar
|
||||||
asl
|
asl
|
||||||
@@ -82,9 +84,29 @@ math_cont
|
|||||||
clc
|
clc
|
||||||
adc bar_x ; + X start coord
|
adc bar_x ; + X start coord
|
||||||
sta $2127 ; window 1 right
|
sta $2127 ; window 1 right
|
||||||
lda #$3e ; ch. 1-5
|
; lda #$3e ; ch. 1-5
|
||||||
sta @$420c ; trigger HDMA
|
; sta @$420c ; trigger HDMA
|
||||||
lda #$01
|
|
||||||
|
lda cur_bright
|
||||||
|
cmp tgt_bright
|
||||||
|
beq +
|
||||||
|
bpl bright_down
|
||||||
|
bright_up
|
||||||
|
inc
|
||||||
|
sta cur_bright
|
||||||
|
lda $2100
|
||||||
|
and #$f0
|
||||||
|
ora cur_bright
|
||||||
|
sta $2100
|
||||||
|
bra +
|
||||||
|
bright_down
|
||||||
|
dec
|
||||||
|
sta cur_bright
|
||||||
|
lda $2100
|
||||||
|
and #$f0
|
||||||
|
ora cur_bright
|
||||||
|
sta $2100
|
||||||
|
+ lda #$01
|
||||||
sta isr_done
|
sta isr_done
|
||||||
rtl
|
rtl
|
||||||
|
|
||||||
|
|||||||
61
snes/spc700.a65
Normal file
61
snes/spc700.a65
Normal file
@@ -0,0 +1,61 @@
|
|||||||
|
; All SPC700 routines in SPC700 machine code
|
||||||
|
; SPC loader & transfer routines by Shay Green <gblargg@gmail.com>
|
||||||
|
|
||||||
|
loader ; .org $0002
|
||||||
|
.byt $F8,$21 ; mov x,@loader_data
|
||||||
|
.byt $BD ; mov sp,x
|
||||||
|
.byt $CD,$22 ; mov x,#@loader_data+1
|
||||||
|
|
||||||
|
; Push PC and PSW from SPC header
|
||||||
|
.byt $BF ; mov a,(x)+
|
||||||
|
.byt $2D ; push a
|
||||||
|
.byt $BF ; mov a,(x)+
|
||||||
|
.byt $2D ; push a
|
||||||
|
.byt $BF ; mov a,(x)+
|
||||||
|
.byt $2D ; push a
|
||||||
|
|
||||||
|
; Set FLG to $60 rather than value from SPC
|
||||||
|
.byt $E8,$60 ; mov a,#$60
|
||||||
|
.byt $D4,$6C ; mov FLG+x,a
|
||||||
|
|
||||||
|
; Restore DSP registers
|
||||||
|
.byt $8D,$00 ; mov y,#0
|
||||||
|
.byt $BF ; next: mov a,(x)+
|
||||||
|
.byt $CB,$F2 ; mov $F2,y
|
||||||
|
.byt $C4,$F3 ; mov $F3,a
|
||||||
|
.byt $FC ; inc y
|
||||||
|
.byt $10,-8 ; bpl next
|
||||||
|
|
||||||
|
.byt $8F,$6C,$F2 ; mov $F2,#FLG ; set for later
|
||||||
|
|
||||||
|
; Rerun loader
|
||||||
|
.byt $5F,$C0,$FF ; jmp $FFC0
|
||||||
|
|
||||||
|
;---------------------------------------
|
||||||
|
|
||||||
|
transfer ; .org $0002
|
||||||
|
|
||||||
|
.byt $CD,$FE ; mov x,#$FE ; transfer 254 pages
|
||||||
|
|
||||||
|
; Transfer four-byte chunks
|
||||||
|
.byt $8D,$3F ; page: mov y,#$3F
|
||||||
|
.byt $E4,$F4 ; quad: mov a,$F4
|
||||||
|
.byt $D6,$00,$02 ; mov0: mov !$0200+y,a
|
||||||
|
.byt $E4,$F5 ; mov a,$F5
|
||||||
|
.byt $D6,$40,$02 ; mov1: mov !$0240+y,a
|
||||||
|
.byt $E4,$F6 ; mov a,$F6
|
||||||
|
.byt $D6,$80,$02 ; mov2: mov !$0280+y,a
|
||||||
|
.byt $E4,$F7 ; mov a,$F7 ; tell S-CPU we're ready for more
|
||||||
|
.byt $CB,$F7 ; mov $F7,Y
|
||||||
|
.byt $D6,$C0,$02 ; mov3: mov !$02C0+y,a
|
||||||
|
.byt $DC ; dec y
|
||||||
|
.byt $10,-25 ; bpl quad
|
||||||
|
; Increment MSBs of addresses
|
||||||
|
.byt $AB,$0A ; inc mov0+2
|
||||||
|
.byt $AB,$0F ; inc mov1+2
|
||||||
|
.byt $AB,$14 ; inc mov2+2
|
||||||
|
.byt $AB,$1B ; inc mov3+2
|
||||||
|
.byt $1D ; dec x
|
||||||
|
.byt $D0,-38 ; bne page
|
||||||
|
; Rerun loader
|
||||||
|
.byt $5F,$C0,$FF ; jmp $FFC0
|
||||||
676
snes/spcplay.a65
Normal file
676
snes/spcplay.a65
Normal file
@@ -0,0 +1,676 @@
|
|||||||
|
#include "memmap.i65"
|
||||||
|
|
||||||
|
; SPC Player
|
||||||
|
; SPC700 transfer and IO routines by Shay Green <gblargg@gmail.com>
|
||||||
|
|
||||||
|
spcplayer:
|
||||||
|
php
|
||||||
|
sep #$30 : .as : .xs
|
||||||
|
|
||||||
|
ldx #$0a ; Check if SPC header is present
|
||||||
|
-
|
||||||
|
lda @SPC_HEADER,x
|
||||||
|
cmp @text_spcid,x
|
||||||
|
beq +
|
||||||
|
jmp spc_exit
|
||||||
|
+
|
||||||
|
dey
|
||||||
|
bne -
|
||||||
|
|
||||||
|
rep #$10 : .xl ; Now draw lots of stuff
|
||||||
|
|
||||||
|
stz bar_wl
|
||||||
|
dec bar_wl
|
||||||
|
stz bar_xl
|
||||||
|
dec bar_xl
|
||||||
|
stz bar_yl
|
||||||
|
dec bar_yl
|
||||||
|
jsr backup_screen
|
||||||
|
|
||||||
|
lda #^text_spcplay ; Loading window
|
||||||
|
sta window_tbank
|
||||||
|
ldx #!text_spcplay
|
||||||
|
stx window_taddr
|
||||||
|
lda @spcplay_win_x
|
||||||
|
sta window_x
|
||||||
|
lda @spcplay_win_y
|
||||||
|
sta window_y
|
||||||
|
lda @spcplay_win_w
|
||||||
|
sta window_w
|
||||||
|
lda @spcplay_win_h
|
||||||
|
sta window_h
|
||||||
|
jsr draw_window
|
||||||
|
|
||||||
|
lda #^text_spcload ; Loading text
|
||||||
|
ldx #!text_spcload
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
stz print_pal
|
||||||
|
lda #29
|
||||||
|
sta print_count
|
||||||
|
lda #17
|
||||||
|
sta print_y
|
||||||
|
lda #17
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
stz isr_done
|
||||||
|
-
|
||||||
|
lda isr_done ; Wait until text is being printed...
|
||||||
|
beq -
|
||||||
|
|
||||||
|
jsr spc700_load ; Load SPC into SPC700
|
||||||
|
|
||||||
|
lda #^text_spcplay
|
||||||
|
sta window_tbank
|
||||||
|
ldx #!text_spcplay
|
||||||
|
stx window_taddr
|
||||||
|
lda @spcstart_win_x
|
||||||
|
sta window_x
|
||||||
|
lda @spcstart_win_y
|
||||||
|
sta window_y
|
||||||
|
lda @spcstart_win_w
|
||||||
|
sta window_w
|
||||||
|
lda @spcstart_win_h
|
||||||
|
sta window_h
|
||||||
|
jsr draw_window
|
||||||
|
|
||||||
|
lda #^text_spcstarta
|
||||||
|
ldx #!text_spcstarta
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
lda #$01
|
||||||
|
sta print_pal
|
||||||
|
lda #30
|
||||||
|
sta print_count
|
||||||
|
lda #15
|
||||||
|
sta print_y
|
||||||
|
lda #17
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
lda #^text_spcstartb
|
||||||
|
ldx #!text_spcstartb
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
lda #$01
|
||||||
|
sta print_pal
|
||||||
|
lda #07
|
||||||
|
sta print_count
|
||||||
|
lda #17
|
||||||
|
sta print_y
|
||||||
|
lda #12
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
lda #$fe
|
||||||
|
ldx #$004e
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
stz print_pal
|
||||||
|
lda #32
|
||||||
|
sta print_count
|
||||||
|
lda #17
|
||||||
|
sta print_y
|
||||||
|
lda #20
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
lda #^text_spcstartc
|
||||||
|
ldx #!text_spcstartc
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
lda #$01
|
||||||
|
sta print_pal
|
||||||
|
lda #07
|
||||||
|
sta print_count
|
||||||
|
lda #18
|
||||||
|
sta print_y
|
||||||
|
lda #12
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
lda #$fe
|
||||||
|
ldx #$002e
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
stz print_pal
|
||||||
|
lda #32
|
||||||
|
sta print_count
|
||||||
|
lda #18
|
||||||
|
sta print_y
|
||||||
|
lda #20
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
lda #^text_spcstartd
|
||||||
|
ldx #!text_spcstartd
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
lda #$01
|
||||||
|
sta print_pal
|
||||||
|
lda #07
|
||||||
|
sta print_count
|
||||||
|
lda #19
|
||||||
|
sta print_y
|
||||||
|
lda #12
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
lda #$fe
|
||||||
|
ldx #$00b0
|
||||||
|
sta longptr+2
|
||||||
|
sta print_bank
|
||||||
|
stx longptr
|
||||||
|
ldy #$00
|
||||||
|
lda [longptr], y
|
||||||
|
cmp #$41
|
||||||
|
bpl +
|
||||||
|
inx
|
||||||
|
+ stx print_src
|
||||||
|
stz print_pal
|
||||||
|
lda #32
|
||||||
|
sta print_count
|
||||||
|
lda #19
|
||||||
|
sta print_y
|
||||||
|
lda #20
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
spc_playloop:
|
||||||
|
lda isr_done ; SPC player loop
|
||||||
|
lsr
|
||||||
|
bcc spc_playloop
|
||||||
|
jsr printtime
|
||||||
|
stz isr_done
|
||||||
|
|
||||||
|
jsr read_pad
|
||||||
|
lda #$80
|
||||||
|
and pad1trig+1
|
||||||
|
bne spc_key_b
|
||||||
|
bra spc_playloop
|
||||||
|
|
||||||
|
spc_key_b:
|
||||||
|
rep #$20 : .al
|
||||||
|
tsc
|
||||||
|
sta saved_sp ; Save SP for later re-entry
|
||||||
|
lda #$fa50 ; Write reset signature
|
||||||
|
sta @warm_signature
|
||||||
|
sep #$20 : .as
|
||||||
|
|
||||||
|
sei ; Blank screen & issue CMD_RESET command to Microcontroller...
|
||||||
|
stz $2100 ; ...this is required, because there is no other way to stop S-SMP & S-DSP
|
||||||
|
lda #CMD_RESET
|
||||||
|
sta @MCU_CMD
|
||||||
|
-
|
||||||
|
bra - ; At this point, the SNES waits for an external reset from the Microcontroller
|
||||||
|
|
||||||
|
spc_exit: ; Return from player in case of wrong SPC file data
|
||||||
|
plp
|
||||||
|
rts
|
||||||
|
|
||||||
|
;---------------------------------------
|
||||||
|
spc700_load:
|
||||||
|
php
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
|
||||||
|
sei ; Disable NMI & IRQ
|
||||||
|
stz $4200 ; The SPC player code is really timing sensitive ;)
|
||||||
|
jsr upload_dsp_regs ; Upload S-DSP registers
|
||||||
|
jsr upload_high_ram ; Upload 63.5K of SPC700 ram
|
||||||
|
jsr upload_low_ram ; Upload rest of ram
|
||||||
|
jsr restore_final ; Restore SPC700 state & start execution
|
||||||
|
|
||||||
|
lda #$81 ; VBlank NMI + Auto Joypad Read
|
||||||
|
sta $4200 ; enable V-BLANK NMI
|
||||||
|
cli
|
||||||
|
plp
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
; Uploads DSP registers and some other setup code
|
||||||
|
upload_dsp_regs:
|
||||||
|
|
||||||
|
; ---- Begin upload
|
||||||
|
|
||||||
|
ldy #$0002
|
||||||
|
jsr spc_begin_upload
|
||||||
|
|
||||||
|
; ---- Upload loader
|
||||||
|
|
||||||
|
ldx #$0000
|
||||||
|
-
|
||||||
|
lda @loader,x
|
||||||
|
jsr spc_upload_byte
|
||||||
|
inx
|
||||||
|
cpy #31 ; size of loader
|
||||||
|
bne -
|
||||||
|
|
||||||
|
; ---- Upload SP, PC & PSW
|
||||||
|
|
||||||
|
lda @SPC_HEADER+43
|
||||||
|
jsr spc_upload_byte
|
||||||
|
lda @SPC_HEADER+38
|
||||||
|
jsr spc_upload_byte
|
||||||
|
lda @SPC_HEADER+37
|
||||||
|
jsr spc_upload_byte
|
||||||
|
lda @SPC_HEADER+42
|
||||||
|
jsr spc_upload_byte
|
||||||
|
|
||||||
|
; ---- Upload DSP registers
|
||||||
|
|
||||||
|
ldx #$0000
|
||||||
|
-
|
||||||
|
; initialize FLG and KON ($6c/$4c) to avoid artifacts
|
||||||
|
cpx #$4C
|
||||||
|
bne +
|
||||||
|
lda #$00
|
||||||
|
bra upload_skip_load
|
||||||
|
+
|
||||||
|
cpx #$6C
|
||||||
|
bne +
|
||||||
|
lda #$E0
|
||||||
|
bra upload_skip_load
|
||||||
|
+
|
||||||
|
lda @SPC_DSP_REGS,x
|
||||||
|
upload_skip_load
|
||||||
|
jsr spc_upload_byte
|
||||||
|
inx
|
||||||
|
cpx #128
|
||||||
|
bne -
|
||||||
|
|
||||||
|
; --- Upload fixed values for $F1-$F3
|
||||||
|
|
||||||
|
ldy #$00F1
|
||||||
|
jsr spc_next_upload
|
||||||
|
|
||||||
|
lda #$80 ; stop timers
|
||||||
|
jsr spc_upload_byte
|
||||||
|
lda #$6c ; get dspaddr set for later
|
||||||
|
jsr spc_upload_byte
|
||||||
|
lda #$60
|
||||||
|
jsr spc_upload_byte
|
||||||
|
|
||||||
|
; ---- Upload $f8-$1ff
|
||||||
|
|
||||||
|
ldy #$00F8
|
||||||
|
jsr spc_next_upload
|
||||||
|
|
||||||
|
ldx #$00F8
|
||||||
|
-
|
||||||
|
lda @SPC_DATA,x
|
||||||
|
jsr spc_upload_byte
|
||||||
|
inx
|
||||||
|
cpx #$200
|
||||||
|
bne -
|
||||||
|
|
||||||
|
; ---- Execute loader
|
||||||
|
|
||||||
|
ldy #$0002
|
||||||
|
jsr spc_execute
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
upload_high_ram:
|
||||||
|
|
||||||
|
ldy #$0002
|
||||||
|
jsr spc_begin_upload
|
||||||
|
|
||||||
|
; ---- Upload transfer routine
|
||||||
|
|
||||||
|
ldx #$0000
|
||||||
|
-
|
||||||
|
lda @transfer,x
|
||||||
|
jsr spc_upload_byte
|
||||||
|
inx
|
||||||
|
cpy #43 ; size of transfer routine
|
||||||
|
bne -
|
||||||
|
|
||||||
|
ldx #$023f ; prepare transfer address
|
||||||
|
|
||||||
|
; ---- Execute transfer routine
|
||||||
|
|
||||||
|
ldy #$0002
|
||||||
|
sty APUIO2
|
||||||
|
stz APUIO1
|
||||||
|
lda APUIO0
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
sta APUIO0
|
||||||
|
; Wait for acknowledgement
|
||||||
|
-
|
||||||
|
cmp APUIO0
|
||||||
|
bne -
|
||||||
|
|
||||||
|
; ---- Burst transfer of 63.5K using custom routine
|
||||||
|
|
||||||
|
outer_transfer_loop:
|
||||||
|
ldy #$003f ; 3
|
||||||
|
inner_transfer_loop:
|
||||||
|
lda @SPC_DATA,x ; 5 |
|
||||||
|
sta APUIO0 ; 4 |
|
||||||
|
lda @SPC_DATA+$40,x ; 5 |
|
||||||
|
sta APUIO1 ; 4 |
|
||||||
|
lda @SPC_DATA+$80,x ; 5 |
|
||||||
|
sta APUIO2 ; 4 |
|
||||||
|
lda @SPC_DATA+$C0,x ; 5 |
|
||||||
|
sta APUIO3 ; 4 |
|
||||||
|
tya ; 2 >> 38 cycles
|
||||||
|
-
|
||||||
|
cmp APUIO3 ; 4 |
|
||||||
|
bne - ; 3 |
|
||||||
|
dex ; 2 |
|
||||||
|
dey ; 2 |
|
||||||
|
bpl inner_transfer_loop ; 3 >> 14 cycles
|
||||||
|
|
||||||
|
rep #$21 : .al ; 3 |
|
||||||
|
txa ; 2 |
|
||||||
|
adc #$140 ; 3 |
|
||||||
|
tax ; 2 |
|
||||||
|
sep #$20 : .as ; 3 |
|
||||||
|
cpx #$003f ; 3 |
|
||||||
|
bne outer_transfer_loop ; 3 >> 19 cycles
|
||||||
|
|
||||||
|
rts
|
||||||
|
|
||||||
|
;---------------------------------------
|
||||||
|
upload_low_ram:
|
||||||
|
|
||||||
|
; ---- Upload $0002-$00EF using IPL
|
||||||
|
|
||||||
|
ldy #$0002
|
||||||
|
jsr spc_begin_upload
|
||||||
|
|
||||||
|
ldx #$0002
|
||||||
|
-
|
||||||
|
lda @SPC_DATA,x
|
||||||
|
jsr spc_upload_byte
|
||||||
|
inx
|
||||||
|
cpx #$00F0
|
||||||
|
bne -
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
; Executes final restoration code
|
||||||
|
restore_final:
|
||||||
|
jsr start_exec_io ; prepare execution from I/O registers
|
||||||
|
|
||||||
|
stz $420d ; SPC700 I/O code requires SLOW timing
|
||||||
|
|
||||||
|
; ---- Restore first two bytes of RAM
|
||||||
|
|
||||||
|
lda @SPC_DATA
|
||||||
|
xba
|
||||||
|
lda #$e8 ; MOV A,#@SPC_DATA
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
ldx #$00C4 ; MOV $00,A
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
lda @SPC_DATA+1
|
||||||
|
xba
|
||||||
|
lda #$e8 ; MOV A,#@SPC_DATA+1
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
ldx #$01C4 ; MOV $01,A
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
; ---- Restore SP
|
||||||
|
|
||||||
|
lda @SPC_HEADER+43
|
||||||
|
sec
|
||||||
|
sbc #3
|
||||||
|
xba
|
||||||
|
lda #$cd ; MOV X,#@SPC_HEADER+43
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
ldx #$bd ; MOV SP,X
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
; ---- Restore X
|
||||||
|
|
||||||
|
lda @SPC_HEADER+40
|
||||||
|
xba
|
||||||
|
lda #$cd ; MOV X,#@SPC_HEADER+40
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
; ---- Restore Y
|
||||||
|
|
||||||
|
lda @SPC_HEADER+41
|
||||||
|
xba
|
||||||
|
lda #$8d ; MOV Y,#@SPC_HEADER+41
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
; ---- Restore DSP FLG register
|
||||||
|
|
||||||
|
lda @SPC_DSP_REGS+$6c
|
||||||
|
xba
|
||||||
|
lda #$e8 ; MOV A,#@SPC_DSP_REGS+$6c
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
ldx #$f3C4 ; MOV $f3,A -> $f2 has been set-up before by SPC700 loader
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
; ---- wait a bit (the newer S-APU takes its time to ramp up the volume)
|
||||||
|
lda #$10
|
||||||
|
- pha
|
||||||
|
jsr waitblank
|
||||||
|
pla
|
||||||
|
dec
|
||||||
|
bne -
|
||||||
|
|
||||||
|
; ---- Restore DSP KON register
|
||||||
|
|
||||||
|
lda #$4C
|
||||||
|
xba
|
||||||
|
lda #$e8 ; MOV A,#$4c
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
ldx #$f2C4 ; MOV $f2,A
|
||||||
|
jsr exec_instr
|
||||||
|
lda @SPC_DSP_REGS+$4C
|
||||||
|
xba
|
||||||
|
lda #$e8 ; MOV A,#@SPC_DSP_REGS+$4c
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
ldx #$f3C4 ; MOV $f3,A
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
; ---- Restore DSP register address
|
||||||
|
|
||||||
|
lda @SPC_DATA+$F2
|
||||||
|
xba
|
||||||
|
lda #$e8 ; MOV A,#@SPC_DATA+$F2
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
ldx #$f2C4 ; MOV dest,A
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
; ---- Restore CONTROL register
|
||||||
|
|
||||||
|
lda @SPC_DATA+$F1
|
||||||
|
and #$CF ; don't clear input ports
|
||||||
|
xba
|
||||||
|
lda #$e8 ; MOV A,#@SPC_DATA+$F1
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
ldx #$f1C4 ; MOV $F1,A
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
;---- Restore A
|
||||||
|
|
||||||
|
lda @SPC_HEADER+39
|
||||||
|
xba
|
||||||
|
lda #$e8 ; MOV A,#@SPC_HEADER+39
|
||||||
|
tax
|
||||||
|
jsr exec_instr
|
||||||
|
|
||||||
|
;---- Restore PSW and PC
|
||||||
|
|
||||||
|
ldx #$7F00 ; NOP; RTI
|
||||||
|
stx APUIO0
|
||||||
|
lda #$FC ; Patch loop to execute instruction just written
|
||||||
|
sta APUIO3
|
||||||
|
|
||||||
|
;---- restore IO ports $f4 - $f7
|
||||||
|
|
||||||
|
rep #$20 : .al
|
||||||
|
lda @SPC_DATA+$F4
|
||||||
|
tax
|
||||||
|
lda @SPC_DATA+$F6
|
||||||
|
sta APUIO2
|
||||||
|
stx APUIO0 ; last to avoid overwriting RETI before run
|
||||||
|
sep #$20 : .as
|
||||||
|
|
||||||
|
lda #$01
|
||||||
|
sta $420d ; restore FAST CPU operation
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
spc_begin_upload:
|
||||||
|
|
||||||
|
sty APUIO2 ; Set address
|
||||||
|
|
||||||
|
ldy #$BBAA ; Wait for SPC
|
||||||
|
-
|
||||||
|
cpy APUIO0
|
||||||
|
bne -
|
||||||
|
|
||||||
|
lda #$CC ; Send acknowledgement
|
||||||
|
sta APUIO1
|
||||||
|
sta APUIO0
|
||||||
|
|
||||||
|
- ; Wait for acknowledgement
|
||||||
|
cmp APUIO0
|
||||||
|
bne -
|
||||||
|
|
||||||
|
ldy #0 ; Initialize index
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
spc_upload_byte:
|
||||||
|
sta APUIO1
|
||||||
|
|
||||||
|
tya ; Signal it's ready
|
||||||
|
sta APUIO0
|
||||||
|
- ; Wait for acknowledgement
|
||||||
|
cmp APUIO0
|
||||||
|
bne -
|
||||||
|
|
||||||
|
iny
|
||||||
|
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
spc_next_upload:
|
||||||
|
sty APUIO2
|
||||||
|
|
||||||
|
; Send command
|
||||||
|
; Special case operation has been fully tested.
|
||||||
|
lda APUIO0
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
bne +
|
||||||
|
inc
|
||||||
|
+
|
||||||
|
sta APUIO1
|
||||||
|
sta APUIO0
|
||||||
|
|
||||||
|
; Wait for acknowledgement
|
||||||
|
-
|
||||||
|
cmp APUIO0
|
||||||
|
bne -
|
||||||
|
|
||||||
|
ldy #0
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
spc_execute:
|
||||||
|
sty APUIO2
|
||||||
|
|
||||||
|
stz APUIO1
|
||||||
|
|
||||||
|
lda APUIO0
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
sta APUIO0
|
||||||
|
|
||||||
|
; Wait for acknowledgement
|
||||||
|
-
|
||||||
|
cmp APUIO0
|
||||||
|
bne -
|
||||||
|
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
start_exec_io:
|
||||||
|
; Set execution address
|
||||||
|
ldx #$00F5
|
||||||
|
stx APUIO2
|
||||||
|
|
||||||
|
stz APUIO1 ; NOP
|
||||||
|
ldx #$FE2F ; BRA *-2
|
||||||
|
|
||||||
|
; Signal to SPC that we're ready
|
||||||
|
lda APUIO0
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
sta APUIO0
|
||||||
|
|
||||||
|
; Wait for acknowledgement
|
||||||
|
-
|
||||||
|
cmp APUIO0
|
||||||
|
bne -
|
||||||
|
|
||||||
|
; Quickly write branch
|
||||||
|
stx APUIO2
|
||||||
|
|
||||||
|
rts
|
||||||
|
;---------------------------------------
|
||||||
|
exec_instr:
|
||||||
|
; Replace instruction
|
||||||
|
stx APUIO0
|
||||||
|
lda #$FC
|
||||||
|
sta APUIO3 ; 30
|
||||||
|
|
||||||
|
; SPC BRA loop takes 4 cycles, so it reads
|
||||||
|
; the branch offset every 4 SPC cycles (84 master).
|
||||||
|
; We must handle the case where it read just before
|
||||||
|
; the write above, and when it reads just after it.
|
||||||
|
; If it reads just after, we have at least 7 SPC
|
||||||
|
; cycles (147 master) to change restore the branch
|
||||||
|
; offset.
|
||||||
|
|
||||||
|
; 48 minimum, 90 maximum
|
||||||
|
ora #0
|
||||||
|
ora #0
|
||||||
|
ora #0
|
||||||
|
nop
|
||||||
|
nop
|
||||||
|
nop
|
||||||
|
|
||||||
|
; 66 delay, about the middle of the above limits
|
||||||
|
phd ;4
|
||||||
|
pld ;5
|
||||||
|
|
||||||
|
; Give plenty of extra time if single execution
|
||||||
|
; isn't needed, as this avoids such tight timing
|
||||||
|
; requirements.
|
||||||
|
|
||||||
|
; phd ;4
|
||||||
|
; pld ;5
|
||||||
|
; phd ;4
|
||||||
|
; pld ;5
|
||||||
|
|
||||||
|
; Patch loop to skip first two bytes
|
||||||
|
lda #$FE ; 16
|
||||||
|
sta APUIO3 ; 30
|
||||||
|
|
||||||
|
; 38 minimum (assuming 66 delay above)
|
||||||
|
phd ; 4
|
||||||
|
pld ; 5
|
||||||
|
|
||||||
|
; Give plenty of extra time if single execution
|
||||||
|
; isn't needed, as this avoids such tight timing
|
||||||
|
; requirements.
|
||||||
|
|
||||||
|
phd
|
||||||
|
pld
|
||||||
|
phd
|
||||||
|
pld
|
||||||
|
rts
|
||||||
134
snes/sysinfo.a65
Normal file
134
snes/sysinfo.a65
Normal file
@@ -0,0 +1,134 @@
|
|||||||
|
#include "memmap.i65"
|
||||||
|
|
||||||
|
; sysinfo.a65: display sysinfo text block
|
||||||
|
.byt "===SHOW_SYSINFO==="
|
||||||
|
show_sysinfo:
|
||||||
|
php
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
stz bar_wl
|
||||||
|
dec bar_wl
|
||||||
|
stz bar_xl
|
||||||
|
dec bar_xl
|
||||||
|
stz bar_yl
|
||||||
|
dec bar_yl
|
||||||
|
jsr backup_screen
|
||||||
|
lda #^text_mm_sysinfo
|
||||||
|
sta window_tbank
|
||||||
|
ldx #!text_mm_sysinfo
|
||||||
|
stx window_taddr
|
||||||
|
lda @sysinfo_win_x
|
||||||
|
sta window_x
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
pha
|
||||||
|
stz print_x+1
|
||||||
|
lda @sysinfo_win_y
|
||||||
|
sta window_y
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
pha
|
||||||
|
stz print_y+1
|
||||||
|
lda @sysinfo_win_w
|
||||||
|
sta window_w
|
||||||
|
lda @sysinfo_win_h
|
||||||
|
sta window_h
|
||||||
|
jsr draw_window
|
||||||
|
stz print_pal
|
||||||
|
|
||||||
|
ldx #38
|
||||||
|
copy_snes_system_text:
|
||||||
|
lda @text_system,x
|
||||||
|
sta @snes_system_config,x
|
||||||
|
dex
|
||||||
|
bpl copy_snes_system_text
|
||||||
|
|
||||||
|
sysinfo_printloop:
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
lda #CMD_SYSINFO
|
||||||
|
sta @MCU_CMD
|
||||||
|
lda #^SYSINFO_BLK
|
||||||
|
ldx #!SYSINFO_BLK
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
stz print_pal
|
||||||
|
pla
|
||||||
|
sta print_y
|
||||||
|
pla
|
||||||
|
sta print_x
|
||||||
|
lda #40
|
||||||
|
sta print_count
|
||||||
|
lda #12
|
||||||
|
- pha
|
||||||
|
jsr hiprint
|
||||||
|
inc print_y
|
||||||
|
rep #$20 : .al
|
||||||
|
lda print_src
|
||||||
|
clc
|
||||||
|
adc #40
|
||||||
|
sta print_src
|
||||||
|
sep #$20 : .as
|
||||||
|
pla
|
||||||
|
dec
|
||||||
|
bne -
|
||||||
|
|
||||||
|
ldx #24
|
||||||
|
lda $213e
|
||||||
|
and #$0f
|
||||||
|
clc
|
||||||
|
adc #$30
|
||||||
|
sta @snes_system_config,x
|
||||||
|
|
||||||
|
ldx #38
|
||||||
|
lda $213f
|
||||||
|
and #$0f
|
||||||
|
clc
|
||||||
|
adc #$30
|
||||||
|
sta @snes_system_config,x
|
||||||
|
|
||||||
|
ldx #10
|
||||||
|
lda $4210
|
||||||
|
and #$0f
|
||||||
|
clc
|
||||||
|
adc #$30
|
||||||
|
sta @snes_system_config,x
|
||||||
|
|
||||||
|
lda #^snes_system_config ; System text
|
||||||
|
ldx #!snes_system_config
|
||||||
|
sta print_bank
|
||||||
|
stx print_src
|
||||||
|
stz print_pal
|
||||||
|
lda #39
|
||||||
|
sta print_count
|
||||||
|
lda #23
|
||||||
|
sta print_y
|
||||||
|
lda #12
|
||||||
|
sta print_x
|
||||||
|
jsr hiprint
|
||||||
|
|
||||||
|
- lda isr_done
|
||||||
|
lsr
|
||||||
|
bcc -
|
||||||
|
jsr printtime
|
||||||
|
jsr read_pad
|
||||||
|
lda #$80
|
||||||
|
and pad1trig
|
||||||
|
bne +
|
||||||
|
lda #$80
|
||||||
|
and pad1trig+1
|
||||||
|
bne +
|
||||||
|
lda @sysinfo_win_x
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
pha
|
||||||
|
lda @sysinfo_win_y
|
||||||
|
inc
|
||||||
|
inc
|
||||||
|
pha
|
||||||
|
jmp sysinfo_printloop
|
||||||
|
+ plp
|
||||||
|
jsr restore_screen
|
||||||
|
lda #$00
|
||||||
|
sta @MCU_CMD
|
||||||
|
rtl
|
||||||
17
snes/tests/Makefile
Normal file
17
snes/tests/Makefile
Normal file
@@ -0,0 +1,17 @@
|
|||||||
|
OBJS = header.ips reset.o65 tests.o65
|
||||||
|
|
||||||
|
all: test.bin
|
||||||
|
|
||||||
|
test.bin: $(OBJS)
|
||||||
|
sneslink -fsmc -o $@ $^
|
||||||
|
|
||||||
|
# Generic rule to create .o65 out from .a65
|
||||||
|
%.o65: %.a65
|
||||||
|
snescom -J -Wall -o $@ $<
|
||||||
|
|
||||||
|
# Generic rule to create .ips out from .a65
|
||||||
|
%.ips: %.a65
|
||||||
|
snescom -I -J -Wall -o $@ $<
|
||||||
|
|
||||||
|
clean:
|
||||||
|
rm -f *.ips *.o65 *~ test.bin
|
||||||
121
snes/tests/header.a65
Normal file
121
snes/tests/header.a65
Normal file
@@ -0,0 +1,121 @@
|
|||||||
|
; This file is part of the snescom-asm demo - a demo of how to build a SNES program.
|
||||||
|
; See http://bisqwit.iki.fi/source/snescom.html for details.
|
||||||
|
|
||||||
|
; Begin assembling to this address.
|
||||||
|
*= $C0F000
|
||||||
|
LINETEST:
|
||||||
|
sei
|
||||||
|
clc
|
||||||
|
xce
|
||||||
|
- lda $0000
|
||||||
|
lda $2100
|
||||||
|
sta $2100
|
||||||
|
bra -
|
||||||
|
|
||||||
|
*= $C0F100
|
||||||
|
IRQTEST:
|
||||||
|
sei
|
||||||
|
clc
|
||||||
|
xce
|
||||||
|
cli
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
lda #$0f
|
||||||
|
sta $2100
|
||||||
|
lda #$ff
|
||||||
|
sta $4209
|
||||||
|
lda #$ff
|
||||||
|
sta $420a
|
||||||
|
lda #$ff
|
||||||
|
sta $4200
|
||||||
|
lda #$01
|
||||||
|
- sta @$002222
|
||||||
|
bra -
|
||||||
|
|
||||||
|
*= $C0F200
|
||||||
|
BANKTEST:
|
||||||
|
sei
|
||||||
|
clc
|
||||||
|
xce
|
||||||
|
sep #$20 : .as
|
||||||
|
lda #$01
|
||||||
|
sta @$0055aa
|
||||||
|
- bra -
|
||||||
|
|
||||||
|
*= $C0FF00
|
||||||
|
|
||||||
|
RESET:
|
||||||
|
sei
|
||||||
|
clc
|
||||||
|
xce
|
||||||
|
rep #$20 : .al
|
||||||
|
lda #$1fff
|
||||||
|
tcs
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
jmp @GAME_MAIN
|
||||||
|
|
||||||
|
NMI_16bit:
|
||||||
|
php
|
||||||
|
rep #$30 : .al : .xl
|
||||||
|
pha: phx: phy: phd: phb
|
||||||
|
jsl @NMI_ROUTINE
|
||||||
|
rep #$30 : .al : .xl
|
||||||
|
int_exit:
|
||||||
|
plb: pld: ply: plx: pla
|
||||||
|
plp
|
||||||
|
rti
|
||||||
|
|
||||||
|
IRQ_16bit:
|
||||||
|
ABT_8bit: ABT_16bit:
|
||||||
|
php
|
||||||
|
rep #$30 : .al : .xl
|
||||||
|
pha: phx: phy: phd: phb
|
||||||
|
jsl @IRQ_ROUTINE
|
||||||
|
rep #$30 : .al : .xl
|
||||||
|
bra int_exit
|
||||||
|
|
||||||
|
;error vectors
|
||||||
|
BRK_8bit: BRK_16bit:
|
||||||
|
COP_8bit: COP_16bit:
|
||||||
|
IRQ_8bit:
|
||||||
|
NMI_8bit:
|
||||||
|
- wai: lda $ABCDEF : bra -
|
||||||
|
|
||||||
|
*= $C0FFB0
|
||||||
|
; Zero the area from $FFB0 - $FFFF
|
||||||
|
; to ensure that the linker won't get clever
|
||||||
|
; and fill it with small pieces of code.
|
||||||
|
.word 0,0,0,0, 0,0,0,0
|
||||||
|
.word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0
|
||||||
|
.word 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0
|
||||||
|
|
||||||
|
*= $C0FFB0
|
||||||
|
|
||||||
|
.byt "MR" ;2 bytes - company id
|
||||||
|
.byt "TEST" ;4 bytes - rom id
|
||||||
|
|
||||||
|
*= $C0FFC0
|
||||||
|
.byt "SD2SNES TESTS "
|
||||||
|
;123456789012345678901; - max 21 chars
|
||||||
|
|
||||||
|
*= $C0FFD5 .byt $31 ;rom speed
|
||||||
|
*= $C0FFD6 .byt $02 ;rom type
|
||||||
|
*= $C0FFD7 .byt $06 ;rom size 64 kByte
|
||||||
|
*= $C0FFD8 .byt $03 ;sram size 8 kBit
|
||||||
|
*= $C0FFD9 .byt $09 ;rom region 4 = Finland
|
||||||
|
*= $C0FFDA .byt $33 ;company id flag
|
||||||
|
|
||||||
|
*= $C0FFDC .word 0,0 ;checksums
|
||||||
|
|
||||||
|
*= $C0FFE4 .word COP_16bit
|
||||||
|
*= $C0FFE6 .word BRK_16bit
|
||||||
|
*= $C0FFE8 .word ABT_16bit
|
||||||
|
*= $C0FFEA .word NMI_16bit
|
||||||
|
*= $C0FFEE .word IRQ_16bit
|
||||||
|
*= $C0FFF4 .word COP_8bit
|
||||||
|
*= $C0FFF8 .word ABT_8bit
|
||||||
|
*= $C0FFFA .word NMI_8bit
|
||||||
|
*= $C0FFFC .word RESET
|
||||||
|
*= $C0FFFE .word BRK_8bit
|
||||||
|
*= $C0FFFE .word IRQ_8bit
|
||||||
29
snes/tests/reset.a65
Normal file
29
snes/tests/reset.a65
Normal file
@@ -0,0 +1,29 @@
|
|||||||
|
; This file is part of the snescom-asm demo - a demo of how to build a SNES program.
|
||||||
|
; See http://bisqwit.iki.fi/source/snescom.html for details.
|
||||||
|
|
||||||
|
; NMI - called on VBlank
|
||||||
|
NMI_ROUTINE:
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
lda #$00
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
|
||||||
|
lda $4210 ; ack interrupt
|
||||||
|
|
||||||
|
rtl
|
||||||
|
|
||||||
|
; IRQ - called when triggered
|
||||||
|
IRQ_ROUTINE:
|
||||||
|
sep #$20 : .as
|
||||||
|
lda $4211 ;Acknowledge irq
|
||||||
|
lda #$00
|
||||||
|
sta @$002121
|
||||||
|
lda #$ff
|
||||||
|
sta @$002122
|
||||||
|
lda #$01
|
||||||
|
sta @$002122
|
||||||
|
lda #$5A
|
||||||
|
sta @$F00000
|
||||||
|
rtl
|
||||||
|
|
||||||
564
snes/tests/tests.a65
Normal file
564
snes/tests/tests.a65
Normal file
@@ -0,0 +1,564 @@
|
|||||||
|
GAME_MAIN:
|
||||||
|
sep #$20 : .as
|
||||||
|
stz $4200 ; inhibit VBlank NMI
|
||||||
|
lda #$01
|
||||||
|
sta $420d ; fast cpu
|
||||||
|
jsr killdma
|
||||||
|
jsr waitblank
|
||||||
|
lda #$00
|
||||||
|
sta @$f00000
|
||||||
|
sta @$f00001
|
||||||
|
sta @$f00002
|
||||||
|
sta @$f00003
|
||||||
|
lda #$00
|
||||||
|
sta @$f01fff
|
||||||
|
jsr snes_init
|
||||||
|
jsr video_init
|
||||||
|
jsr linetest
|
||||||
|
jsr batest
|
||||||
|
jsr snes_init
|
||||||
|
jsr video_init
|
||||||
|
jsr copy_memtest
|
||||||
|
jsr irqtest
|
||||||
|
jsl $7e1800
|
||||||
|
- bra -
|
||||||
|
|
||||||
|
copy_memtest:
|
||||||
|
rep #$30 : .al : .xl
|
||||||
|
lda #$0300
|
||||||
|
ldx #!memtest
|
||||||
|
ldy #$1800
|
||||||
|
mvn $7e, ^memtest
|
||||||
|
rts
|
||||||
|
|
||||||
|
linetest
|
||||||
|
sep #$20 : .as
|
||||||
|
lda #$00
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
- lda $0000
|
||||||
|
lda $2100
|
||||||
|
sta $21ff
|
||||||
|
lda @$f01fff
|
||||||
|
cmp #$01
|
||||||
|
bne -
|
||||||
|
rts
|
||||||
|
|
||||||
|
irqtest:
|
||||||
|
cli
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
lda #$0f
|
||||||
|
sta $2100
|
||||||
|
lda #$ff
|
||||||
|
sta $4209
|
||||||
|
lda #$ff
|
||||||
|
sta $420a
|
||||||
|
lda #$ff
|
||||||
|
sta $4200
|
||||||
|
sta @$f00000
|
||||||
|
lda #$01
|
||||||
|
sta @$002222
|
||||||
|
rts
|
||||||
|
|
||||||
|
batest:
|
||||||
|
sei
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
lda #$00
|
||||||
|
ldx #$2100
|
||||||
|
- sta !$0, x
|
||||||
|
inx
|
||||||
|
inc
|
||||||
|
bne -
|
||||||
|
lda #$e0
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
lda #$00
|
||||||
|
ldx #$0000
|
||||||
|
- cmp !$0, x
|
||||||
|
bne batest_fail
|
||||||
|
inx
|
||||||
|
inc
|
||||||
|
bne -
|
||||||
|
lda #$5a
|
||||||
|
sta @$f00002
|
||||||
|
lda #$00
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
rts
|
||||||
|
batest_fail:
|
||||||
|
lda #$ff
|
||||||
|
sta @$f00002
|
||||||
|
lda #$00
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
rts
|
||||||
|
|
||||||
|
memtest:
|
||||||
|
; test 4 areas: 00-3f:8000-ffff
|
||||||
|
; 40-7d:0000-ffff
|
||||||
|
; 80-bf:8000-ffff
|
||||||
|
; 80-ff:0000-ffff
|
||||||
|
sep #$20 : .as
|
||||||
|
rep #$10 : .xl
|
||||||
|
|
||||||
|
lda #$01
|
||||||
|
sta @$003333 ; switch to linear memory mode
|
||||||
|
ldx #$8000
|
||||||
|
stx $00
|
||||||
|
ldx #$8000
|
||||||
|
stx $10
|
||||||
|
lda #$00
|
||||||
|
sta $03 ; bank no.
|
||||||
|
mem0_writeloop0:
|
||||||
|
; switch bank
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
lda #$01
|
||||||
|
sta @$003333
|
||||||
|
- lda $03
|
||||||
|
clc
|
||||||
|
adc $01
|
||||||
|
clc
|
||||||
|
adc $00
|
||||||
|
sta !$0000, x
|
||||||
|
inx
|
||||||
|
stx $00
|
||||||
|
bne -
|
||||||
|
ldx $10
|
||||||
|
inc $03
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
sta @$f00003
|
||||||
|
cmp #$40
|
||||||
|
bne mem0_writeloop0
|
||||||
|
|
||||||
|
ldx #$0000
|
||||||
|
stx $10
|
||||||
|
mem0_writeloop1:
|
||||||
|
; switch bank
|
||||||
|
lda #$01
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
- lda $03
|
||||||
|
clc
|
||||||
|
adc $01
|
||||||
|
clc
|
||||||
|
adc $00
|
||||||
|
sta !$0000, x
|
||||||
|
inx
|
||||||
|
stx $00
|
||||||
|
bne -
|
||||||
|
ldx $10
|
||||||
|
inc $03
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
sta @$f00003
|
||||||
|
cmp #$7e
|
||||||
|
bne mem0_writeloop1
|
||||||
|
|
||||||
|
ldx #$8000
|
||||||
|
stx $10
|
||||||
|
lda #$80
|
||||||
|
sta $03 ; bank no.
|
||||||
|
mem0_writeloop2:
|
||||||
|
; switch bank
|
||||||
|
lda #$01
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
- lda $03
|
||||||
|
clc
|
||||||
|
adc $01
|
||||||
|
clc
|
||||||
|
adc $00
|
||||||
|
sta !$0000, x
|
||||||
|
inx
|
||||||
|
stx $00
|
||||||
|
bne -
|
||||||
|
ldx $10
|
||||||
|
inc $03
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
sta @$f00003
|
||||||
|
cmp #$c0
|
||||||
|
bne mem0_writeloop2
|
||||||
|
ldx #$0000
|
||||||
|
stx $10
|
||||||
|
mem0_writeloop3:
|
||||||
|
; switch bank
|
||||||
|
lda #$01
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
- lda $03
|
||||||
|
clc
|
||||||
|
adc $01
|
||||||
|
clc
|
||||||
|
adc $00
|
||||||
|
sta !$0000, x
|
||||||
|
inx
|
||||||
|
stx $00
|
||||||
|
bne -
|
||||||
|
ldx $10
|
||||||
|
inc $03
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
sta @$f00003
|
||||||
|
bne mem0_writeloop3
|
||||||
|
|
||||||
|
lda #$00
|
||||||
|
sta @$002121
|
||||||
|
lda #$ff
|
||||||
|
sta @$002122
|
||||||
|
lda #$03
|
||||||
|
sta @$002122
|
||||||
|
|
||||||
|
ldx #$8000
|
||||||
|
stx $00
|
||||||
|
ldx #$8000
|
||||||
|
stx $10
|
||||||
|
lda #$00
|
||||||
|
sta $03 ; bank no.
|
||||||
|
mem0_verifyloop0:
|
||||||
|
; switch bank
|
||||||
|
lda #$01
|
||||||
|
sta @$f00001
|
||||||
|
lda #$01
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
- lda $03
|
||||||
|
clc
|
||||||
|
adc $01
|
||||||
|
clc
|
||||||
|
adc $00
|
||||||
|
cmp !$0000, x
|
||||||
|
bne mem0_fail
|
||||||
|
inx
|
||||||
|
stx $00
|
||||||
|
bne -
|
||||||
|
ldx $10
|
||||||
|
inc $03
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
sta @$f00003
|
||||||
|
cmp #$40
|
||||||
|
bne mem0_verifyloop0
|
||||||
|
|
||||||
|
ldx #$0000
|
||||||
|
stx $10
|
||||||
|
mem0_verifyloop1:
|
||||||
|
; switch bank
|
||||||
|
lda #$01
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
- lda $03
|
||||||
|
clc
|
||||||
|
adc $01
|
||||||
|
clc
|
||||||
|
adc $00
|
||||||
|
cmp !$0000, x
|
||||||
|
bne mem0_fail
|
||||||
|
inx
|
||||||
|
stx $00
|
||||||
|
bne -
|
||||||
|
ldx $10
|
||||||
|
inc $03
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
sta @$f00003
|
||||||
|
cmp #$7e
|
||||||
|
bne mem0_verifyloop1
|
||||||
|
|
||||||
|
ldx #$8000
|
||||||
|
stx $10
|
||||||
|
lda #$80
|
||||||
|
sta $03 ; bank no.
|
||||||
|
bra mem0_verifyloop2
|
||||||
|
mem0_fail:
|
||||||
|
lda #$00
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
sta @$003333
|
||||||
|
rep #$20 : .al
|
||||||
|
lda $00
|
||||||
|
sta @$f00004
|
||||||
|
sep #$20 : .as
|
||||||
|
lda $03
|
||||||
|
sta @$f00006
|
||||||
|
lda #$ff
|
||||||
|
sta @$f00001
|
||||||
|
rtl
|
||||||
|
mem0_verifyloop2:
|
||||||
|
; switch bank
|
||||||
|
lda #$01
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
- lda $03
|
||||||
|
clc
|
||||||
|
adc $01
|
||||||
|
clc
|
||||||
|
adc $00
|
||||||
|
cmp !$0000, x
|
||||||
|
bne mem0_fail
|
||||||
|
inx
|
||||||
|
stx $00
|
||||||
|
bne -
|
||||||
|
ldx $10
|
||||||
|
inc $03
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
sta @$f00003
|
||||||
|
cmp #$c0
|
||||||
|
bne mem0_verifyloop2
|
||||||
|
|
||||||
|
ldx #$0000
|
||||||
|
stx $10
|
||||||
|
mem0_verifyloop3:
|
||||||
|
; switch bank
|
||||||
|
lda #$01
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
- lda $03
|
||||||
|
clc
|
||||||
|
adc $01
|
||||||
|
clc
|
||||||
|
adc $00
|
||||||
|
cmp !$0000, x
|
||||||
|
bne mem0_fail
|
||||||
|
inx
|
||||||
|
stx $00
|
||||||
|
bne -
|
||||||
|
ldx $10
|
||||||
|
inc $03
|
||||||
|
lda #$00
|
||||||
|
sta @$003333
|
||||||
|
lda $03
|
||||||
|
sta @$f00003
|
||||||
|
bne mem0_verifyloop3
|
||||||
|
|
||||||
|
lda #$00
|
||||||
|
sta @$002121
|
||||||
|
lda #$e0
|
||||||
|
sta @$002122
|
||||||
|
lda #$03
|
||||||
|
sta @$002122
|
||||||
|
|
||||||
|
lda #$00
|
||||||
|
pha
|
||||||
|
plb
|
||||||
|
sta @$003333
|
||||||
|
lda #$5a
|
||||||
|
sta @$f00001
|
||||||
|
rtl
|
||||||
|
rtl
|
||||||
|
rtl
|
||||||
|
rtl
|
||||||
|
rtl
|
||||||
|
rtl
|
||||||
|
|
||||||
|
killdma:
|
||||||
|
stz $420b
|
||||||
|
stz $420c
|
||||||
|
stz $4310
|
||||||
|
stz $4311
|
||||||
|
stz $4312
|
||||||
|
stz $4313
|
||||||
|
stz $4314
|
||||||
|
stz $4320
|
||||||
|
stz $4321
|
||||||
|
stz $4322
|
||||||
|
stz $4323
|
||||||
|
stz $4324
|
||||||
|
stz $4330
|
||||||
|
stz $4331
|
||||||
|
stz $4332
|
||||||
|
stz $4333
|
||||||
|
stz $4334
|
||||||
|
stz $4340
|
||||||
|
stz $4341
|
||||||
|
stz $4342
|
||||||
|
stz $4343
|
||||||
|
stz $4344
|
||||||
|
stz $4350
|
||||||
|
stz $4351
|
||||||
|
stz $4352
|
||||||
|
stz $4353
|
||||||
|
stz $4354
|
||||||
|
stz $4360
|
||||||
|
stz $4361
|
||||||
|
stz $4362
|
||||||
|
stz $4363
|
||||||
|
stz $4364
|
||||||
|
rts
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
waitblank:
|
||||||
|
- lda $4212
|
||||||
|
and #$80
|
||||||
|
bne -
|
||||||
|
- lda $4212
|
||||||
|
and #$80
|
||||||
|
beq -
|
||||||
|
rts
|
||||||
|
|
||||||
|
video_init:
|
||||||
|
sep #$20 : .as ;8-bit accumulator
|
||||||
|
rep #$10 : .xl ;16-bit index
|
||||||
|
lda #$03 ;mode 3, mode 5 via HDMA :D
|
||||||
|
sta $2105
|
||||||
|
lda #$58 ;Tilemap addr 0xB000
|
||||||
|
ora #$02 ;SC size 32x64
|
||||||
|
sta $2107 ;for BG1
|
||||||
|
lda #$50 ;Tilemap addr 0xA000
|
||||||
|
ora #$02 ;SC size 32x64
|
||||||
|
sta $2108 ;for BG2
|
||||||
|
lda #$40 ;chr base addr:
|
||||||
|
sta $210b ;BG1=0x0000, BG2=0x8000
|
||||||
|
lda #$01 ;cut off leftmost subscreen pixel garbage
|
||||||
|
sta $2126
|
||||||
|
lda #$fe
|
||||||
|
sta $2127
|
||||||
|
lda #$10
|
||||||
|
sta $2130
|
||||||
|
lda #$1f
|
||||||
|
sta $212e
|
||||||
|
sta $212f
|
||||||
|
stz $2121
|
||||||
|
lda #$0f
|
||||||
|
sta $2100 ;screen on, full brightness
|
||||||
|
stz $2121
|
||||||
|
lda #$1f ;red background
|
||||||
|
sta $2122
|
||||||
|
stz $2122
|
||||||
|
rts
|
||||||
|
|
||||||
|
snes_init:
|
||||||
|
sep #$20 : .as ;8-bit accumulator
|
||||||
|
rep #$10 : .xl ;16-bit index
|
||||||
|
stz $4200 ;
|
||||||
|
lda #$ff
|
||||||
|
sta $4201 ;
|
||||||
|
stz $4202 ;
|
||||||
|
stz $4203 ;
|
||||||
|
stz $4204 ;
|
||||||
|
stz $4205 ;
|
||||||
|
stz $4206 ;
|
||||||
|
stz $4207 ;
|
||||||
|
stz $4208 ;
|
||||||
|
stz $4209 ;
|
||||||
|
stz $420a ;
|
||||||
|
stz $420b ;
|
||||||
|
stz $420c ;
|
||||||
|
lda #$8f
|
||||||
|
sta $2100 ;INIDISP: force blank
|
||||||
|
lda #$03 ; 8x8+16x16; name=0; base=3
|
||||||
|
sta $2101 ;
|
||||||
|
stz $2102 ;
|
||||||
|
stz $2103 ;
|
||||||
|
; stz $2104 ; (OAM Data?!)
|
||||||
|
; stz $2104 ; (OAM Data?!)
|
||||||
|
stz $2105 ;
|
||||||
|
stz $2106 ;
|
||||||
|
stz $2107 ;
|
||||||
|
stz $2108 ;
|
||||||
|
stz $2109 ;
|
||||||
|
stz $210a ;
|
||||||
|
stz $210b ;
|
||||||
|
stz $210c ;
|
||||||
|
stz $210d ;
|
||||||
|
stz $210d ;
|
||||||
|
stz $210e ;
|
||||||
|
stz $210e ;
|
||||||
|
stz $210f ;
|
||||||
|
stz $210f ;
|
||||||
|
lda #$05
|
||||||
|
sta $2110 ;
|
||||||
|
stz $2110 ;
|
||||||
|
stz $2111 ;
|
||||||
|
stz $2111 ;
|
||||||
|
stz $2112 ;
|
||||||
|
stz $2112 ;
|
||||||
|
stz $2113 ;
|
||||||
|
stz $2113 ;
|
||||||
|
stz $2114 ;
|
||||||
|
stz $2114 ;
|
||||||
|
lda #$80
|
||||||
|
sta $2115 ;
|
||||||
|
stz $2116 ;
|
||||||
|
stz $2117 ;
|
||||||
|
; stz $2118 ;(VRAM Data?!)
|
||||||
|
; stz $2119 ;(VRAM Data?!)
|
||||||
|
stz $211a ;
|
||||||
|
stz $211b ;
|
||||||
|
lda #$01
|
||||||
|
sta $211b ;
|
||||||
|
stz $211c ;
|
||||||
|
stz $211c ;
|
||||||
|
stz $211d ;
|
||||||
|
stz $211d ;
|
||||||
|
stz $211e ;
|
||||||
|
sta $211e ;
|
||||||
|
stz $211f ;
|
||||||
|
stz $211f ;
|
||||||
|
stz $2120 ;
|
||||||
|
stz $2120 ;
|
||||||
|
stz $2121 ;
|
||||||
|
; stz $2122 ; (CG Data?!)
|
||||||
|
; stz $2122 ; (CG Data?!)
|
||||||
|
stz $2123 ;
|
||||||
|
stz $2124 ;
|
||||||
|
stz $2125 ;
|
||||||
|
stz $2126 ;
|
||||||
|
stz $2127 ;
|
||||||
|
stz $2128 ;
|
||||||
|
stz $2129 ;
|
||||||
|
stz $212a ;
|
||||||
|
stz $212b ;
|
||||||
|
stz $212c ;
|
||||||
|
stz $212d ;
|
||||||
|
stz $212e ;
|
||||||
|
stz $212f ;
|
||||||
|
lda #$30
|
||||||
|
sta $2130 ;
|
||||||
|
stz $2131 ;
|
||||||
|
lda #$e0
|
||||||
|
sta $2132 ;
|
||||||
|
stz $2133 ;
|
||||||
|
;clear WRAM lower page
|
||||||
|
; ldx #$0200
|
||||||
|
; stx $2181
|
||||||
|
; lda #$00
|
||||||
|
; sta $2183
|
||||||
|
; DMA0(#$08, #$FF00, #^zero, #!zero, #$80)
|
||||||
|
; ldx #$0000
|
||||||
|
; stx $2181
|
||||||
|
; lda #$00
|
||||||
|
; sta $2183
|
||||||
|
; DMA0(#$08, #$1e0, #^zero, #!zero, #$80)
|
||||||
|
|
||||||
|
rts
|
||||||
|
|
||||||
|
|
||||||
232
snes/text.a65
232
snes/text.a65
@@ -1,133 +1,95 @@
|
|||||||
.text
|
.text
|
||||||
#include "memmap.i65"
|
#include "memmap.i65"
|
||||||
|
.byt "===HIPRINT==="
|
||||||
|
; input:
|
||||||
|
; print_count
|
||||||
|
; print_x
|
||||||
|
; print_y
|
||||||
|
; print_src
|
||||||
|
; print_bank
|
||||||
|
; print_pal
|
||||||
|
;
|
||||||
|
; output:
|
||||||
|
; print_done (# of chars printed)
|
||||||
|
; print_over (char after print_count)
|
||||||
|
|
||||||
hiprint:
|
hiprint:
|
||||||
|
php
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda print_count
|
rep #$10 : .xl
|
||||||
sta print_count_tmp
|
ldx print_src
|
||||||
rep #$30 : .xl : .al
|
stx print_ptr
|
||||||
stz print_done
|
lda print_bank
|
||||||
lda print_x
|
sta print_ptr+2
|
||||||
and #$00ff
|
phb
|
||||||
lsr
|
lda #$7e
|
||||||
bcs print_bg1
|
|
||||||
ldx #!BG1_TILE_BUF ; for 2nd loop
|
|
||||||
phx
|
|
||||||
ldx #!BG2_TILE_BUF ; for 1st loop
|
|
||||||
phx
|
|
||||||
bra print_bg_cont
|
|
||||||
print_bg1
|
|
||||||
ldx #!BG2_TILE_BUF+2 ; for 2nd loop
|
|
||||||
phx
|
|
||||||
ldx #!BG1_TILE_BUF ; for 1st loop da whoop
|
|
||||||
phx
|
|
||||||
bra print_bg_cont
|
|
||||||
print_bg_cont
|
|
||||||
sta !print_temp
|
|
||||||
lda !print_y
|
|
||||||
and #$00ff
|
|
||||||
asl
|
|
||||||
asl
|
|
||||||
asl
|
|
||||||
asl
|
|
||||||
asl
|
|
||||||
clc
|
|
||||||
adc !print_temp
|
|
||||||
asl ; double the offset for WRAM addressing
|
|
||||||
tay ; zonday
|
|
||||||
plx
|
|
||||||
phy ; offset from tilemap start
|
|
||||||
stx !print_temp
|
|
||||||
clc
|
|
||||||
adc !print_temp
|
|
||||||
; we need to transfer to WRAM and from there to VRAM via DMA during VBLANK
|
|
||||||
; because VRAM can only be accessed during VBLANK and forced blanking.
|
|
||||||
sta $2181
|
|
||||||
sep #$20 : .as
|
|
||||||
lda #$7f ;we really only need bit 0. full bank given for clarity
|
|
||||||
sta $2183
|
|
||||||
print_loop
|
|
||||||
ldx !print_src
|
|
||||||
lda !print_bank
|
|
||||||
pha
|
|
||||||
plb
|
|
||||||
phx ; source addr
|
|
||||||
print_loop_inner
|
|
||||||
lda !0,x
|
|
||||||
asl
|
|
||||||
sta @$2180
|
|
||||||
lda @print_pal
|
|
||||||
asl
|
|
||||||
asl
|
|
||||||
adc #$00
|
|
||||||
ora #$20
|
|
||||||
sta @$2180
|
|
||||||
lda @print_done
|
|
||||||
inc
|
|
||||||
sta @print_done
|
|
||||||
inx
|
|
||||||
lda !0,x
|
|
||||||
beq print_loop2
|
|
||||||
inx
|
|
||||||
lda !0,x
|
|
||||||
beq print_loop2
|
|
||||||
lda @print_count_tmp
|
|
||||||
dec
|
|
||||||
dec
|
|
||||||
sta @print_count_tmp
|
|
||||||
beq print_loop2
|
|
||||||
bmi print_loop2
|
|
||||||
bra print_loop_inner
|
|
||||||
print_loop2
|
|
||||||
lda @print_count
|
|
||||||
dec
|
|
||||||
sta @print_count_tmp
|
|
||||||
lda #$00
|
|
||||||
pha
|
pha
|
||||||
plb
|
plb
|
||||||
rep #$30 : .al : .xl
|
rep #$30 : .al : .xl
|
||||||
ply ; source addr
|
lda print_pal
|
||||||
iny
|
and #$00ff
|
||||||
pla ; offset from tilemap start
|
xba
|
||||||
plx ; other tilemap addr
|
asl
|
||||||
stx !print_temp
|
asl
|
||||||
|
ora #$2000
|
||||||
|
sta print_temp
|
||||||
|
lda print_count
|
||||||
|
and #$00ff
|
||||||
|
beq hiprint_end
|
||||||
|
tay
|
||||||
|
lda print_x
|
||||||
|
and #$00ff
|
||||||
|
sta print_x
|
||||||
|
lda print_y
|
||||||
|
and #$00ff
|
||||||
|
asl
|
||||||
|
asl
|
||||||
|
asl
|
||||||
|
asl
|
||||||
|
asl
|
||||||
|
asl
|
||||||
clc
|
clc
|
||||||
adc !print_temp ; tilemap+offset
|
adc print_x
|
||||||
sta $2181
|
and #$fffe
|
||||||
tyx
|
tax
|
||||||
|
lda print_x
|
||||||
|
lsr
|
||||||
|
bcs hiprint_bg1
|
||||||
|
hiprint_bg2
|
||||||
|
lda [print_ptr]
|
||||||
|
and #$00ff
|
||||||
|
beq hiprint_end
|
||||||
|
inc print_ptr
|
||||||
|
asl
|
||||||
|
ora print_temp
|
||||||
|
sta !BG2_TILE_BUF, x
|
||||||
|
dey
|
||||||
|
beq hiprint_end
|
||||||
|
hiprint_bg1
|
||||||
|
lda [print_ptr]
|
||||||
|
and #$00ff
|
||||||
|
beq hiprint_end
|
||||||
|
inc print_ptr
|
||||||
|
asl
|
||||||
|
ora print_temp
|
||||||
|
sta !BG1_TILE_BUF, x
|
||||||
|
inx
|
||||||
|
inx
|
||||||
|
dey
|
||||||
|
beq hiprint_end
|
||||||
|
bra hiprint_bg2
|
||||||
|
hiprint_end
|
||||||
|
plb
|
||||||
sep #$20 : .as
|
sep #$20 : .as
|
||||||
lda print_bank
|
lda [print_ptr]
|
||||||
pha
|
sta print_over
|
||||||
plb
|
tya
|
||||||
print_loop2_inner
|
sec
|
||||||
lda !0,x
|
sbc print_count
|
||||||
asl
|
eor #$ff
|
||||||
sta @$2180
|
|
||||||
lda @print_pal
|
|
||||||
asl
|
|
||||||
asl
|
|
||||||
adc #$00
|
|
||||||
ora #$20
|
|
||||||
sta @$2180
|
|
||||||
lda @print_done
|
|
||||||
inc
|
inc
|
||||||
sta @print_done
|
sta print_done
|
||||||
inx
|
plp
|
||||||
lda !0,x
|
|
||||||
beq print_end
|
|
||||||
inx
|
|
||||||
lda !0,x
|
|
||||||
beq print_end
|
|
||||||
lda @print_count_tmp
|
|
||||||
dec
|
|
||||||
dec
|
|
||||||
sta @print_count_tmp
|
|
||||||
beq print_end
|
|
||||||
bmi print_end
|
|
||||||
bra print_loop2_inner
|
|
||||||
print_end
|
|
||||||
lda #$00
|
|
||||||
pha
|
|
||||||
plb
|
|
||||||
rts
|
rts
|
||||||
|
|
||||||
|
|
||||||
@@ -257,16 +219,40 @@ draw_window:
|
|||||||
jsr hiprint
|
jsr hiprint
|
||||||
|
|
||||||
; print window title
|
; print window title
|
||||||
|
lda print_x
|
||||||
|
pha
|
||||||
inc print_x
|
inc print_x
|
||||||
inc print_x
|
inc print_x
|
||||||
|
lda #^window_tl
|
||||||
|
sta print_bank
|
||||||
|
ldx #!window_tl
|
||||||
|
stx print_src
|
||||||
|
lda #$01
|
||||||
|
sta print_count
|
||||||
|
jsr hiprint
|
||||||
|
inc print_x
|
||||||
lda window_tbank
|
lda window_tbank
|
||||||
sta print_bank
|
sta print_bank
|
||||||
ldx window_taddr
|
ldx window_taddr
|
||||||
stx print_src
|
stx print_src
|
||||||
|
lda window_w
|
||||||
|
sta print_count
|
||||||
jsr hiprint
|
jsr hiprint
|
||||||
dec print_x
|
lda print_done
|
||||||
dec print_x
|
clc
|
||||||
|
adc print_x
|
||||||
|
sta print_x
|
||||||
|
lda #^window_tr
|
||||||
|
sta print_bank
|
||||||
|
ldx #!window_tr
|
||||||
|
stx print_src
|
||||||
|
lda #$01
|
||||||
|
sta print_count
|
||||||
|
jsr hiprint
|
||||||
|
lda window_w
|
||||||
|
sta print_count
|
||||||
|
pla
|
||||||
|
sta print_x
|
||||||
; draw left+right borders + space inside window
|
; draw left+right borders + space inside window
|
||||||
lda #^stringbuf
|
lda #^stringbuf
|
||||||
sta print_bank
|
sta print_bank
|
||||||
|
|||||||
@@ -2,7 +2,7 @@
|
|||||||
#include "dma.i65"
|
#include "dma.i65"
|
||||||
|
|
||||||
timebox_data
|
timebox_data
|
||||||
; string offset, selection width, bcdtime offset, 1s limit, 10s limit
|
; string offset, selection width, bcdtime offset
|
||||||
.byt 0, 4, 9
|
.byt 0, 4, 9
|
||||||
.byt 5, 2, 8
|
.byt 5, 2, 8
|
||||||
.byt 8, 2, 6
|
.byt 8, 2, 6
|
||||||
@@ -46,6 +46,7 @@ time_init:
|
|||||||
jsr gettime
|
jsr gettime
|
||||||
stz time_sel
|
stz time_sel
|
||||||
stz time_exit
|
stz time_exit
|
||||||
|
stz time_cancel
|
||||||
lda #^text_buttonB
|
lda #^text_buttonB
|
||||||
sta print_bank
|
sta print_bank
|
||||||
ldx #!text_buttonB
|
ldx #!text_buttonB
|
||||||
@@ -85,7 +86,7 @@ time_update
|
|||||||
lda #$00
|
lda #$00
|
||||||
xba
|
xba
|
||||||
tax
|
tax
|
||||||
lda !timebox_data, x
|
lda @timebox_data, x
|
||||||
clc
|
clc
|
||||||
adc #$04
|
adc #$04
|
||||||
adc @time_win_x
|
adc @time_win_x
|
||||||
@@ -94,10 +95,10 @@ time_update
|
|||||||
adc #$02
|
adc #$02
|
||||||
sta bar_yl
|
sta bar_yl
|
||||||
inx
|
inx
|
||||||
lda !timebox_data, x
|
lda @timebox_data, x
|
||||||
sta bar_wl
|
sta bar_wl
|
||||||
inx
|
inx
|
||||||
lda !timebox_data, x
|
lda @timebox_data, x
|
||||||
sta time_ptr
|
sta time_ptr
|
||||||
timeloop1
|
timeloop1
|
||||||
lda isr_done
|
lda isr_done
|
||||||
@@ -120,17 +121,29 @@ timeloop1
|
|||||||
lda #$80
|
lda #$80
|
||||||
and pad1trig+1
|
and pad1trig+1
|
||||||
bne tkey_b
|
bne tkey_b
|
||||||
|
lda #$80
|
||||||
|
and pad1trig
|
||||||
|
bne tkey_a
|
||||||
; do stuff
|
; do stuff
|
||||||
lda time_exit
|
lda time_exit
|
||||||
beq timeloop1
|
bne timesave
|
||||||
; set clock
|
; set clock
|
||||||
|
lda time_cancel
|
||||||
|
bne timenosave
|
||||||
|
beq timeloop1
|
||||||
|
timesave
|
||||||
jsr settime
|
jsr settime
|
||||||
|
timenosave
|
||||||
; restore text area
|
; restore text area
|
||||||
jsr restore_screen
|
jsr restore_screen
|
||||||
plp
|
plp
|
||||||
rtl
|
rtl
|
||||||
|
|
||||||
tkey_b
|
tkey_b
|
||||||
|
inc time_cancel
|
||||||
|
jmp time_update
|
||||||
|
|
||||||
|
tkey_a
|
||||||
inc time_exit
|
inc time_exit
|
||||||
jmp time_update
|
jmp time_update
|
||||||
|
|
||||||
@@ -250,12 +263,12 @@ time_inc_day
|
|||||||
lda #$00
|
lda #$00
|
||||||
xba
|
xba
|
||||||
tax
|
tax
|
||||||
lda !time_month, x
|
lda @time_month, x
|
||||||
cmp time_d10
|
cmp time_d10
|
||||||
bne time_inc_day_normal
|
bne time_inc_day_normal
|
||||||
inx
|
inx
|
||||||
jsr is_leapyear_feb
|
jsr is_leapyear_feb
|
||||||
lda !time_month, x
|
lda @time_month, x
|
||||||
dec
|
dec
|
||||||
adc #$00
|
adc #$00
|
||||||
cmp time_d1
|
cmp time_d1
|
||||||
@@ -296,13 +309,13 @@ time_adjust_mon
|
|||||||
xba
|
xba
|
||||||
tax
|
tax
|
||||||
lda time_d10
|
lda time_d10
|
||||||
cmp !time_month, x
|
cmp @time_month, x
|
||||||
bcs time_mon_adjust
|
bcs time_mon_adjust
|
||||||
rts
|
rts
|
||||||
time_mon_adjust
|
time_mon_adjust
|
||||||
php
|
php
|
||||||
inx
|
inx
|
||||||
lda !time_month, x
|
lda @time_month, x
|
||||||
pha
|
pha
|
||||||
jsr is_leapyear_feb ; c=1 -> a leapyear february
|
jsr is_leapyear_feb ; c=1 -> a leapyear february
|
||||||
pla
|
pla
|
||||||
@@ -314,7 +327,7 @@ time_mon_adjust
|
|||||||
time_mon_doadjust
|
time_mon_doadjust
|
||||||
sta time_d1
|
sta time_d1
|
||||||
dex
|
dex
|
||||||
lda !time_month, x
|
lda @time_month, x
|
||||||
sta time_d10
|
sta time_d10
|
||||||
+
|
+
|
||||||
rts
|
rts
|
||||||
@@ -433,10 +446,10 @@ time_dec_cont
|
|||||||
asl
|
asl
|
||||||
ldx #$0000
|
ldx #$0000
|
||||||
tax
|
tax
|
||||||
lda !time_month, x
|
lda @time_month, x
|
||||||
sta time_d10
|
sta time_d10
|
||||||
inx
|
inx
|
||||||
lda !time_month, x
|
lda @time_month, x
|
||||||
pha
|
pha
|
||||||
jsr is_leapyear_feb
|
jsr is_leapyear_feb
|
||||||
pla
|
pla
|
||||||
@@ -486,6 +499,8 @@ time_dec_y1_normal
|
|||||||
rts
|
rts
|
||||||
|
|
||||||
gettime
|
gettime
|
||||||
|
php
|
||||||
|
sep #$20 : .as
|
||||||
lda #$0d
|
lda #$0d
|
||||||
sta $2801
|
sta $2801
|
||||||
lda $2800
|
lda $2800
|
||||||
@@ -513,6 +528,7 @@ gettime
|
|||||||
sta time_y10
|
sta time_y10
|
||||||
lda $2800
|
lda $2800
|
||||||
sta time_y100
|
sta time_y100
|
||||||
|
plp
|
||||||
rts
|
rts
|
||||||
|
|
||||||
rendertime
|
rendertime
|
||||||
@@ -664,31 +680,31 @@ is_leapyear_400th
|
|||||||
|
|
||||||
settime
|
settime
|
||||||
lda time_y100
|
lda time_y100
|
||||||
sta @AVR_PARAM
|
sta @MCU_PARAM
|
||||||
lda time_y10
|
lda time_y10
|
||||||
sta @AVR_PARAM+1
|
sta @MCU_PARAM+1
|
||||||
lda time_y1
|
lda time_y1
|
||||||
sta @AVR_PARAM+2
|
sta @MCU_PARAM+2
|
||||||
lda time_mon
|
lda time_mon
|
||||||
sta @AVR_PARAM+3
|
sta @MCU_PARAM+3
|
||||||
lda time_d10
|
lda time_d10
|
||||||
sta @AVR_PARAM+4
|
sta @MCU_PARAM+4
|
||||||
lda time_d1
|
lda time_d1
|
||||||
sta @AVR_PARAM+5
|
sta @MCU_PARAM+5
|
||||||
lda time_h10
|
lda time_h10
|
||||||
sta @AVR_PARAM+6
|
sta @MCU_PARAM+6
|
||||||
lda time_h1
|
lda time_h1
|
||||||
sta @AVR_PARAM+7
|
sta @MCU_PARAM+7
|
||||||
lda time_m10
|
lda time_m10
|
||||||
sta @AVR_PARAM+8
|
sta @MCU_PARAM+8
|
||||||
lda time_m1
|
lda time_m1
|
||||||
sta @AVR_PARAM+9
|
sta @MCU_PARAM+9
|
||||||
lda time_s10
|
lda time_s10
|
||||||
sta @AVR_PARAM+10
|
sta @MCU_PARAM+10
|
||||||
lda time_s1
|
lda time_s1
|
||||||
sta @AVR_PARAM+11
|
sta @MCU_PARAM+11
|
||||||
lda #$02 ; set clock
|
lda #$02 ; set clock
|
||||||
sta @AVR_CMD
|
sta @MCU_CMD
|
||||||
rts
|
rts
|
||||||
|
|
||||||
printtime:
|
printtime:
|
||||||
@@ -697,8 +713,6 @@ printtime:
|
|||||||
lda listdisp
|
lda listdisp
|
||||||
clc
|
clc
|
||||||
adc #$0a
|
adc #$0a
|
||||||
clc
|
|
||||||
adc vidmode
|
|
||||||
sta print_y
|
sta print_y
|
||||||
lda #$2b
|
lda #$2b
|
||||||
sta print_x
|
sta print_x
|
||||||
|
|||||||
24
snes/utils/mkmap.sh
Executable file
24
snes/utils/mkmap.sh
Executable file
@@ -0,0 +1,24 @@
|
|||||||
|
#!/bin/bash
|
||||||
|
|
||||||
|
args=("$@")
|
||||||
|
objcount=0
|
||||||
|
|
||||||
|
grep object_ link.log | \
|
||||||
|
sed -e 's/object_//g; s/_code//g; s/_data//g' | \
|
||||||
|
while read obj; do
|
||||||
|
objcount=$((objcount+1))
|
||||||
|
read base idx <<< "$obj"
|
||||||
|
base="0x${base}"
|
||||||
|
fn=${args[$idx-1]}
|
||||||
|
echo ======$fn, base=$base====== > ${fn%%.*}.map
|
||||||
|
sed -e '/^Externs/,$d;/^Labels/d' < $fn.log | \
|
||||||
|
while read line; do
|
||||||
|
read addr label <<< "$line"
|
||||||
|
addr="0x$addr"
|
||||||
|
decaddr=`printf "%d" $addr`
|
||||||
|
[ "$decaddr" -gt "65535" ] && base=0
|
||||||
|
ea=`printf "%X" $((base+addr))`
|
||||||
|
echo $ea $label >> ${fn%%.*}.map
|
||||||
|
done
|
||||||
|
done
|
||||||
|
|
||||||
34
src/Makefile
34
src/Makefile
@@ -55,7 +55,7 @@ TARGET = $(OBJDIR)/sd2snes
|
|||||||
|
|
||||||
|
|
||||||
# List C source files here. (C dependencies are automatically generated.)
|
# List C source files here. (C dependencies are automatically generated.)
|
||||||
SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c filetypes.c faulthandler.c sort.c crc32.c cic.c cli.c xmodem.c irq.c rle.c sdnative.c msu1.c crc16.c
|
SRC = main.c ff.c ccsbcs.c clock.c uart.c power.c led.c timer.c printf.c spi.c fileops.c rtc.c fpga.c fpga_spi.c snes.c smc.c memory.c filetypes.c faulthandler.c sort.c crc32.c cic.c cli.c xmodem.c irq.c rle.c sdnative.c msu1.c crc16.c sysinfo.c cfg.c tests.c
|
||||||
|
|
||||||
# usbcontrol.c usb_hid.c usbhw_lpc.c usbinit.c usbstdreq.c
|
# usbcontrol.c usb_hid.c usbhw_lpc.c usbinit.c usbstdreq.c
|
||||||
|
|
||||||
@@ -75,7 +75,7 @@ ASRC = startup.S crc.S
|
|||||||
# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
|
# (Note: 3 is not always the best optimization level. See avr-libc FAQ.)
|
||||||
# Use s -mcall-prologues when you really need size...
|
# Use s -mcall-prologues when you really need size...
|
||||||
#OPT = 2
|
#OPT = 2
|
||||||
OPT = 2
|
OPT = s
|
||||||
|
|
||||||
# Debugging format.
|
# Debugging format.
|
||||||
DEBUG = dwarf-2
|
DEBUG = dwarf-2
|
||||||
@@ -124,7 +124,8 @@ NM = $(ARCH)-nm
|
|||||||
REMOVE = rm -f
|
REMOVE = rm -f
|
||||||
COPY = cp
|
COPY = cp
|
||||||
AWK = awk
|
AWK = awk
|
||||||
|
RLE = ../utils/rle
|
||||||
|
BIN2H = utils/bin2h
|
||||||
|
|
||||||
#---------------- Compiler Options ----------------
|
#---------------- Compiler Options ----------------
|
||||||
# -g*: generate debugging information
|
# -g*: generate debugging information
|
||||||
@@ -197,7 +198,7 @@ ALL_ASFLAGS = -I. -x assembler-with-cpp $(ASFLAGS) $(CDEFS)
|
|||||||
# Default target.
|
# Default target.
|
||||||
all: build
|
all: build
|
||||||
|
|
||||||
build: elf bin hex
|
build: snesboot.h cfgware.h elf bin hex
|
||||||
$(E) " SIZE $(TARGET).elf"
|
$(E) " SIZE $(TARGET).elf"
|
||||||
$(Q)$(ELFSIZE)|grep -v debug
|
$(Q)$(ELFSIZE)|grep -v debug
|
||||||
cp $(TARGET).bin $(OBJDIR)/firmware.img
|
cp $(TARGET).bin $(OBJDIR)/firmware.img
|
||||||
@@ -217,19 +218,37 @@ sym: $(TARGET).sym
|
|||||||
|
|
||||||
program: build
|
program: build
|
||||||
utils/lpcchksum $(TARGET).bin
|
utils/lpcchksum $(TARGET).bin
|
||||||
openocd -f openocd-usb.cfg -f lpc1754.cfg -f flash.cfg
|
openocd -f interface/olimex-arm-usb-ocd.cfg -f lpc1754.cfg -f flash.cfg
|
||||||
|
|
||||||
debug: build
|
debug: build
|
||||||
openocd -f openocd-usb.cfg -f lpc1754.cfg
|
openocd -f interface/olimex-arm-usb-ocd.cfg -f lpc1754.cfg
|
||||||
|
|
||||||
reset:
|
reset:
|
||||||
openocd -f openocd-usb.cfg -f lpc1754.cfg -f reset.cfg
|
openocd -f interface/olimex-arm-usb-ocd.cfg -f lpc1754.cfg -f reset.cfg
|
||||||
|
|
||||||
# Display size of file.
|
# Display size of file.
|
||||||
HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
|
HEXSIZE = $(SIZE) --target=$(FORMAT) $(TARGET).hex
|
||||||
ELFSIZE = $(SIZE) -A $(TARGET).elf
|
ELFSIZE = $(SIZE) -A $(TARGET).elf
|
||||||
|
|
||||||
|
|
||||||
|
# Generate cfgware.h
|
||||||
|
cfgware.h: $(OBJDIR)/fpga_rle.bit
|
||||||
|
$(E) " BIN2H $@"
|
||||||
|
$(Q) $(BIN2H) $< $@ cfgware
|
||||||
|
|
||||||
|
$(OBJDIR)/fpga_rle.bit: ../verilog/sd2sneslite/main.bit
|
||||||
|
$(E) " RLE $@"
|
||||||
|
$(Q) $(RLE) $< $@
|
||||||
|
|
||||||
|
#generate snesboot.h
|
||||||
|
snesboot.h: $(OBJDIR)/snesboot.rle
|
||||||
|
$(E) " BIN2H $@"
|
||||||
|
$(Q) $(BIN2H) $< $@ bootrle
|
||||||
|
|
||||||
|
$(OBJDIR)/snesboot.rle: ../snes/boot/menu.bin
|
||||||
|
$(E) " RLE $@"
|
||||||
|
$(Q) $(RLE) $< $@
|
||||||
|
|
||||||
|
|
||||||
# Generate autoconf.h from config
|
# Generate autoconf.h from config
|
||||||
.PRECIOUS : $(OBJDIR)/autoconf.h
|
.PRECIOUS : $(OBJDIR)/autoconf.h
|
||||||
@@ -302,6 +321,7 @@ clean_list :
|
|||||||
$(Q)$(REMOVE) $(TARGET).sym
|
$(Q)$(REMOVE) $(TARGET).sym
|
||||||
$(Q)$(REMOVE) $(TARGET).lss
|
$(Q)$(REMOVE) $(TARGET).lss
|
||||||
$(Q)$(REMOVE) $(OBJ)
|
$(Q)$(REMOVE) $(OBJ)
|
||||||
|
$(Q)$(REMOVE) cfgware.h
|
||||||
$(Q)$(REMOVE) $(OBJDIR)/autoconf.h
|
$(Q)$(REMOVE) $(OBJDIR)/autoconf.h
|
||||||
$(Q)$(REMOVE) $(OBJDIR)/*.bin
|
$(Q)$(REMOVE) $(OBJDIR)/*.bin
|
||||||
$(Q)$(REMOVE) $(LST)
|
$(Q)$(REMOVE) $(LST)
|
||||||
|
|||||||
@@ -25,6 +25,7 @@ b) Cortex M3 toolchain
|
|||||||
- libexpat-dev
|
- libexpat-dev
|
||||||
- make
|
- make
|
||||||
- gcc
|
- gcc
|
||||||
|
Package names may differ for your distribution.
|
||||||
Newer gccs complain when compiling binutils, so you may have to add
|
Newer gccs complain when compiling binutils, so you may have to add
|
||||||
'--disable-werror' to the compiler options for binutils in the Makefile.
|
'--disable-werror' to the compiler options for binutils in the Makefile.
|
||||||
The Makefile will install immediately so make sure you can write to the
|
The Makefile will install immediately so make sure you can write to the
|
||||||
|
|||||||
@@ -213,6 +213,8 @@ sym: $(TARGET).sym
|
|||||||
|
|
||||||
|
|
||||||
# utils/lpcchksum $(TARGET).bin
|
# utils/lpcchksum $(TARGET).bin
|
||||||
|
fresh: erase program
|
||||||
|
|
||||||
program: bin
|
program: bin
|
||||||
openocd -f openocd-usb.cfg -f lpc1754.cfg -f flash.cfg
|
openocd -f openocd-usb.cfg -f lpc1754.cfg -f flash.cfg
|
||||||
|
|
||||||
|
|||||||
@@ -4,14 +4,14 @@
|
|||||||
/* The classic macro */
|
/* The classic macro */
|
||||||
#define BV(x) (1<<(x))
|
#define BV(x) (1<<(x))
|
||||||
|
|
||||||
/* CM3 bit-band access macro - no error checks! */
|
/* CM3 bit-bang access macro - no error checks! */
|
||||||
#define BITBAND(addr,bit) \
|
#define BITBANG(addr,bit) \
|
||||||
(*((volatile unsigned long *)( \
|
(*((volatile unsigned long *)( \
|
||||||
((unsigned long)&(addr) & 0x01ffffff)*32 + \
|
((unsigned long)&(addr) & 0x01ffffff)*32 + \
|
||||||
(bit)*4 + 0x02000000 + ((unsigned long)&(addr) & 0xfe000000) \
|
(bit)*4 + 0x02000000 + ((unsigned long)&(addr) & 0xfe000000) \
|
||||||
)))
|
)))
|
||||||
|
|
||||||
#define BITBAND_OFF(addr,offset,bit) \
|
#define BITBANG_OFF(addr,offset,bit) \
|
||||||
(*((volatile unsigned long *)( \
|
(*((volatile unsigned long *)( \
|
||||||
(((unsigned long)&(addr) + offset) & 0x01ffffff)*32 + \
|
(((unsigned long)&(addr) + offset) & 0x01ffffff)*32 + \
|
||||||
(bit)*4 + 0x02000000 + (((unsigned long)&(addr) + offset) & 0xfe000000) \
|
(bit)*4 + 0x02000000 + (((unsigned long)&(addr) + offset) & 0xfe000000) \
|
||||||
|
|||||||
@@ -31,7 +31,8 @@
|
|||||||
#if _CODE_PAGE == 437
|
#if _CODE_PAGE == 437
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP437(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||||
@@ -53,7 +54,8 @@ const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 720
|
#elif _CODE_PAGE == 720
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP720(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
||||||
@@ -75,7 +77,8 @@ const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 737
|
#elif _CODE_PAGE == 737
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP737(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
||||||
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
||||||
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
||||||
@@ -97,7 +100,8 @@ const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 775
|
#elif _CODE_PAGE == 775
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP775(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
||||||
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
||||||
@@ -119,7 +123,8 @@ const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 850
|
#elif _CODE_PAGE == 850
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP850(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||||
@@ -141,7 +146,8 @@ const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 852
|
#elif _CODE_PAGE == 852
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP852(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
||||||
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
||||||
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
||||||
@@ -163,7 +169,8 @@ const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 855
|
#elif _CODE_PAGE == 855
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP855(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
||||||
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
||||||
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
||||||
@@ -185,7 +192,8 @@ const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 857
|
#elif _CODE_PAGE == 857
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP857(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||||
@@ -207,7 +215,8 @@ const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 858
|
#elif _CODE_PAGE == 858
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP858(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||||
@@ -229,7 +238,8 @@ const WCHAR Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 862
|
#elif _CODE_PAGE == 862
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP862(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||||
@@ -251,7 +261,8 @@ const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 866
|
#elif _CODE_PAGE == 866
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP866(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||||
@@ -273,7 +284,8 @@ const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 874
|
#elif _CODE_PAGE == 874
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP874(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
||||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -295,7 +307,8 @@ const WCHAR Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1250
|
#elif _CODE_PAGE == 1250
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1250(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -317,7 +330,8 @@ const WCHAR Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1251
|
#elif _CODE_PAGE == 1251
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1251(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
||||||
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -339,7 +353,8 @@ const WCHAR Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1252
|
#elif _CODE_PAGE == 1252
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1252(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -361,7 +376,8 @@ const WCHAR Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1253
|
#elif _CODE_PAGE == 1253
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1253(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -383,7 +399,8 @@ const WCHAR Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1254
|
#elif _CODE_PAGE == 1254
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1254(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -405,7 +422,8 @@ const WCHAR Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1255
|
#elif _CODE_PAGE == 1255
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1255(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -427,7 +445,8 @@ const WCHAR Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1256
|
#elif _CODE_PAGE == 1256
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1256(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
||||||
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -449,7 +468,8 @@ const WCHAR Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1257
|
#elif _CODE_PAGE == 1257
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1257(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -471,7 +491,8 @@ const WCHAR Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1258
|
#elif _CODE_PAGE == 1258
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -506,17 +527,28 @@ WCHAR ff_convert ( /* Converted character, Returns zero on error */
|
|||||||
WCHAR c;
|
WCHAR c;
|
||||||
|
|
||||||
|
|
||||||
if (src < 0x80) { /* ASCII */
|
if ( src < 0x80 ) /* ASCII */
|
||||||
|
{
|
||||||
c = src;
|
c = src;
|
||||||
|
|
||||||
} else {
|
}
|
||||||
if (dir) { /* OEMCP to Unicode */
|
else
|
||||||
|
{
|
||||||
|
if ( dir ) /* OEMCP to Unicode */
|
||||||
|
{
|
||||||
c = ( src >= 0x100 ) ? 0 : Tbl[src - 0x80];
|
c = ( src >= 0x100 ) ? 0 : Tbl[src - 0x80];
|
||||||
|
|
||||||
} else { /* Unicode to OEMCP */
|
|
||||||
for (c = 0; c < 0x80; c++) {
|
|
||||||
if (src == Tbl[c]) break;
|
|
||||||
}
|
}
|
||||||
|
else /* Unicode to OEMCP */
|
||||||
|
{
|
||||||
|
for ( c = 0; c < 0x80; c++ )
|
||||||
|
{
|
||||||
|
if ( src == Tbl[c] )
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
c = ( c + 0x80 ) & 0xFF;
|
c = ( c + 0x80 ) & 0xFF;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -7,15 +7,17 @@
|
|||||||
#include "bits.h"
|
#include "bits.h"
|
||||||
#include "uart.h"
|
#include "uart.h"
|
||||||
|
|
||||||
void clock_disconnect() {
|
void clock_disconnect()
|
||||||
|
{
|
||||||
disconnectPLL0();
|
disconnectPLL0();
|
||||||
disablePLL0();
|
disablePLL0();
|
||||||
}
|
}
|
||||||
|
|
||||||
void clock_init() {
|
void clock_init()
|
||||||
|
{
|
||||||
|
|
||||||
/* set flash access time to 5 clks (80<f<=100MHz) */
|
/* set flash access time to 6 clks (safe setting) */
|
||||||
setFlashAccessTime(5);
|
setFlashAccessTime( 6 );
|
||||||
|
|
||||||
/* setup PLL0 for ~44100*256*8 Hz
|
/* setup PLL0 for ~44100*256*8 Hz
|
||||||
Base clock: 12MHz
|
Base clock: 12MHz
|
||||||
@@ -48,61 +50,73 @@ void clock_init() {
|
|||||||
*/
|
*/
|
||||||
enableMainOsc();
|
enableMainOsc();
|
||||||
setClkSrc( CLKSRC_MAINOSC );
|
setClkSrc( CLKSRC_MAINOSC );
|
||||||
// XXX setPLL0MultPrediv(429, 19);
|
setPLL0MultPrediv( 12, 1 );
|
||||||
setPLL0MultPrediv(23, 2);
|
|
||||||
enablePLL0();
|
enablePLL0();
|
||||||
setCCLKDiv( 3 );
|
setCCLKDiv( 3 );
|
||||||
connectPLL0();
|
connectPLL0();
|
||||||
}
|
}
|
||||||
|
|
||||||
void setFlashAccessTime(uint8_t clocks) {
|
void setFlashAccessTime( uint8_t clocks )
|
||||||
|
{
|
||||||
LPC_SC->FLASHCFG = FLASHTIM( clocks );
|
LPC_SC->FLASHCFG = FLASHTIM( clocks );
|
||||||
}
|
}
|
||||||
|
|
||||||
void setPLL0MultPrediv(uint16_t mult, uint8_t prediv) {
|
void setPLL0MultPrediv( uint16_t mult, uint8_t prediv )
|
||||||
|
{
|
||||||
LPC_SC->PLL0CFG = PLL_MULT( mult ) | PLL_PREDIV( prediv );
|
LPC_SC->PLL0CFG = PLL_MULT( mult ) | PLL_PREDIV( prediv );
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void enablePLL0() {
|
void enablePLL0()
|
||||||
|
{
|
||||||
LPC_SC->PLL0CON |= PLLE0;
|
LPC_SC->PLL0CON |= PLLE0;
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void disablePLL0() {
|
void disablePLL0()
|
||||||
|
{
|
||||||
LPC_SC->PLL0CON &= ~PLLE0;
|
LPC_SC->PLL0CON &= ~PLLE0;
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void connectPLL0() {
|
void connectPLL0()
|
||||||
|
{
|
||||||
while ( !( LPC_SC->PLL0STAT & PLOCK0 ) );
|
while ( !( LPC_SC->PLL0STAT & PLOCK0 ) );
|
||||||
|
|
||||||
LPC_SC->PLL0CON |= PLLC0;
|
LPC_SC->PLL0CON |= PLLC0;
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void disconnectPLL0() {
|
void disconnectPLL0()
|
||||||
|
{
|
||||||
LPC_SC->PLL0CON &= ~PLLC0;
|
LPC_SC->PLL0CON &= ~PLLC0;
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void setCCLKDiv(uint8_t div) {
|
void setCCLKDiv( uint8_t div )
|
||||||
|
{
|
||||||
LPC_SC->CCLKCFG = CCLK_DIV( div );
|
LPC_SC->CCLKCFG = CCLK_DIV( div );
|
||||||
}
|
}
|
||||||
|
|
||||||
void enableMainOsc() {
|
void enableMainOsc()
|
||||||
|
{
|
||||||
LPC_SC->SCS = OSCEN;
|
LPC_SC->SCS = OSCEN;
|
||||||
|
|
||||||
while ( !( LPC_SC->SCS & OSCSTAT ) );
|
while ( !( LPC_SC->SCS & OSCSTAT ) );
|
||||||
}
|
}
|
||||||
|
|
||||||
void disableMainOsc() {
|
void disableMainOsc()
|
||||||
|
{
|
||||||
LPC_SC->SCS = 0;
|
LPC_SC->SCS = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void PLL0feed() {
|
void PLL0feed()
|
||||||
|
{
|
||||||
LPC_SC->PLL0FEED = 0xaa;
|
LPC_SC->PLL0FEED = 0xaa;
|
||||||
LPC_SC->PLL0FEED = 0x55;
|
LPC_SC->PLL0FEED = 0x55;
|
||||||
}
|
}
|
||||||
|
|
||||||
void setClkSrc(uint8_t src) {
|
void setClkSrc( uint8_t src )
|
||||||
|
{
|
||||||
LPC_SC->CLKSRCSEL = src;
|
LPC_SC->CLKSRCSEL = src;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -4,7 +4,7 @@
|
|||||||
# file to a C header. No copyright claimed.
|
# file to a C header. No copyright claimed.
|
||||||
|
|
||||||
BEGIN {
|
BEGIN {
|
||||||
print "// autoconf.h generated from " ARGV[1] " at " strftime() "\n" \
|
print "// autoconf.h generated from " ARGV[1] " at NOW\n" \
|
||||||
"#ifndef AUTOCONF_H\n" \
|
"#ifndef AUTOCONF_H\n" \
|
||||||
"#define AUTOCONF_H"
|
"#define AUTOCONF_H"
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -1,7 +1,7 @@
|
|||||||
#ifndef _CONFIG_H
|
#ifndef _CONFIG_H
|
||||||
#define _CONFIG_H
|
#define _CONFIG_H
|
||||||
|
|
||||||
#define DEBUG_BL
|
// #define DEBUG_BL
|
||||||
// #define DEBUG_SD
|
// #define DEBUG_SD
|
||||||
// #define DEBUG_IRQ
|
// #define DEBUG_IRQ
|
||||||
|
|
||||||
@@ -19,7 +19,7 @@
|
|||||||
#define DBG_BL while(0)
|
#define DBG_BL while(0)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define FW_START (0x00003000L)
|
#define FW_START (0x00002000L)
|
||||||
#define FLASH_SECTORS (17)
|
#define FLASH_SECTORS (17)
|
||||||
|
|
||||||
|
|
||||||
@@ -27,12 +27,12 @@
|
|||||||
#define IN_AHBRAM __attribute__ ((section(".ahbram")))
|
#define IN_AHBRAM __attribute__ ((section(".ahbram")))
|
||||||
|
|
||||||
#define SD_DT_INT_SETUP() do {\
|
#define SD_DT_INT_SETUP() do {\
|
||||||
BITBAND(LPC_GPIOINT->IO2IntEnR, SD_DT_BIT) = 1;\
|
BITBANG(LPC_GPIOINT->IO2IntEnR, SD_DT_BIT) = 1;\
|
||||||
BITBAND(LPC_GPIOINT->IO2IntEnF, SD_DT_BIT) = 1;\
|
BITBANG(LPC_GPIOINT->IO2IntEnF, SD_DT_BIT) = 1;\
|
||||||
} while(0)
|
} while(0)
|
||||||
|
|
||||||
#define SD_CHANGE_DETECT (BITBAND(LPC_GPIOINT->IO2IntStatR, SD_DT_BIT)\
|
#define SD_CHANGE_DETECT (BITBANG(LPC_GPIOINT->IO2IntStatR, SD_DT_BIT)\
|
||||||
|BITBAND(LPC_GPIOINT->IO2IntStatF, SD_DT_BIT))
|
|BITBANG(LPC_GPIOINT->IO2IntStatF, SD_DT_BIT))
|
||||||
|
|
||||||
#define SD_CHANGE_CLR() do {LPC_GPIOINT->IO2IntClr = BV(SD_DT_BIT);} while(0)
|
#define SD_CHANGE_CLR() do {LPC_GPIOINT->IO2IntClr = BV(SD_DT_BIT);} while(0)
|
||||||
|
|
||||||
@@ -41,8 +41,8 @@
|
|||||||
#define SD_WP_REG LPC_GPIO0
|
#define SD_WP_REG LPC_GPIO0
|
||||||
#define SD_WP_BIT 6
|
#define SD_WP_BIT 6
|
||||||
|
|
||||||
#define SDCARD_DETECT (!(BITBAND(SD_DT_REG->FIOPIN, SD_DT_BIT)))
|
#define SDCARD_DETECT (!(BITBANG(SD_DT_REG->FIOPIN, SD_DT_BIT)))
|
||||||
#define SDCARD_WP (BITBAND(SD_WP_REG->FIOPIN, SD_WP_BIT))
|
#define SDCARD_WP (BITBANG(SD_WP_REG->FIOPIN, SD_WP_BIT))
|
||||||
#define SD_SUPPLY_VOLTAGE (1L<<21) /* 3.3V - 3.4V */
|
#define SD_SUPPLY_VOLTAGE (1L<<21) /* 3.3V - 3.4V */
|
||||||
#define CONFIG_SD_BLOCKTRANSFER 1
|
#define CONFIG_SD_BLOCKTRANSFER 1
|
||||||
#define CONFIG_SD_AUTO_RETRIES 10
|
#define CONFIG_SD_AUTO_RETRIES 10
|
||||||
@@ -51,11 +51,12 @@
|
|||||||
|
|
||||||
#define CONFIG_UART_NUM 3
|
#define CONFIG_UART_NUM 3
|
||||||
// #define CONFIG_CPU_FREQUENCY 90315789
|
// #define CONFIG_CPU_FREQUENCY 90315789
|
||||||
#define CONFIG_CPU_FREQUENCY (92000000L)
|
#define CONFIG_CPU_FREQUENCY (96000000L)
|
||||||
//#define CONFIG_CPU_FREQUENCY 46000000
|
//#define CONFIG_CPU_FREQUENCY 46000000
|
||||||
#define CONFIG_UART_PCLKDIV 1
|
#define CONFIG_UART_PCLKDIV 1
|
||||||
#define CONFIG_UART_TX_BUF_SHIFT 8
|
#define CONFIG_UART_TX_BUF_SHIFT 8
|
||||||
#define CONFIG_UART_BAUDRATE 921600
|
//#define CONFIG_UART_BAUDRATE 921600
|
||||||
|
#define CONFIG_UART_BAUDRATE 115200
|
||||||
#define CONFIG_UART_DEADLOCKABLE
|
#define CONFIG_UART_DEADLOCKABLE
|
||||||
|
|
||||||
#define SSP_CLK_DIVISOR_FAST 2
|
#define SSP_CLK_DIVISOR_FAST 2
|
||||||
|
|||||||
@@ -32,11 +32,13 @@ uint32_t crc_reflect(uint32_t data, size_t data_len)
|
|||||||
uint32_t ret;
|
uint32_t ret;
|
||||||
|
|
||||||
ret = data & 0x01;
|
ret = data & 0x01;
|
||||||
|
|
||||||
for ( i = 1; i < data_len; i++ )
|
for ( i = 1; i < data_len; i++ )
|
||||||
{
|
{
|
||||||
data >>= 1;
|
data >>= 1;
|
||||||
ret = ( ret << 1 ) | ( data & 0x01 );
|
ret = ( ret << 1 ) | ( data & 0x01 );
|
||||||
}
|
}
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -56,16 +58,24 @@ uint32_t crc32_update(uint32_t crc, const unsigned char data)
|
|||||||
unsigned char c;
|
unsigned char c;
|
||||||
|
|
||||||
c = data;
|
c = data;
|
||||||
for (i = 0x01; i & 0xff; i <<= 1) {
|
|
||||||
|
for ( i = 0x01; i & 0xff; i <<= 1 )
|
||||||
|
{
|
||||||
bit = crc & 0x80000000;
|
bit = crc & 0x80000000;
|
||||||
if (c & i) {
|
|
||||||
|
if ( c & i )
|
||||||
|
{
|
||||||
bit = !bit;
|
bit = !bit;
|
||||||
}
|
}
|
||||||
|
|
||||||
crc <<= 1;
|
crc <<= 1;
|
||||||
if (bit) {
|
|
||||||
|
if ( bit )
|
||||||
|
{
|
||||||
crc ^= 0x04c11db7;
|
crc ^= 0x04c11db7;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return crc & 0xffffffff;
|
return crc & 0xffffffff;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -16,7 +16,8 @@
|
|||||||
typedef BYTE DSTATUS;
|
typedef BYTE DSTATUS;
|
||||||
|
|
||||||
/* Results of Disk Functions */
|
/* Results of Disk Functions */
|
||||||
typedef enum {
|
typedef enum
|
||||||
|
{
|
||||||
RES_OK = 0, /* 0: Successful */
|
RES_OK = 0, /* 0: Successful */
|
||||||
RES_ERROR, /* 1: R/W Error */
|
RES_ERROR, /* 1: R/W Error */
|
||||||
RES_WRPRT, /* 2: Write Protected */
|
RES_WRPRT, /* 2: Write Protected */
|
||||||
@@ -35,7 +36,8 @@ typedef enum {
|
|||||||
* This is the struct returned in the data buffer when disk_getinfo
|
* This is the struct returned in the data buffer when disk_getinfo
|
||||||
* is called with page=0.
|
* is called with page=0.
|
||||||
*/
|
*/
|
||||||
typedef struct {
|
typedef struct
|
||||||
|
{
|
||||||
uint8_t validbytes;
|
uint8_t validbytes;
|
||||||
uint8_t maxpage;
|
uint8_t maxpage;
|
||||||
uint8_t disktype;
|
uint8_t disktype;
|
||||||
|
|||||||
@@ -2,21 +2,26 @@
|
|||||||
#include "config.h"
|
#include "config.h"
|
||||||
#include "uart.h"
|
#include "uart.h"
|
||||||
|
|
||||||
void HardFault_Handler(void) {
|
void HardFault_Handler( void )
|
||||||
|
{
|
||||||
DBG_BL printf( "HFSR: %lx\n", SCB->HFSR );
|
DBG_BL printf( "HFSR: %lx\n", SCB->HFSR );
|
||||||
DBG_UART uart_putc( 'H' );
|
DBG_UART uart_putc( 'H' );
|
||||||
|
|
||||||
while ( 1 ) ;
|
while ( 1 ) ;
|
||||||
}
|
}
|
||||||
|
|
||||||
void MemManage_Handler(void) {
|
void MemManage_Handler( void )
|
||||||
|
{
|
||||||
DBG_BL printf( "MemManage - CFSR: %lx; MMFAR: %lx\n", SCB->CFSR, SCB->MMFAR );
|
DBG_BL printf( "MemManage - CFSR: %lx; MMFAR: %lx\n", SCB->CFSR, SCB->MMFAR );
|
||||||
}
|
}
|
||||||
|
|
||||||
void BusFault_Handler(void) {
|
void BusFault_Handler( void )
|
||||||
|
{
|
||||||
DBG_BL printf( "BusFault - CFSR: %lx; BFAR: %lx\n", SCB->CFSR, SCB->BFAR );
|
DBG_BL printf( "BusFault - CFSR: %lx; BFAR: %lx\n", SCB->CFSR, SCB->BFAR );
|
||||||
}
|
}
|
||||||
|
|
||||||
void UsageFault_Handler(void) {
|
void UsageFault_Handler( void )
|
||||||
|
{
|
||||||
DBG_BL printf( "UsageFault - CFSR: %lx; BFAR: %lx\n", SCB->CFSR, SCB->BFAR );
|
DBG_BL printf( "UsageFault - CFSR: %lx; BFAR: %lx\n", SCB->CFSR, SCB->BFAR );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
3244
src/bootldr/ff.c
3244
src/bootldr/ff.c
File diff suppressed because it is too large
Load Diff
@@ -229,7 +229,8 @@ extern "C" {
|
|||||||
#if _MULTI_PARTITION /* Multiple partition configuration */
|
#if _MULTI_PARTITION /* Multiple partition configuration */
|
||||||
#define LD2PD(vol) (VolToPart[vol].pd) /* Get physical drive# */
|
#define LD2PD(vol) (VolToPart[vol].pd) /* Get physical drive# */
|
||||||
#define LD2PT(vol) (VolToPart[vol].pt) /* Get partition# */
|
#define LD2PT(vol) (VolToPart[vol].pt) /* Get partition# */
|
||||||
typedef struct {
|
typedef struct
|
||||||
|
{
|
||||||
BYTE pd; /* Physical drive# */
|
BYTE pd; /* Physical drive# */
|
||||||
BYTE pt; /* Partition # (0-3) */
|
BYTE pt; /* Partition # (0-3) */
|
||||||
} PARTITION;
|
} PARTITION;
|
||||||
@@ -268,7 +269,8 @@ typedef char TCHAR;
|
|||||||
|
|
||||||
/* File system object structure (FATFS) */
|
/* File system object structure (FATFS) */
|
||||||
|
|
||||||
typedef struct {
|
typedef struct
|
||||||
|
{
|
||||||
BYTE fs_type; /* FAT sub-type (0:Not mounted) */
|
BYTE fs_type; /* FAT sub-type (0:Not mounted) */
|
||||||
BYTE drv; /* Physical drive number */
|
BYTE drv; /* Physical drive number */
|
||||||
BYTE csize; /* Sectors per cluster (1,2,4...128) */
|
BYTE csize; /* Sectors per cluster (1,2,4...128) */
|
||||||
@@ -304,7 +306,8 @@ typedef struct {
|
|||||||
|
|
||||||
/* File object structure (FIL) */
|
/* File object structure (FIL) */
|
||||||
|
|
||||||
typedef struct {
|
typedef struct
|
||||||
|
{
|
||||||
FATFS *fs; /* Pointer to the owner file system object */
|
FATFS *fs; /* Pointer to the owner file system object */
|
||||||
WORD id; /* Owner file system mount ID */
|
WORD id; /* Owner file system mount ID */
|
||||||
BYTE flag; /* File status flags */
|
BYTE flag; /* File status flags */
|
||||||
@@ -333,7 +336,8 @@ typedef struct {
|
|||||||
|
|
||||||
/* Directory object structure (DIR) */
|
/* Directory object structure (DIR) */
|
||||||
|
|
||||||
typedef struct {
|
typedef struct
|
||||||
|
{
|
||||||
FATFS *fs; /* Pointer to the owner file system object */
|
FATFS *fs; /* Pointer to the owner file system object */
|
||||||
WORD id; /* Owner file system mount ID */
|
WORD id; /* Owner file system mount ID */
|
||||||
WORD index; /* Current read/write index number */
|
WORD index; /* Current read/write index number */
|
||||||
@@ -352,7 +356,8 @@ typedef struct {
|
|||||||
|
|
||||||
/* File status structure (FILINFO) */
|
/* File status structure (FILINFO) */
|
||||||
|
|
||||||
typedef struct {
|
typedef struct
|
||||||
|
{
|
||||||
DWORD fsize; /* File size */
|
DWORD fsize; /* File size */
|
||||||
WORD fdate; /* Last modified date */
|
WORD fdate; /* Last modified date */
|
||||||
WORD ftime; /* Last modified time */
|
WORD ftime; /* Last modified time */
|
||||||
@@ -369,7 +374,8 @@ typedef struct {
|
|||||||
|
|
||||||
/* File function return code (FRESULT) */
|
/* File function return code (FRESULT) */
|
||||||
|
|
||||||
typedef enum {
|
typedef enum
|
||||||
|
{
|
||||||
FR_OK = 0, /* (0) Succeeded */
|
FR_OK = 0, /* (0) Succeeded */
|
||||||
FR_DISK_ERR, /* (1) A hard error occured in the low level disk I/O layer */
|
FR_DISK_ERR, /* (1) A hard error occured in the low level disk I/O layer */
|
||||||
FR_INT_ERR, /* (2) Assertion failed */
|
FR_INT_ERR, /* (2) Assertion failed */
|
||||||
@@ -397,7 +403,8 @@ typedef enum {
|
|||||||
/* FatFs module application interface */
|
/* FatFs module application interface */
|
||||||
|
|
||||||
/* Low Level functions */
|
/* Low Level functions */
|
||||||
FRESULT l_openfilebycluster(FATFS *fs, FIL *fp, const TCHAR *path, DWORD clust, DWORD fsize); /* Open a file by its start cluster using supplied file size */
|
FRESULT l_openfilebycluster( FATFS *fs, FIL *fp, const TCHAR *path, DWORD clust,
|
||||||
|
DWORD fsize ); /* Open a file by its start cluster using supplied file size */
|
||||||
|
|
||||||
/* application level functions */
|
/* application level functions */
|
||||||
FRESULT f_mount ( BYTE, FATFS * ); /* Mount/Unmount a logical drive */
|
FRESULT f_mount ( BYTE, FATFS * ); /* Mount/Unmount a logical drive */
|
||||||
|
|||||||
@@ -14,7 +14,7 @@
|
|||||||
/ Function and Buffer Configurations
|
/ Function and Buffer Configurations
|
||||||
/----------------------------------------------------------------------------*/
|
/----------------------------------------------------------------------------*/
|
||||||
|
|
||||||
#define _FS_TINY 0 /* 0:Normal or 1:Tiny */
|
#define _FS_TINY 1 /* 0:Normal or 1:Tiny */
|
||||||
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
|
/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system
|
||||||
/ object instead of the sector buffer in the individual file object for file
|
/ object instead of the sector buffer in the individual file object for file
|
||||||
/ data transfer. This reduces memory consumption 512 bytes each file object. */
|
/ data transfer. This reduces memory consumption 512 bytes each file object. */
|
||||||
@@ -57,7 +57,7 @@
|
|||||||
/ Locale and Namespace Configurations
|
/ Locale and Namespace Configurations
|
||||||
/----------------------------------------------------------------------------*/
|
/----------------------------------------------------------------------------*/
|
||||||
|
|
||||||
#define _CODE_PAGE 1252
|
#define _CODE_PAGE 1
|
||||||
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
|
/* The _CODE_PAGE specifies the OEM code page to be used on the target system.
|
||||||
/ Incorrect setting of the code page can cause a file open failure.
|
/ Incorrect setting of the code page can cause a file open failure.
|
||||||
/
|
/
|
||||||
|
|||||||
@@ -12,36 +12,44 @@ WCHAR ff_convert(WCHAR w, UINT dir) {
|
|||||||
|
|
||||||
int newcard;
|
int newcard;
|
||||||
|
|
||||||
void file_init() {
|
void file_init()
|
||||||
|
{
|
||||||
file_res = f_mount( 0, &fatfs );
|
file_res = f_mount( 0, &fatfs );
|
||||||
newcard = 0;
|
newcard = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void file_reinit(void) {
|
void file_reinit( void )
|
||||||
|
{
|
||||||
disk_init();
|
disk_init();
|
||||||
file_init();
|
file_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
void file_open_by_filinfo(FILINFO* fno) {
|
void file_open_by_filinfo( FILINFO *fno )
|
||||||
|
{
|
||||||
file_res = l_openfilebycluster( &fatfs, &file_handle, ( TCHAR * )"", fno->clust, fno->fsize );
|
file_res = l_openfilebycluster( &fatfs, &file_handle, ( TCHAR * )"", fno->clust, fno->fsize );
|
||||||
}
|
}
|
||||||
|
|
||||||
void file_open(uint8_t* filename, BYTE flags) {
|
void file_open( uint8_t *filename, BYTE flags )
|
||||||
if (disk_state == DISK_CHANGED) {
|
{
|
||||||
|
if ( disk_state == DISK_CHANGED )
|
||||||
|
{
|
||||||
file_reinit();
|
file_reinit();
|
||||||
newcard = 1;
|
newcard = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
file_res = f_open( &file_handle, ( TCHAR * )filename, flags );
|
file_res = f_open( &file_handle, ( TCHAR * )filename, flags );
|
||||||
file_block_off = sizeof( file_buf );
|
file_block_off = sizeof( file_buf );
|
||||||
file_block_max = sizeof( file_buf );
|
file_block_max = sizeof( file_buf );
|
||||||
file_status = file_res ? FILE_ERR : FILE_OK;
|
file_status = file_res ? FILE_ERR : FILE_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
void file_close() {
|
void file_close()
|
||||||
|
{
|
||||||
file_res = f_close( &file_handle );
|
file_res = f_close( &file_handle );
|
||||||
}
|
}
|
||||||
|
|
||||||
UINT file_read() {
|
UINT file_read()
|
||||||
|
{
|
||||||
UINT bytes_read;
|
UINT bytes_read;
|
||||||
file_res = f_read( &file_handle, file_buf, sizeof( file_buf ), &bytes_read );
|
file_res = f_read( &file_handle, file_buf, sizeof( file_buf ), &bytes_read );
|
||||||
return bytes_read;
|
return bytes_read;
|
||||||
@@ -56,12 +64,16 @@ UINT file_read() {
|
|||||||
return bytes_written;
|
return bytes_written;
|
||||||
}*/
|
}*/
|
||||||
|
|
||||||
UINT file_readblock(void* buf, uint32_t addr, uint16_t size) {
|
UINT file_readblock( void *buf, uint32_t addr, uint16_t size )
|
||||||
|
{
|
||||||
UINT bytes_read;
|
UINT bytes_read;
|
||||||
file_res = f_lseek( &file_handle, addr );
|
file_res = f_lseek( &file_handle, addr );
|
||||||
if(file_handle.fptr != addr) {
|
|
||||||
|
if ( file_handle.fptr != addr )
|
||||||
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
file_res = f_read( &file_handle, buf, size, &bytes_read );
|
file_res = f_read( &file_handle, buf, size, &bytes_read );
|
||||||
return bytes_read;
|
return bytes_read;
|
||||||
}
|
}
|
||||||
@@ -74,11 +86,19 @@ UINT file_readblock(void* buf, uint32_t addr, uint16_t size) {
|
|||||||
return bytes_written;
|
return bytes_written;
|
||||||
}*/
|
}*/
|
||||||
|
|
||||||
uint8_t file_getc() {
|
uint8_t file_getc()
|
||||||
if(file_block_off == file_block_max) {
|
{
|
||||||
|
if ( file_block_off == file_block_max )
|
||||||
|
{
|
||||||
file_block_max = file_read();
|
file_block_max = file_read();
|
||||||
if(file_block_max == 0) file_status = FILE_EOF;
|
|
||||||
|
if ( file_block_max == 0 )
|
||||||
|
{
|
||||||
|
file_status = FILE_EOF;
|
||||||
|
}
|
||||||
|
|
||||||
file_block_off = 0;
|
file_block_off = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
return file_buf[file_block_off++];
|
return file_buf[file_block_off++];
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -31,13 +31,14 @@
|
|||||||
|
|
||||||
enum filestates { FILE_OK = 0, FILE_ERR, FILE_EOF };
|
enum filestates { FILE_OK = 0, FILE_ERR, FILE_EOF };
|
||||||
|
|
||||||
BYTE file_buf[512];
|
#define GCC_ALIGN_WORKAROUND __attribute__ ((aligned(4)))
|
||||||
FATFS fatfs;
|
extern BYTE file_buf[512];
|
||||||
FIL file_handle;
|
extern FATFS fatfs;
|
||||||
FRESULT file_res;
|
extern FIL file_handle;
|
||||||
uint8_t file_lfn[258];
|
extern FRESULT file_res;
|
||||||
uint16_t file_block_off, file_block_max;
|
extern uint8_t file_lfn[258];
|
||||||
enum filestates file_status;
|
extern uint16_t file_block_off, file_block_max;
|
||||||
|
extern enum filestates file_status;
|
||||||
|
|
||||||
void file_init( void );
|
void file_init( void );
|
||||||
void file_open( uint8_t *filename, BYTE flags );
|
void file_open( uint8_t *filename, BYTE flags );
|
||||||
|
|||||||
@@ -14,73 +14,103 @@ uint32_t flash_sig[4];
|
|||||||
|
|
||||||
IAP iap_entry = ( IAP ) IAP_LOCATION;
|
IAP iap_entry = ( IAP ) IAP_LOCATION;
|
||||||
|
|
||||||
uint32_t calc_flash_crc(uint32_t start, uint32_t len) {
|
uint32_t calc_flash_crc( uint32_t start, uint32_t len )
|
||||||
|
{
|
||||||
DBG_BL printf( "calc_flash_crc(%08lx, %08lx) {\n", start, len );
|
DBG_BL printf( "calc_flash_crc(%08lx, %08lx) {\n", start, len );
|
||||||
uint32_t end = start + len;
|
uint32_t end = start + len;
|
||||||
if(end > 0x20000) {
|
|
||||||
|
if ( end > 0x20000 )
|
||||||
|
{
|
||||||
len = 0x1ffff - start;
|
len = 0x1ffff - start;
|
||||||
end = 0x20000;
|
end = 0x20000;
|
||||||
}
|
}
|
||||||
|
|
||||||
uint32_t crc = 0xffffffff;
|
uint32_t crc = 0xffffffff;
|
||||||
uint32_t s = start;
|
uint32_t s = start;
|
||||||
while(s < end) {
|
|
||||||
|
while ( s < end )
|
||||||
|
{
|
||||||
crc = crc32_update( crc, *( const unsigned char * )( s ) );
|
crc = crc32_update( crc, *( const unsigned char * )( s ) );
|
||||||
s++;
|
s++;
|
||||||
}
|
}
|
||||||
|
|
||||||
crc = crc_finalize( crc );
|
crc = crc_finalize( crc );
|
||||||
DBG_BL printf( " crc generated. result=%08lx\n", crc );
|
DBG_BL printf( " crc generated. result=%08lx\n", crc );
|
||||||
DBG_BL printf( "} //calc_flash_crc\n" );
|
DBG_BL printf( "} //calc_flash_crc\n" );
|
||||||
return crc;
|
return crc;
|
||||||
}
|
}
|
||||||
|
|
||||||
void test_iap() {
|
void test_iap()
|
||||||
|
{
|
||||||
iap_cmd[0] = 54;
|
iap_cmd[0] = 54;
|
||||||
iap_entry( iap_cmd, iap_res );
|
iap_entry( iap_cmd, iap_res );
|
||||||
DBG_BL printf( "Part ID=%08lx\n", iap_res[1] );
|
DBG_BL printf( "Part ID=%08lx\n", iap_res[1] );
|
||||||
}
|
}
|
||||||
|
|
||||||
void print_header(sd2snes_fw_header *header) {
|
void print_header( sd2snes_fw_header *header )
|
||||||
|
{
|
||||||
DBG_BL printf( " magic = %08lx\n version = %08lx\n size = %08lx\n crc = %08lx\n ~crc = %08lx\n",
|
DBG_BL printf( " magic = %08lx\n version = %08lx\n size = %08lx\n crc = %08lx\n ~crc = %08lx\n",
|
||||||
header->magic, header->version, header->size,
|
header->magic, header->version, header->size,
|
||||||
header->crc, header->crcc );
|
header->crc, header->crcc );
|
||||||
}
|
}
|
||||||
|
|
||||||
int check_header(sd2snes_fw_header *header, uint32_t crc) {
|
int check_header( sd2snes_fw_header *header, uint32_t crc )
|
||||||
|
{
|
||||||
if ( ( header->magic != FW_MAGIC )
|
if ( ( header->magic != FW_MAGIC )
|
||||||
|| ( header->size < 0x200 )
|
|| ( header->size < 0x200 )
|
||||||
|| ( header->size > ( 0x1ffff - FW_START ) )
|
|| ( header->size > ( 0x1ffff - FW_START ) )
|
||||||
|| ((header->crc ^ header->crcc) != 0xffffffff)) {
|
|| ( ( header->crc ^ header->crcc ) != 0xffffffff ) )
|
||||||
|
{
|
||||||
return ERR_FLASHHD;
|
return ERR_FLASHHD;
|
||||||
}
|
}
|
||||||
if(header->crc != crc) {
|
|
||||||
|
if ( header->crc != crc )
|
||||||
|
{
|
||||||
return ERR_FLASHCRC;
|
return ERR_FLASHCRC;
|
||||||
}
|
}
|
||||||
|
|
||||||
return ERR_OK;
|
return ERR_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
FLASH_RES check_flash() {
|
FLASH_RES check_flash()
|
||||||
|
{
|
||||||
sd2snes_fw_header *fw_header = ( sd2snes_fw_header * ) FW_START;
|
sd2snes_fw_header *fw_header = ( sd2snes_fw_header * ) FW_START;
|
||||||
uint32_t flash_addr = FW_START;
|
uint32_t flash_addr = FW_START;
|
||||||
if(flash_addr != FW_START) {
|
|
||||||
DBG_BL printf("address sanity check failed. expected 0x%08lx, got 0x%08lx.\nSomething is terribly wrong.\nBailing out to avoid bootldr self-corruption.\n", FW_START, flash_addr);
|
if ( flash_addr != FW_START )
|
||||||
|
{
|
||||||
|
DBG_BL printf( "address sanity check failed. expected 0x%08lx, got 0x%08lx.\nSomething is terribly wrong.\nBailing out to avoid bootldr self-corruption.\n",
|
||||||
|
FW_START, flash_addr );
|
||||||
return ERR_HW;
|
return ERR_HW;
|
||||||
}
|
}
|
||||||
|
|
||||||
DBG_BL printf( "Current flash contents:\n" );
|
DBG_BL printf( "Current flash contents:\n" );
|
||||||
DBG_BL print_header( fw_header );
|
DBG_BL print_header( fw_header );
|
||||||
uint32_t crc = calc_flash_crc( flash_addr + 0x100, ( fw_header->size & 0x1ffff ) );
|
uint32_t crc = calc_flash_crc( flash_addr + 0x100, ( fw_header->size & 0x1ffff ) );
|
||||||
return check_header( fw_header, crc );
|
return check_header( fw_header, crc );
|
||||||
}
|
}
|
||||||
|
|
||||||
IAP_RES iap_wrap(uint32_t *iap_cmd, uint32_t *iap_res) {
|
IAP_RES iap_wrap( uint32_t *iap_cmd, uint32_t *iap_res )
|
||||||
NVIC_DisableIRQ(RIT_IRQn);
|
{
|
||||||
NVIC_DisableIRQ(UART_IRQ);
|
// NVIC_DisableIRQ(RIT_IRQn);
|
||||||
|
// NVIC_DisableIRQ(UART_IRQ);
|
||||||
|
for ( volatile int i = 0; i < 2048; i++ );
|
||||||
|
|
||||||
iap_entry( iap_cmd, iap_res );
|
iap_entry( iap_cmd, iap_res );
|
||||||
NVIC_EnableIRQ(UART_IRQ);
|
|
||||||
|
for ( volatile int i = 0; i < 2048; i++ );
|
||||||
|
|
||||||
|
// NVIC_EnableIRQ(UART_IRQ);
|
||||||
return iap_res[0];
|
return iap_res[0];
|
||||||
}
|
}
|
||||||
|
|
||||||
IAP_RES iap_prepare_for_write(uint32_t start, uint32_t end) {
|
IAP_RES iap_prepare_for_write( uint32_t start, uint32_t end )
|
||||||
if(start < (FW_START / 0x1000)) return INVALID_SECTOR;
|
{
|
||||||
|
if ( start < ( FW_START / 0x1000 ) )
|
||||||
|
{
|
||||||
|
return INVALID_SECTOR;
|
||||||
|
}
|
||||||
|
|
||||||
iap_cmd[0] = 50;
|
iap_cmd[0] = 50;
|
||||||
iap_cmd[1] = start;
|
iap_cmd[1] = start;
|
||||||
iap_cmd[2] = end;
|
iap_cmd[2] = end;
|
||||||
@@ -88,8 +118,13 @@ IAP_RES iap_prepare_for_write(uint32_t start, uint32_t end) {
|
|||||||
return iap_res[0];
|
return iap_res[0];
|
||||||
}
|
}
|
||||||
|
|
||||||
IAP_RES iap_erase(uint32_t start, uint32_t end) {
|
IAP_RES iap_erase( uint32_t start, uint32_t end )
|
||||||
if(start < (FW_START / 0x1000)) return INVALID_SECTOR;
|
{
|
||||||
|
if ( start < ( FW_START / 0x1000 ) )
|
||||||
|
{
|
||||||
|
return INVALID_SECTOR;
|
||||||
|
}
|
||||||
|
|
||||||
iap_cmd[0] = 52;
|
iap_cmd[0] = 52;
|
||||||
iap_cmd[1] = start;
|
iap_cmd[1] = start;
|
||||||
iap_cmd[2] = end;
|
iap_cmd[2] = end;
|
||||||
@@ -98,7 +133,8 @@ IAP_RES iap_erase(uint32_t start, uint32_t end) {
|
|||||||
return iap_res[0];
|
return iap_res[0];
|
||||||
}
|
}
|
||||||
|
|
||||||
IAP_RES iap_ram2flash(uint32_t tgt, uint8_t *src, int num) {
|
IAP_RES iap_ram2flash( uint32_t tgt, uint8_t *src, int num )
|
||||||
|
{
|
||||||
iap_cmd[0] = 51;
|
iap_cmd[0] = 51;
|
||||||
iap_cmd[1] = tgt;
|
iap_cmd[1] = tgt;
|
||||||
iap_cmd[2] = ( uint32_t )src;
|
iap_cmd[2] = ( uint32_t )src;
|
||||||
@@ -108,43 +144,67 @@ IAP_RES iap_ram2flash(uint32_t tgt, uint8_t *src, int num) {
|
|||||||
return iap_res[0];
|
return iap_res[0];
|
||||||
}
|
}
|
||||||
|
|
||||||
FLASH_RES flash_file(uint8_t *filename) {
|
FLASH_RES flash_file( uint8_t *filename )
|
||||||
|
{
|
||||||
sd2snes_fw_header *fw_header = ( sd2snes_fw_header * ) FW_START;
|
sd2snes_fw_header *fw_header = ( sd2snes_fw_header * ) FW_START;
|
||||||
uint32_t flash_addr = FW_START;
|
uint32_t flash_addr = FW_START;
|
||||||
uint32_t file_crc = 0xffffffff;
|
uint32_t file_crc = 0xffffffff;
|
||||||
uint16_t count;
|
uint16_t count;
|
||||||
sd2snes_fw_header file_header;
|
sd2snes_fw_header file_header;
|
||||||
UINT bytes_read;
|
UINT bytes_read;
|
||||||
if(flash_addr != FW_START) {
|
|
||||||
DBG_BL printf("address sanity check failed. expected 0x%08lx, got 0x%08lx.\nSomething is terribly wrong.\nBailing out to avoid bootldr self-corruption.\n", FW_START, flash_addr);
|
if ( flash_addr != FW_START )
|
||||||
|
{
|
||||||
|
DBG_BL printf( "address sanity check failed. expected 0x%08lx, got 0x%08lx.\nSomething is terribly wrong.\nBailing out to avoid bootldr self-corruption.\n",
|
||||||
|
FW_START, flash_addr );
|
||||||
return ERR_HW;
|
return ERR_HW;
|
||||||
}
|
}
|
||||||
|
|
||||||
file_open( filename, FA_READ );
|
file_open( filename, FA_READ );
|
||||||
if(file_res) {
|
|
||||||
|
if ( file_res )
|
||||||
|
{
|
||||||
DBG_BL printf( "file_open: error %d\n", file_res );
|
DBG_BL printf( "file_open: error %d\n", file_res );
|
||||||
return ERR_FS;
|
return ERR_FS;
|
||||||
}
|
}
|
||||||
|
|
||||||
DBG_BL printf( "firmware image found. file size: %ld\n", file_handle.fsize );
|
DBG_BL printf( "firmware image found. file size: %ld\n", file_handle.fsize );
|
||||||
DBG_BL printf( "reading header...\n" );
|
DBG_BL printf( "reading header...\n" );
|
||||||
f_read( &file_handle, &file_header, 32, &bytes_read );
|
f_read( &file_handle, &file_header, 32, &bytes_read );
|
||||||
DBG_BL print_header( &file_header );
|
DBG_BL print_header( &file_header );
|
||||||
if(check_flash() || file_header.version != fw_header->version || file_header.version == FW_MAGIC || fw_header->version == FW_MAGIC) {
|
|
||||||
|
if ( check_flash() || file_header.version != fw_header->version || file_header.version == FW_MAGIC
|
||||||
|
|| fw_header->version == FW_MAGIC )
|
||||||
|
{
|
||||||
DBG_UART uart_putc( 'F' );
|
DBG_UART uart_putc( 'F' );
|
||||||
f_read( &file_handle, file_buf, 0xe0, &bytes_read );
|
f_read( &file_handle, file_buf, 0xe0, &bytes_read );
|
||||||
for(;;) {
|
|
||||||
|
for ( ;; )
|
||||||
|
{
|
||||||
bytes_read = file_read();
|
bytes_read = file_read();
|
||||||
if(file_res || !bytes_read) break;
|
|
||||||
for(count = 0; count < bytes_read; count++) {
|
if ( file_res || !bytes_read )
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
for ( count = 0; count < bytes_read; count++ )
|
||||||
|
{
|
||||||
file_crc = crc32_update( file_crc, file_buf[count] );
|
file_crc = crc32_update( file_crc, file_buf[count] );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
file_crc = crc_finalize( file_crc );
|
file_crc = crc_finalize( file_crc );
|
||||||
DBG_BL printf( "file crc=%08lx\n", file_crc );
|
DBG_BL printf( "file crc=%08lx\n", file_crc );
|
||||||
if(check_header(&file_header, file_header.crc) != ERR_OK) {
|
|
||||||
|
if ( check_header( &file_header, file_header.crc ) != ERR_OK )
|
||||||
|
{
|
||||||
DBG_BL printf( "Invalid firmware file (header corrupted).\n" );
|
DBG_BL printf( "Invalid firmware file (header corrupted).\n" );
|
||||||
return ERR_FILEHD;
|
return ERR_FILEHD;
|
||||||
}
|
}
|
||||||
if(file_header.crc != file_crc) {
|
|
||||||
|
if ( file_header.crc != file_crc )
|
||||||
|
{
|
||||||
DBG_BL printf( "Firmware file checksum error.\n" );
|
DBG_BL printf( "Firmware file checksum error.\n" );
|
||||||
return ERR_FILECHK;
|
return ERR_FILECHK;
|
||||||
}
|
}
|
||||||
@@ -153,45 +213,83 @@ FLASH_RES flash_file(uint8_t *filename) {
|
|||||||
|
|
||||||
writeled( 1 );
|
writeled( 1 );
|
||||||
DBG_BL printf( "erasing flash...\n" );
|
DBG_BL printf( "erasing flash...\n" );
|
||||||
if((res = iap_prepare_for_write(FW_START / 0x1000, FLASH_SECTORS)) != CMD_SUCCESS) {
|
DBG_UART uart_putc( 'P' );
|
||||||
|
|
||||||
|
if ( ( res = iap_prepare_for_write( FW_START / 0x1000, FLASH_SECTORS ) ) != CMD_SUCCESS )
|
||||||
|
{
|
||||||
DBG_BL printf( "error %ld while preparing for erase\n", res );
|
DBG_BL printf( "error %ld while preparing for erase\n", res );
|
||||||
|
DBG_UART uart_putc( 'X' );
|
||||||
return ERR_FLASHPREP;
|
return ERR_FLASHPREP;
|
||||||
};
|
};
|
||||||
if((res = iap_erase(FW_START / 0x1000, FLASH_SECTORS)) != CMD_SUCCESS) {
|
|
||||||
|
DBG_UART uart_putc( 'E' );
|
||||||
|
|
||||||
|
if ( ( res = iap_erase( FW_START / 0x1000, FLASH_SECTORS ) ) != CMD_SUCCESS )
|
||||||
|
{
|
||||||
DBG_BL printf( "error %ld while erasing\n", res );
|
DBG_BL printf( "error %ld while erasing\n", res );
|
||||||
|
DBG_UART uart_putc( 'X' );
|
||||||
return ERR_FLASHERASE;
|
return ERR_FLASHERASE;
|
||||||
}
|
}
|
||||||
|
|
||||||
DBG_BL printf( "writing... @%08lx\n", flash_addr );
|
DBG_BL printf( "writing... @%08lx\n", flash_addr );
|
||||||
file_close();
|
file_close();
|
||||||
file_open( filename, FA_READ );
|
file_open( filename, FA_READ );
|
||||||
uint8_t current_sec;
|
uint8_t current_sec;
|
||||||
uint32_t total_read = 0;
|
uint32_t total_read = 0;
|
||||||
for(flash_addr = FW_START; flash_addr < 0x00020000; flash_addr += 0x200) {
|
|
||||||
|
for ( flash_addr = FW_START; flash_addr < 0x00020000; flash_addr += 0x200 )
|
||||||
|
{
|
||||||
total_read += ( bytes_read = file_read() );
|
total_read += ( bytes_read = file_read() );
|
||||||
if(file_res || !bytes_read) break;
|
|
||||||
|
if ( file_res || !bytes_read )
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
current_sec = flash_addr & 0x10000 ? ( 16 + ( ( flash_addr >> 15 ) & 1 ) )
|
current_sec = flash_addr & 0x10000 ? ( 16 + ( ( flash_addr >> 15 ) & 1 ) )
|
||||||
: ( flash_addr >> 12 );
|
: ( flash_addr >> 12 );
|
||||||
DBG_BL printf( "current_sec=%d flash_addr=%08lx\n", current_sec, flash_addr );
|
DBG_BL printf( "current_sec=%d flash_addr=%08lx\n", current_sec, flash_addr );
|
||||||
DBG_UART uart_putc( '.' );
|
DBG_UART uart_putc( '.' );
|
||||||
if(current_sec < (FW_START / 0x1000)) return ERR_FLASH;
|
|
||||||
if((res = iap_prepare_for_write(current_sec, current_sec)) != CMD_SUCCESS) {
|
if ( current_sec < ( FW_START / 0x1000 ) )
|
||||||
|
{
|
||||||
|
return ERR_FLASH;
|
||||||
|
}
|
||||||
|
|
||||||
|
DBG_UART uart_putc( current_sec["0123456789ABCDEFGH"] );
|
||||||
|
DBG_UART uart_putc( 'p' );
|
||||||
|
|
||||||
|
if ( ( res = iap_prepare_for_write( current_sec, current_sec ) ) != CMD_SUCCESS )
|
||||||
|
{
|
||||||
DBG_BL printf( "error %ld while preparing sector %d for write\n", res, current_sec );
|
DBG_BL printf( "error %ld while preparing sector %d for write\n", res, current_sec );
|
||||||
return ERR_FLASH;
|
|
||||||
}
|
|
||||||
if((res = iap_ram2flash(flash_addr, file_buf, 512)) != CMD_SUCCESS) {
|
|
||||||
DBG_BL printf("error %ld while writing to address %08lx (sector %d)\n", res, flash_addr, current_sec);
|
|
||||||
return ERR_FLASH;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if(total_read != file_header.size) {
|
|
||||||
DBG_BL printf("wrote less data than expected! (%08lx vs. %08lx)\n", total_read, file_header.size);
|
|
||||||
DBG_UART uart_putc( 'X' );
|
DBG_UART uart_putc( 'X' );
|
||||||
|
return ERR_FLASH;
|
||||||
|
}
|
||||||
|
|
||||||
|
DBG_UART uart_putc( 'w' );
|
||||||
|
|
||||||
|
if ( ( res = iap_ram2flash( flash_addr, file_buf, 512 ) ) != CMD_SUCCESS )
|
||||||
|
{
|
||||||
|
//printf("error %ld while writing to address %08lx (sector %d)\n", res, flash_addr, current_sec);
|
||||||
|
DBG_UART uart_putc( 'X' );
|
||||||
|
return ERR_FLASH;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if ( total_read != ( file_header.size + 0x100 ) )
|
||||||
|
{
|
||||||
|
DBG_BL printf( "wrote less data than expected! (%08lx vs. %08lx)\n", total_read, file_header.size );
|
||||||
|
// DBG_UART uart_putc('X');
|
||||||
return ERR_FILECHK;
|
return ERR_FILECHK;
|
||||||
}
|
}
|
||||||
|
|
||||||
writeled( 0 );
|
writeled( 0 );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
DBG_UART uart_putc( 'n' );
|
DBG_UART uart_putc( 'n' );
|
||||||
DBG_BL printf( "flash content is ok, no version mismatch, no forced upgrade. No need to flash\n" );
|
DBG_BL printf( "flash content is ok, no version mismatch, no forced upgrade. No need to flash\n" );
|
||||||
}
|
}
|
||||||
|
|
||||||
return ERR_OK;
|
return ERR_OK;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -6,7 +6,8 @@ typedef void (*IAP)(uint32_t*, uint32_t*);
|
|||||||
|
|
||||||
typedef enum {ERR_OK = 0, ERR_HW, ERR_FS, ERR_FILEHD, ERR_FILECHK, ERR_FLASHHD, ERR_FLASHCRC, ERR_FLASHPREP, ERR_FLASHERASE, ERR_FLASH} FLASH_RES;
|
typedef enum {ERR_OK = 0, ERR_HW, ERR_FS, ERR_FILEHD, ERR_FILECHK, ERR_FLASHHD, ERR_FLASHCRC, ERR_FLASHPREP, ERR_FLASHERASE, ERR_FLASH} FLASH_RES;
|
||||||
|
|
||||||
typedef enum {
|
typedef enum
|
||||||
|
{
|
||||||
/* 0*/ CMD_SUCCESS = 0,
|
/* 0*/ CMD_SUCCESS = 0,
|
||||||
/* 1*/ INVALID_COMMAND,
|
/* 1*/ INVALID_COMMAND,
|
||||||
/* 2*/ SRC_ADDR_ERROR,
|
/* 2*/ SRC_ADDR_ERROR,
|
||||||
@@ -23,7 +24,8 @@ typedef enum {
|
|||||||
|
|
||||||
#define FW_MAGIC (0x44534E53)
|
#define FW_MAGIC (0x44534E53)
|
||||||
|
|
||||||
typedef struct {
|
typedef struct
|
||||||
|
{
|
||||||
uint32_t magic;
|
uint32_t magic;
|
||||||
uint32_t version;
|
uint32_t version;
|
||||||
uint32_t size;
|
uint32_t size;
|
||||||
|
|||||||
@@ -18,23 +18,28 @@ int led_writeledstate = 0;
|
|||||||
write red P1.23 PWM1[4]
|
write red P1.23 PWM1[4]
|
||||||
*/
|
*/
|
||||||
|
|
||||||
void rdyled(unsigned int state) {
|
void rdyled( unsigned int state )
|
||||||
BITBAND(LPC_GPIO2->FIODIR, 4) = state;
|
{
|
||||||
|
BITBANG( LPC_GPIO2->FIODIR, 4 ) = state;
|
||||||
led_rdyledstate = state;
|
led_rdyledstate = state;
|
||||||
}
|
}
|
||||||
|
|
||||||
void readled(unsigned int state) {
|
void readled( unsigned int state )
|
||||||
BITBAND(LPC_GPIO2->FIODIR, 5) = state;
|
{
|
||||||
|
BITBANG( LPC_GPIO2->FIODIR, 5 ) = state;
|
||||||
led_readledstate = state;
|
led_readledstate = state;
|
||||||
}
|
}
|
||||||
|
|
||||||
void writeled(unsigned int state) {
|
void writeled( unsigned int state )
|
||||||
BITBAND(LPC_GPIO1->FIODIR, 23) = state;
|
{
|
||||||
|
BITBANG( LPC_GPIO1->FIODIR, 23 ) = state;
|
||||||
led_writeledstate = state;
|
led_writeledstate = state;
|
||||||
}
|
}
|
||||||
|
|
||||||
void led_clkout32(uint32_t val) {
|
void led_clkout32( uint32_t val )
|
||||||
while(1) {
|
{
|
||||||
|
while ( 1 )
|
||||||
|
{
|
||||||
rdyled( 1 );
|
rdyled( 1 );
|
||||||
delay_ms( 400 );
|
delay_ms( 400 );
|
||||||
readled( ( val & BV( 31 ) ) >> 31 );
|
readled( ( val & BV( 31 ) ) >> 31 );
|
||||||
@@ -44,20 +49,25 @@ void led_clkout32(uint32_t val) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void toggle_rdy_led() {
|
void toggle_rdy_led()
|
||||||
|
{
|
||||||
rdyled( ~led_rdyledstate );
|
rdyled( ~led_rdyledstate );
|
||||||
}
|
}
|
||||||
|
|
||||||
void toggle_read_led() {
|
void toggle_read_led()
|
||||||
|
{
|
||||||
readled( ~led_readledstate );
|
readled( ~led_readledstate );
|
||||||
}
|
}
|
||||||
|
|
||||||
void toggle_write_led() {
|
void toggle_write_led()
|
||||||
|
{
|
||||||
writeled( ~led_writeledstate );
|
writeled( ~led_writeledstate );
|
||||||
}
|
}
|
||||||
|
|
||||||
void led_panic() {
|
void led_panic()
|
||||||
while(1) {
|
{
|
||||||
|
while ( 1 )
|
||||||
|
{
|
||||||
LPC_GPIO2->FIODIR |= BV( 4 ) | BV( 5 );
|
LPC_GPIO2->FIODIR |= BV( 4 ) | BV( 5 );
|
||||||
LPC_GPIO1->FIODIR |= BV( 23 );
|
LPC_GPIO1->FIODIR |= BV( 23 );
|
||||||
delay_ms( 350 );
|
delay_ms( 350 );
|
||||||
@@ -67,24 +77,26 @@ void led_panic() {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void led_std() {
|
void led_std()
|
||||||
BITBAND(LPC_PINCON->PINSEL4, 9) = 0;
|
{
|
||||||
BITBAND(LPC_PINCON->PINSEL4, 8) = 0;
|
BITBANG( LPC_PINCON->PINSEL4, 9 ) = 0;
|
||||||
|
BITBANG( LPC_PINCON->PINSEL4, 8 ) = 0;
|
||||||
|
|
||||||
BITBAND(LPC_PINCON->PINSEL4, 11) = 0;
|
BITBANG( LPC_PINCON->PINSEL4, 11 ) = 0;
|
||||||
BITBAND(LPC_PINCON->PINSEL4, 10) = 0;
|
BITBANG( LPC_PINCON->PINSEL4, 10 ) = 0;
|
||||||
|
|
||||||
BITBAND(LPC_PINCON->PINSEL3, 15) = 0;
|
BITBANG( LPC_PINCON->PINSEL3, 15 ) = 0;
|
||||||
BITBAND(LPC_PINCON->PINSEL3, 14) = 0;
|
BITBANG( LPC_PINCON->PINSEL3, 14 ) = 0;
|
||||||
|
|
||||||
BITBAND(LPC_PWM1->PCR, 12) = 0;
|
BITBANG( LPC_PWM1->PCR, 12 ) = 0;
|
||||||
BITBAND(LPC_PWM1->PCR, 13) = 0;
|
BITBANG( LPC_PWM1->PCR, 13 ) = 0;
|
||||||
BITBAND(LPC_PWM1->PCR, 14) = 0;
|
BITBANG( LPC_PWM1->PCR, 14 ) = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void led_init() {
|
void led_init()
|
||||||
|
{
|
||||||
/* power is already connected by default */
|
/* power is already connected by default */
|
||||||
/* set PCLK divider to 8 */
|
/* set PCLK divider to 8 */
|
||||||
BITBAND(LPC_SC->PCLKSEL1, 21) = 1;
|
BITBANG( LPC_SC->PCLKSEL1, 21 ) = 1;
|
||||||
BITBAND(LPC_SC->PCLKSEL1, 20) = 1;
|
BITBANG( LPC_SC->PCLKSEL1, 20 ) = 1;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -27,9 +27,9 @@ if { [info exists CPUTAPID ] } {
|
|||||||
|
|
||||||
#delays on reset lines
|
#delays on reset lines
|
||||||
#if your OpenOCD version rejects "jtag_nsrst_delay" replace it with:
|
#if your OpenOCD version rejects "jtag_nsrst_delay" replace it with:
|
||||||
#adapter_nsrst_delay 200
|
adapter_nsrst_delay 200
|
||||||
jtag_nsrst_delay 200
|
#jtag_nsrst_delay 200
|
||||||
jtag_ntrst_delay 200
|
#jtag_ntrst_delay 200
|
||||||
|
|
||||||
# LPC2000 & LPC1700 -> SRST causes TRST
|
# LPC2000 & LPC1700 -> SRST causes TRST
|
||||||
#reset_config srst_pulls_trst
|
#reset_config srst_pulls_trst
|
||||||
@@ -56,7 +56,7 @@ flash bank $_FLASHNAME lpc2000 0x0 0x20000 0 0 $_TARGETNAME \
|
|||||||
# Run with *real slow* clock by default since the
|
# Run with *real slow* clock by default since the
|
||||||
# boot rom could have been playing with the PLL, so
|
# boot rom could have been playing with the PLL, so
|
||||||
# we have no idea what clock the target is running at.
|
# we have no idea what clock the target is running at.
|
||||||
jtag_khz 1000
|
adapter_khz 1000
|
||||||
|
|
||||||
$_TARGETNAME configure -event reset-init {
|
$_TARGETNAME configure -event reset-init {
|
||||||
# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
|
# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
|
||||||
|
|||||||
@@ -10,7 +10,7 @@ ENTRY(_start)
|
|||||||
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
flash (rx) : ORIGIN = 0x00000000, LENGTH = 0x03000
|
flash (rx) : ORIGIN = 0x00000000, LENGTH = 0x02000
|
||||||
ram (rwx) : ORIGIN = 0x10000000, LENGTH = 0x03fe0 /* leave room for IAP */
|
ram (rwx) : ORIGIN = 0x10000000, LENGTH = 0x03fe0 /* leave room for IAP */
|
||||||
ahbram (rwx) : ORIGIN = 0x2007C000, LENGTH = 0x04000
|
ahbram (rwx) : ORIGIN = 0x2007C000, LENGTH = 0x04000
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -20,16 +20,26 @@
|
|||||||
|
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
|
BYTE file_buf[512] GCC_ALIGN_WORKAROUND;
|
||||||
|
FATFS fatfs;
|
||||||
|
FIL file_handle;
|
||||||
|
FRESULT file_res;
|
||||||
|
uint8_t file_lfn[258];
|
||||||
|
uint16_t file_block_off, file_block_max;
|
||||||
|
enum filestates file_status;
|
||||||
|
|
||||||
volatile enum diskstates disk_state;
|
volatile enum diskstates disk_state;
|
||||||
extern volatile tick_t ticks;
|
extern volatile tick_t ticks;
|
||||||
|
|
||||||
int (*chain)(void) = (void*)(FW_START+0x000001c5);
|
int ( *chain )( void );
|
||||||
|
|
||||||
int main(void) {
|
int main( void )
|
||||||
|
{
|
||||||
SNES_CIC_PAIR_REG->FIODIR = BV( SNES_CIC_PAIR_BIT );
|
SNES_CIC_PAIR_REG->FIODIR = BV( SNES_CIC_PAIR_BIT );
|
||||||
BITBAND(SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT) = 1;
|
BITBANG( SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT ) = 1;
|
||||||
|
|
||||||
/* LPC_GPIO2->FIODIR = BV(0) | BV(1) | BV(2); */
|
/* LPC_GPIO2->FIODIR = BV(0) | BV(1) | BV(2); */
|
||||||
LPC_GPIO0->FIODIR = BV(16);
|
// LPC_GPIO0->FIODIR = BV(16);
|
||||||
|
|
||||||
/* connect UART3 on P0[25:26] + SSP0 on P0[15:18] + MAT3.0 on P0[10] */
|
/* connect UART3 on P0[25:26] + SSP0 on P0[15:18] + MAT3.0 on P0[10] */
|
||||||
LPC_PINCON->PINSEL1 = BV( 18 ) | BV( 19 ) | BV( 20 ) | BV( 21 ) /* UART3 */
|
LPC_PINCON->PINSEL1 = BV( 18 ) | BV( 19 ) | BV( 20 ) | BV( 21 ) /* UART3 */
|
||||||
@@ -50,10 +60,18 @@ int main(void) {
|
|||||||
writeled( 0 );
|
writeled( 0 );
|
||||||
/* do this last because the peripheral init()s change PCLK dividers */
|
/* do this last because the peripheral init()s change PCLK dividers */
|
||||||
clock_init();
|
clock_init();
|
||||||
LPC_PINCON->PINSEL0 |= BV(20) | BV(21); /* MAT3.0 (FPGA clock) */
|
// LPC_PINCON->PINSEL0 |= BV(20) | BV(21); /* MAT3.0 (FPGA clock) */
|
||||||
sdn_init();
|
sdn_init();
|
||||||
|
|
||||||
|
for ( i = 0; i < 20; i++ )
|
||||||
|
{
|
||||||
|
uart_putc( '-' );
|
||||||
|
}
|
||||||
|
|
||||||
|
uart_putc( '\n' );
|
||||||
|
|
||||||
DBG_BL printf( "chksum=%08lx\n", *( uint32_t * )28 );
|
DBG_BL printf( "chksum=%08lx\n", *( uint32_t * )28 );
|
||||||
DBG_BL printf("\n\nsd2snes mk.2 bootloader\nver.: " VER "\ncpu clock: %ld Hz\n", CONFIG_CPU_FREQUENCY);
|
/*DBG_BL*/ printf( "\n\nsd2snes mk.2 bootloader\nver.: " VER "\ncpu clock: %ld Hz\n", CONFIG_CPU_FREQUENCY );
|
||||||
DBG_BL printf( "PCONP=%lx\n", LPC_SC->PCONP );
|
DBG_BL printf( "PCONP=%lx\n", LPC_SC->PCONP );
|
||||||
/* setup timer (fpga clk) */
|
/* setup timer (fpga clk) */
|
||||||
LPC_TIM3->CTCR = 0;
|
LPC_TIM3->CTCR = 0;
|
||||||
@@ -61,31 +79,54 @@ DBG_BL printf("PCONP=%lx\n", LPC_SC->PCONP);
|
|||||||
LPC_TIM3->MCR = MR0R;
|
LPC_TIM3->MCR = MR0R;
|
||||||
LPC_TIM3->MR0 = 1;
|
LPC_TIM3->MR0 = 1;
|
||||||
LPC_TIM3->TCR = 1;
|
LPC_TIM3->TCR = 1;
|
||||||
|
NVIC->ICER[0] = 0xffffffff;
|
||||||
|
NVIC->ICER[1] = 0xffffffff;
|
||||||
FLASH_RES res = flash_file( ( uint8_t * )"/sd2snes/firmware.img" );
|
FLASH_RES res = flash_file( ( uint8_t * )"/sd2snes/firmware.img" );
|
||||||
if(res == ERR_FLASHPREP || res == ERR_FLASHERASE || res == ERR_FLASH) {
|
|
||||||
|
if ( res == ERR_FLASHPREP || res == ERR_FLASHERASE || res == ERR_FLASH )
|
||||||
|
{
|
||||||
rdyled( 0 );
|
rdyled( 0 );
|
||||||
writeled( 1 );
|
writeled( 1 );
|
||||||
}
|
}
|
||||||
if(res == ERR_FILEHD || res == ERR_FILECHK) {
|
|
||||||
|
if ( res == ERR_FILEHD || res == ERR_FILECHK )
|
||||||
|
{
|
||||||
rdyled( 0 );
|
rdyled( 0 );
|
||||||
readled( 1 );
|
readled( 1 );
|
||||||
}
|
}
|
||||||
|
|
||||||
DBG_BL printf( "flash result = %d\n", res );
|
DBG_BL printf( "flash result = %d\n", res );
|
||||||
if(res != ERR_OK) {
|
|
||||||
if((res = check_flash()) != ERR_OK) {
|
if ( res != ERR_OK )
|
||||||
|
{
|
||||||
|
if ( ( res = check_flash() ) != ERR_OK )
|
||||||
|
{
|
||||||
DBG_BL printf( "check_flash() failed with error %d, not booting.\n", res );
|
DBG_BL printf( "check_flash() failed with error %d, not booting.\n", res );
|
||||||
while(1) {
|
|
||||||
|
while ( 1 )
|
||||||
|
{
|
||||||
toggle_rdy_led();
|
toggle_rdy_led();
|
||||||
delay_ms( 500 );
|
delay_ms( 500 );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
NVIC_DisableIRQ( RIT_IRQn );
|
NVIC_DisableIRQ( RIT_IRQn );
|
||||||
NVIC_DisableIRQ( UART_IRQ );
|
NVIC_DisableIRQ( UART_IRQ );
|
||||||
|
|
||||||
SCB->VTOR = FW_START + 0x00000100;
|
SCB->VTOR = FW_START + 0x00000100;
|
||||||
|
chain = ( void * )( *( ( uint32_t * )( FW_START + 0x00000104 ) ) );
|
||||||
|
uart_putc( "0123456789abcdef"[( ( uint32_t )chain >> 28 ) & 15] );
|
||||||
|
uart_putc( "0123456789abcdef"[( ( uint32_t )chain >> 24 ) & 15] );
|
||||||
|
uart_putc( "0123456789abcdef"[( ( uint32_t )chain >> 20 ) & 15] );
|
||||||
|
uart_putc( "0123456789abcdef"[( ( uint32_t )chain >> 16 ) & 15] );
|
||||||
|
uart_putc( "0123456789abcdef"[( ( uint32_t )chain >> 12 ) & 15] );
|
||||||
|
uart_putc( "0123456789abcdef"[( ( uint32_t )chain >> 8 ) & 15] );
|
||||||
|
uart_putc( "0123456789abcdef"[( ( uint32_t )chain >> 4 ) & 15] );
|
||||||
|
uart_putc( "0123456789abcdef"[( ( uint32_t )chain ) & 15] );
|
||||||
|
uart_putc( '\n' );
|
||||||
chain();
|
chain();
|
||||||
|
|
||||||
while ( 1 );
|
while ( 1 );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -5,8 +5,14 @@
|
|||||||
#
|
#
|
||||||
|
|
||||||
interface ft2232
|
interface ft2232
|
||||||
ft2232_vid_pid 0x0403 0x6010
|
ft2232_vid_pid 0x15ba 0x0003
|
||||||
ft2232_device_desc "Dual RS232"
|
ft2232_device_desc "Olimex OpenOCD JTAG"
|
||||||
ft2232_layout "oocdlink"
|
ft2232_layout "olimex-jtag"
|
||||||
ft2232_latency 2
|
|
||||||
|
|
||||||
|
#interface ft2232
|
||||||
|
#ft2232_vid_pid 0x0403 0x6010
|
||||||
|
#ft2232_device_desc "Dual RS232"
|
||||||
|
#ft2232_layout "oocdlink"
|
||||||
|
#ft2232_latency 2
|
||||||
#adapter_khz 10
|
#adapter_khz 10
|
||||||
|
|||||||
@@ -15,7 +15,8 @@
|
|||||||
* USB [enabled via usb_init]
|
* USB [enabled via usb_init]
|
||||||
* PWM1
|
* PWM1
|
||||||
*/
|
*/
|
||||||
void power_init() {
|
void power_init()
|
||||||
|
{
|
||||||
LPC_SC->PCONP = BV( PCSSP0 )
|
LPC_SC->PCONP = BV( PCSSP0 )
|
||||||
| BV( PCTIM3 )
|
| BV( PCTIM3 )
|
||||||
| BV( PCRTC )
|
| BV( PCRTC )
|
||||||
|
|||||||
@@ -62,8 +62,10 @@ static char *outptr;
|
|||||||
static int maxlen;
|
static int maxlen;
|
||||||
|
|
||||||
/* printf */
|
/* printf */
|
||||||
static void outchar(char x) {
|
static void outchar( char x )
|
||||||
if (maxlen) {
|
{
|
||||||
|
if ( maxlen )
|
||||||
|
{
|
||||||
maxlen--;
|
maxlen--;
|
||||||
outfunc( x );
|
outfunc( x );
|
||||||
outlength++;
|
outlength++;
|
||||||
@@ -71,15 +73,18 @@ static void outchar(char x) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* sprintf */
|
/* sprintf */
|
||||||
static void outstr(char x) {
|
static void outstr( char x )
|
||||||
if (maxlen) {
|
{
|
||||||
|
if ( maxlen )
|
||||||
|
{
|
||||||
maxlen--;
|
maxlen--;
|
||||||
*outptr++ = x;
|
*outptr++ = x;
|
||||||
outlength++;
|
outlength++;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static int internal_nprintf(void (*output_function)(char c), const char *fmt, va_list ap) {
|
static int internal_nprintf( void ( *output_function )( char c ), const char *fmt, va_list ap )
|
||||||
|
{
|
||||||
unsigned int width;
|
unsigned int width;
|
||||||
unsigned int flags;
|
unsigned int flags;
|
||||||
unsigned int base = 0;
|
unsigned int base = 0;
|
||||||
@@ -87,16 +92,24 @@ static int internal_nprintf(void (*output_function)(char c), const char *fmt, va
|
|||||||
|
|
||||||
outlength = 0;
|
outlength = 0;
|
||||||
|
|
||||||
while (*fmt) {
|
while ( *fmt )
|
||||||
while (1) {
|
{
|
||||||
|
while ( 1 )
|
||||||
|
{
|
||||||
if ( *fmt == 0 )
|
if ( *fmt == 0 )
|
||||||
|
{
|
||||||
goto end;
|
goto end;
|
||||||
|
}
|
||||||
|
|
||||||
if (*fmt == '%') {
|
if ( *fmt == '%' )
|
||||||
|
{
|
||||||
fmt++;
|
fmt++;
|
||||||
|
|
||||||
if ( *fmt != '%' )
|
if ( *fmt != '%' )
|
||||||
|
{
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
output_function( *fmt++ );
|
output_function( *fmt++ );
|
||||||
}
|
}
|
||||||
@@ -105,9 +118,12 @@ static int internal_nprintf(void (*output_function)(char c), const char *fmt, va
|
|||||||
width = 0;
|
width = 0;
|
||||||
|
|
||||||
/* read all flags */
|
/* read all flags */
|
||||||
do {
|
do
|
||||||
if (flags < FLAG_WIDTH) {
|
{
|
||||||
switch (*fmt) {
|
if ( flags < FLAG_WIDTH )
|
||||||
|
{
|
||||||
|
switch ( *fmt )
|
||||||
|
{
|
||||||
case '0':
|
case '0':
|
||||||
flags |= FLAG_ZEROPAD;
|
flags |= FLAG_ZEROPAD;
|
||||||
continue;
|
continue;
|
||||||
@@ -126,8 +142,10 @@ static int internal_nprintf(void (*output_function)(char c), const char *fmt, va
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (flags < FLAG_LONG) {
|
if ( flags < FLAG_LONG )
|
||||||
if (*fmt >= '0' && *fmt <= '9') {
|
{
|
||||||
|
if ( *fmt >= '0' && *fmt <= '9' )
|
||||||
|
{
|
||||||
unsigned char tmp = *fmt - '0';
|
unsigned char tmp = *fmt - '0';
|
||||||
width = 10 * width + tmp;
|
width = 10 * width + tmp;
|
||||||
flags |= FLAG_WIDTH;
|
flags |= FLAG_WIDTH;
|
||||||
@@ -135,20 +153,26 @@ static int internal_nprintf(void (*output_function)(char c), const char *fmt, va
|
|||||||
}
|
}
|
||||||
|
|
||||||
if ( *fmt == 'h' )
|
if ( *fmt == 'h' )
|
||||||
|
{
|
||||||
continue;
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
if (*fmt == 'l') {
|
if ( *fmt == 'l' )
|
||||||
|
{
|
||||||
flags |= FLAG_LONG;
|
flags |= FLAG_LONG;
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
break;
|
break;
|
||||||
} while (*fmt++);
|
}
|
||||||
|
while ( *fmt++ );
|
||||||
|
|
||||||
/* Strings */
|
/* Strings */
|
||||||
if (*fmt == 'c' || *fmt == 's') {
|
if ( *fmt == 'c' || *fmt == 's' )
|
||||||
switch (*fmt) {
|
{
|
||||||
|
switch ( *fmt )
|
||||||
|
{
|
||||||
case 'c':
|
case 'c':
|
||||||
buffer[0] = va_arg( ap, int );
|
buffer[0] = va_arg( ap, int );
|
||||||
ptr = buffer;
|
ptr = buffer;
|
||||||
@@ -163,9 +187,11 @@ static int internal_nprintf(void (*output_function)(char c), const char *fmt, va
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Numbers */
|
/* Numbers */
|
||||||
switch (*fmt) {
|
switch ( *fmt )
|
||||||
|
{
|
||||||
case 'u':
|
case 'u':
|
||||||
flags |= FLAG_UNSIGNED;
|
flags |= FLAG_UNSIGNED;
|
||||||
|
|
||||||
case 'd':
|
case 'd':
|
||||||
base = 10;
|
base = 10;
|
||||||
break;
|
break;
|
||||||
@@ -179,6 +205,7 @@ static int internal_nprintf(void (*output_function)(char c), const char *fmt, va
|
|||||||
output_function( '0' );
|
output_function( '0' );
|
||||||
output_function( 'x' );
|
output_function( 'x' );
|
||||||
width -= 2;
|
width -= 2;
|
||||||
|
|
||||||
case 'x':
|
case 'x':
|
||||||
case 'X':
|
case 'X':
|
||||||
base = 16;
|
base = 16;
|
||||||
@@ -188,59 +215,89 @@ static int internal_nprintf(void (*output_function)(char c), const char *fmt, va
|
|||||||
|
|
||||||
unsigned int num;
|
unsigned int num;
|
||||||
|
|
||||||
if (!(flags & FLAG_UNSIGNED)) {
|
if ( !( flags & FLAG_UNSIGNED ) )
|
||||||
|
{
|
||||||
int tmp = va_arg( ap, int );
|
int tmp = va_arg( ap, int );
|
||||||
if (tmp < 0) {
|
|
||||||
|
if ( tmp < 0 )
|
||||||
|
{
|
||||||
num = -tmp;
|
num = -tmp;
|
||||||
flags |= FLAG_NEGATIVE;
|
flags |= FLAG_NEGATIVE;
|
||||||
} else
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
num = tmp;
|
num = tmp;
|
||||||
} else {
|
}
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
num = va_arg( ap, unsigned int );
|
num = va_arg( ap, unsigned int );
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Convert number into buffer */
|
/* Convert number into buffer */
|
||||||
ptr = buffer + sizeof( buffer );
|
ptr = buffer + sizeof( buffer );
|
||||||
*--ptr = 0;
|
*--ptr = 0;
|
||||||
do {
|
|
||||||
|
do
|
||||||
|
{
|
||||||
*--ptr = hexdigits[num % base];
|
*--ptr = hexdigits[num % base];
|
||||||
num /= base;
|
num /= base;
|
||||||
} while (num != 0);
|
}
|
||||||
|
while ( num != 0 );
|
||||||
|
|
||||||
/* Sign */
|
/* Sign */
|
||||||
if (flags & FLAG_NEGATIVE) {
|
if ( flags & FLAG_NEGATIVE )
|
||||||
|
{
|
||||||
output_function( '-' );
|
output_function( '-' );
|
||||||
width--;
|
width--;
|
||||||
} else if (flags & FLAG_FORCESIGN) {
|
}
|
||||||
|
else if ( flags & FLAG_FORCESIGN )
|
||||||
|
{
|
||||||
output_function( '+' );
|
output_function( '+' );
|
||||||
width--;
|
width--;
|
||||||
} else if (flags & FLAG_BLANK) {
|
}
|
||||||
|
else if ( flags & FLAG_BLANK )
|
||||||
|
{
|
||||||
output_function( ' ' );
|
output_function( ' ' );
|
||||||
width--;
|
width--;
|
||||||
}
|
}
|
||||||
|
|
||||||
output:
|
output:
|
||||||
|
|
||||||
/* left padding */
|
/* left padding */
|
||||||
if ((flags & FLAG_WIDTH) && !(flags & FLAG_LEFTADJ)) {
|
if ( ( flags & FLAG_WIDTH ) && !( flags & FLAG_LEFTADJ ) )
|
||||||
while (strlen(ptr) < width) {
|
{
|
||||||
|
while ( strlen( ptr ) < width )
|
||||||
|
{
|
||||||
if ( flags & FLAG_ZEROPAD )
|
if ( flags & FLAG_ZEROPAD )
|
||||||
|
{
|
||||||
output_function( '0' );
|
output_function( '0' );
|
||||||
|
}
|
||||||
else
|
else
|
||||||
|
{
|
||||||
output_function( ' ' );
|
output_function( ' ' );
|
||||||
|
}
|
||||||
|
|
||||||
width--;
|
width--;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* data */
|
/* data */
|
||||||
while (*ptr) {
|
while ( *ptr )
|
||||||
|
{
|
||||||
output_function( *ptr++ );
|
output_function( *ptr++ );
|
||||||
|
|
||||||
if ( width )
|
if ( width )
|
||||||
|
{
|
||||||
width--;
|
width--;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
/* right padding */
|
/* right padding */
|
||||||
if (flags & FLAG_WIDTH) {
|
if ( flags & FLAG_WIDTH )
|
||||||
while (width) {
|
{
|
||||||
|
while ( width )
|
||||||
|
{
|
||||||
output_function( ' ' );
|
output_function( ' ' );
|
||||||
width--;
|
width--;
|
||||||
}
|
}
|
||||||
@@ -253,7 +310,8 @@ static int internal_nprintf(void (*output_function)(char c), const char *fmt, va
|
|||||||
return outlength;
|
return outlength;
|
||||||
}
|
}
|
||||||
|
|
||||||
int printf(const char *format, ...) {
|
int printf( const char *format, ... )
|
||||||
|
{
|
||||||
va_list ap;
|
va_list ap;
|
||||||
int res;
|
int res;
|
||||||
|
|
||||||
@@ -264,7 +322,8 @@ int printf(const char *format, ...) {
|
|||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
int snprintf(char *str, size_t size, const char *format, ...) {
|
int snprintf( char *str, size_t size, const char *format, ... )
|
||||||
|
{
|
||||||
va_list ap;
|
va_list ap;
|
||||||
int res;
|
int res;
|
||||||
|
|
||||||
@@ -273,28 +332,43 @@ int snprintf(char *str, size_t size, const char *format, ...) {
|
|||||||
va_start( ap, format );
|
va_start( ap, format );
|
||||||
res = internal_nprintf( outstr, format, ap );
|
res = internal_nprintf( outstr, format, ap );
|
||||||
va_end( ap );
|
va_end( ap );
|
||||||
|
|
||||||
if ( res < size )
|
if ( res < size )
|
||||||
|
{
|
||||||
str[res] = 0;
|
str[res] = 0;
|
||||||
|
}
|
||||||
|
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Required for gcc compatibility */
|
/* Required for gcc compatibility */
|
||||||
int puts(const char *str) {
|
int puts( const char *str )
|
||||||
|
{
|
||||||
uart_puts( str );
|
uart_puts( str );
|
||||||
uart_putc( '\n' );
|
uart_putc( '\n' );
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#undef putchar
|
#undef putchar
|
||||||
int putchar(int c) {
|
int putchar( int c )
|
||||||
|
{
|
||||||
uart_putc( c );
|
uart_putc( c );
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
#else
|
#else
|
||||||
int printf(const char *format, ...) { return 0; }
|
int printf( const char *format, ... )
|
||||||
int snprintf(char *str, size_t size, const char *format, ...) { return 0; }
|
{
|
||||||
int puts(const char *str) { return 0; }
|
return 0;
|
||||||
|
}
|
||||||
|
//int snprintf(char *str, size_t size, const char *format, ...) { return 0; }
|
||||||
|
int puts( const char *str )
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
#undef putchar
|
#undef putchar
|
||||||
int putchar(int c) { return 0; }
|
int putchar( int c )
|
||||||
|
{
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@@ -1,5 +1,4 @@
|
|||||||
/* ___INGO___ */
|
/* ___INGO___ */
|
||||||
|
|
||||||
#include <arm/NXP/LPC17xx/LPC17xx.h>
|
#include <arm/NXP/LPC17xx/LPC17xx.h>
|
||||||
#include "bits.h"
|
#include "bits.h"
|
||||||
#include "config.h"
|
#include "config.h"
|
||||||
@@ -18,87 +17,44 @@ extern volatile int sd_changed;
|
|||||||
volatile tick_t ticks;
|
volatile tick_t ticks;
|
||||||
volatile int wokefromrit;
|
volatile int wokefromrit;
|
||||||
|
|
||||||
void __attribute__((weak,noinline)) SysTick_Hook(void) {
|
void timer_init( void )
|
||||||
/* Empty function for hooking the systick handler */
|
{
|
||||||
}
|
|
||||||
|
|
||||||
/* Systick interrupt handler */
|
|
||||||
void SysTick_Handler(void) {
|
|
||||||
ticks++;
|
|
||||||
static uint16_t sdch_state = 0;
|
|
||||||
sdch_state = (sdch_state << 1) | SDCARD_DETECT | 0xe000;
|
|
||||||
if((sdch_state == 0xf000) || (sdch_state == 0xefff)) {
|
|
||||||
sd_changed = 1;
|
|
||||||
}
|
|
||||||
sdn_changed();
|
|
||||||
SysTick_Hook();
|
|
||||||
}
|
|
||||||
|
|
||||||
void __attribute__((weak,noinline)) RIT_Hook(void) {
|
|
||||||
}
|
|
||||||
|
|
||||||
void RIT_IRQHandler(void) {
|
|
||||||
LPC_RIT->RICTRL = BV(RITINT);
|
|
||||||
NVIC_ClearPendingIRQ(RIT_IRQn);
|
|
||||||
wokefromrit = 1;
|
|
||||||
RIT_Hook();
|
|
||||||
}
|
|
||||||
|
|
||||||
void timer_init(void) {
|
|
||||||
/* turn on power to RIT */
|
/* turn on power to RIT */
|
||||||
BITBAND(LPC_SC->PCONP, PCRIT) = 1;
|
BITBANG( LPC_SC->PCONP, PCRIT ) = 1;
|
||||||
|
|
||||||
/* clear RIT mask */
|
/* clear RIT mask */
|
||||||
LPC_RIT->RIMASK = 0; /*xffffffff;*/
|
LPC_RIT->RIMASK = 0; /*xffffffff;*/
|
||||||
|
|
||||||
/* PCLK = CCLK */
|
/* PCLK = CCLK */
|
||||||
BITBAND(LPC_SC->PCLKSEL1, 26) = 1;
|
BITBANG( LPC_SC->PCLKSEL1, 26 ) = 1;
|
||||||
BITBAND(LPC_SC->PCLKSEL1, PCLK_TIMER3) = 1;
|
BITBANG( LPC_SC->PCLKSEL1, PCLK_TIMER3 ) = 1;
|
||||||
/* enable SysTick */
|
|
||||||
SysTick_Config((SysTick->CALIB & SysTick_CALIB_TENMS_Msk));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void delay_us(unsigned int time) {
|
void delay_us( unsigned int time )
|
||||||
|
{
|
||||||
/* Prepare RIT */
|
/* Prepare RIT */
|
||||||
LPC_RIT->RICOUNTER = 0;
|
LPC_RIT->RICOUNTER = 0;
|
||||||
LPC_RIT->RICOMPVAL = ( CONFIG_CPU_FREQUENCY / 1000000 ) * time;
|
LPC_RIT->RICOMPVAL = ( CONFIG_CPU_FREQUENCY / 1000000 ) * time;
|
||||||
LPC_RIT->RICTRL = BV( RITEN ) | BV( RITINT );
|
LPC_RIT->RICTRL = BV( RITEN ) | BV( RITINT );
|
||||||
|
|
||||||
/* Wait until RIT signals an interrupt */
|
/* Wait until RIT signals an interrupt */
|
||||||
while (!(BITBAND(LPC_RIT->RICTRL, RITINT))) ;
|
while ( !( BITBANG( LPC_RIT->RICTRL, RITINT ) ) ) ;
|
||||||
|
|
||||||
/* Disable RIT */
|
/* Disable RIT */
|
||||||
LPC_RIT->RICTRL = 0;
|
LPC_RIT->RICTRL = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void delay_ms(unsigned int time) {
|
void delay_ms( unsigned int time )
|
||||||
|
{
|
||||||
/* Prepare RIT */
|
/* Prepare RIT */
|
||||||
LPC_RIT->RICOUNTER = 0;
|
LPC_RIT->RICOUNTER = 0;
|
||||||
LPC_RIT->RICOMPVAL = ( CONFIG_CPU_FREQUENCY / 1000 ) * time;
|
LPC_RIT->RICOMPVAL = ( CONFIG_CPU_FREQUENCY / 1000 ) * time;
|
||||||
LPC_RIT->RICTRL = BV( RITEN ) | BV( RITINT );
|
LPC_RIT->RICTRL = BV( RITEN ) | BV( RITINT );
|
||||||
|
|
||||||
/* Wait until RIT signals an interrupt */
|
/* Wait until RIT signals an interrupt */
|
||||||
while (!(BITBAND(LPC_RIT->RICTRL, RITINT))) ;
|
while ( !( BITBANG( LPC_RIT->RICTRL, RITINT ) ) ) ;
|
||||||
|
|
||||||
/* Disable RIT */
|
/* Disable RIT */
|
||||||
LPC_RIT->RICTRL = 0;
|
LPC_RIT->RICTRL = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void sleep_ms(unsigned int time) {
|
|
||||||
|
|
||||||
wokefromrit = 0;
|
|
||||||
/* Prepare RIT */
|
|
||||||
LPC_RIT->RICOUNTER = 0;
|
|
||||||
LPC_RIT->RICOMPVAL = (CONFIG_CPU_FREQUENCY / 1000) * time;
|
|
||||||
LPC_RIT->RICTRL = BV(RITEN) | BV(RITINT);
|
|
||||||
NVIC_EnableIRQ(RIT_IRQn);
|
|
||||||
|
|
||||||
/* Wait until RIT signals an interrupt */
|
|
||||||
//uart_putc(';');
|
|
||||||
while(!wokefromrit) {
|
|
||||||
__WFI();
|
|
||||||
}
|
|
||||||
NVIC_DisableIRQ(RIT_IRQn);
|
|
||||||
/* Disable RIT */
|
|
||||||
LPC_RIT->RICTRL = BV(RITINT);
|
|
||||||
}
|
|
||||||
|
|||||||
@@ -13,7 +13,8 @@ extern volatile tick_t ticks;
|
|||||||
*
|
*
|
||||||
* This inline function returns the current system tick count.
|
* This inline function returns the current system tick count.
|
||||||
*/
|
*/
|
||||||
static inline tick_t getticks(void) {
|
static inline tick_t getticks( void )
|
||||||
|
{
|
||||||
return ticks;
|
return ticks;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -10,7 +10,7 @@
|
|||||||
#include "uart.h"
|
#include "uart.h"
|
||||||
#include "led.h"
|
#include "led.h"
|
||||||
|
|
||||||
static uint8_t uart_lookupratio(float f_fr) {
|
/*static uint8_t uart_lookupratio(float f_fr) {
|
||||||
uint16_t errors[72]={0,67,71,77,83,91,100,111,125,
|
uint16_t errors[72]={0,67,71,77,83,91,100,111,125,
|
||||||
133,143,154,167,182,200,214,222,231,
|
133,143,154,167,182,200,214,222,231,
|
||||||
250,267,273,286,300,308,333,357,364,
|
250,267,273,286,300,308,333,357,364,
|
||||||
@@ -45,8 +45,8 @@ static uint8_t uart_lookupratio(float f_fr) {
|
|||||||
}
|
}
|
||||||
return ratios[i_result];
|
return ratios[i_result];
|
||||||
}
|
}
|
||||||
|
*/
|
||||||
static uint32_t baud2divisor(unsigned int baudrate) {
|
/*static uint32_t baud2divisor(unsigned int baudrate) {
|
||||||
uint32_t int_ratio;
|
uint32_t int_ratio;
|
||||||
uint32_t error;
|
uint32_t error;
|
||||||
uint32_t dl=0;
|
uint32_t dl=0;
|
||||||
@@ -73,185 +73,181 @@ static uint32_t baud2divisor(unsigned int baudrate) {
|
|||||||
return ((fract_ratio<<16)&0xff0000) | dl;
|
return ((fract_ratio<<16)&0xff0000) | dl;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
*/
|
||||||
static char txbuf[1 << CONFIG_UART_TX_BUF_SHIFT];
|
//static char txbuf[1 << CONFIG_UART_TX_BUF_SHIFT];
|
||||||
static volatile unsigned int read_idx, write_idx;
|
static volatile unsigned int read_idx, write_idx;
|
||||||
|
|
||||||
void UART_HANDLER(void) {
|
void uart_putc( char c )
|
||||||
int iir = UART_REGS->IIR;
|
{
|
||||||
if (!(iir & 1)) {
|
|
||||||
/* Interrupt is pending */
|
|
||||||
switch (iir & 14) {
|
|
||||||
#if CONFIG_UART_NUM == 1
|
|
||||||
case 0: /* modem status */
|
|
||||||
(void) UART_REGS->MSR; // dummy read to clear
|
|
||||||
break;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
case 2: /* THR empty - send */
|
|
||||||
if (read_idx != write_idx) {
|
|
||||||
int maxchars = 16;
|
|
||||||
while (read_idx != write_idx && --maxchars > 0) {
|
|
||||||
UART_REGS->THR = (unsigned char)txbuf[read_idx];
|
|
||||||
read_idx = (read_idx+1) & (sizeof(txbuf)-1);
|
|
||||||
}
|
|
||||||
if (read_idx == write_idx) {
|
|
||||||
/* buffer empty - turn off THRE interrupt */
|
|
||||||
BITBAND(UART_REGS->IER, 1) = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 12: /* RX timeout */
|
|
||||||
case 4: /* data received - not implemented yet */
|
|
||||||
(void) UART_REGS->RBR; // dummy read to clear
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 6: /* RX error */
|
|
||||||
(void) UART_REGS->LSR; // dummy read to clear
|
|
||||||
|
|
||||||
default: break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void uart_putc(char c) {
|
|
||||||
if ( c == '\n' )
|
if ( c == '\n' )
|
||||||
|
{
|
||||||
uart_putc( '\r' );
|
uart_putc( '\r' );
|
||||||
|
|
||||||
unsigned int tmp = (write_idx+1) & (sizeof(txbuf)-1) ;
|
|
||||||
|
|
||||||
if (read_idx == write_idx && (BITBAND(UART_REGS->LSR, 5))) {
|
|
||||||
/* buffer empty, THR empty -> send immediately */
|
|
||||||
UART_REGS->THR = (unsigned char)c;
|
|
||||||
} else {
|
|
||||||
#ifdef CONFIG_UART_DEADLOCKABLE
|
|
||||||
while (tmp == read_idx) ;
|
|
||||||
#endif
|
|
||||||
BITBAND(UART_REGS->IER, 1) = 0; // turn off UART interrupt
|
|
||||||
txbuf[write_idx] = c;
|
|
||||||
write_idx = tmp;
|
|
||||||
BITBAND(UART_REGS->IER, 1) = 1;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
while ( !( UART_REGS->LSR & ( 0x20 ) ) );
|
||||||
|
|
||||||
|
UART_REGS->THR = c;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Polling version only */
|
/* Polling version only */
|
||||||
unsigned char uart_getc(void) {
|
unsigned char uart_getc( void )
|
||||||
|
{
|
||||||
/* wait for character */
|
/* wait for character */
|
||||||
while (!(BITBAND(UART_REGS->LSR, 0))) ;
|
while ( !( BITBANG( UART_REGS->LSR, 0 ) ) ) ;
|
||||||
|
|
||||||
return UART_REGS->RBR;
|
return UART_REGS->RBR;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Returns true if a char is ready */
|
/* Returns true if a char is ready */
|
||||||
unsigned char uart_gotc(void) {
|
unsigned char uart_gotc( void )
|
||||||
return BITBAND(UART_REGS->LSR, 0);
|
{
|
||||||
|
return BITBANG( UART_REGS->LSR, 0 );
|
||||||
}
|
}
|
||||||
|
|
||||||
void uart_init(void) {
|
void uart_init( void )
|
||||||
|
{
|
||||||
uint32_t div;
|
uint32_t div;
|
||||||
|
|
||||||
/* Turn on power to UART */
|
/* Turn on power to UART */
|
||||||
BITBAND(LPC_SC->PCONP, UART_PCONBIT) = 1;
|
BITBANG( LPC_SC->PCONP, UART_PCONBIT ) = 1;
|
||||||
|
|
||||||
/* UART clock = CPU clock - this block is reduced at compile-time */
|
/* UART clock = CPU clock - this block is reduced at compile-time */
|
||||||
if (CONFIG_UART_PCLKDIV == 1) {
|
if ( CONFIG_UART_PCLKDIV == 1 )
|
||||||
BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT ) = 1;
|
{
|
||||||
BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT+1) = 0;
|
BITBANG( LPC_SC->UART_PCLKREG, UART_PCLKBIT ) = 1;
|
||||||
} else if (CONFIG_UART_PCLKDIV == 2) {
|
BITBANG( LPC_SC->UART_PCLKREG, UART_PCLKBIT + 1 ) = 0;
|
||||||
BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT ) = 0;
|
}
|
||||||
BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT+1) = 1;
|
else if ( CONFIG_UART_PCLKDIV == 2 )
|
||||||
} else if (CONFIG_UART_PCLKDIV == 4) {
|
{
|
||||||
BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT ) = 0;
|
BITBANG( LPC_SC->UART_PCLKREG, UART_PCLKBIT ) = 0;
|
||||||
BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT+1) = 0;
|
BITBANG( LPC_SC->UART_PCLKREG, UART_PCLKBIT + 1 ) = 1;
|
||||||
} else { // Fallback: Divide by 8
|
}
|
||||||
BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT ) = 1;
|
else if ( CONFIG_UART_PCLKDIV == 4 )
|
||||||
BITBAND(LPC_SC->UART_PCLKREG, UART_PCLKBIT+1) = 1;
|
{
|
||||||
|
BITBANG( LPC_SC->UART_PCLKREG, UART_PCLKBIT ) = 0;
|
||||||
|
BITBANG( LPC_SC->UART_PCLKREG, UART_PCLKBIT + 1 ) = 0;
|
||||||
|
}
|
||||||
|
else // Fallback: Divide by 8
|
||||||
|
{
|
||||||
|
BITBANG( LPC_SC->UART_PCLKREG, UART_PCLKBIT ) = 1;
|
||||||
|
BITBANG( LPC_SC->UART_PCLKREG, UART_PCLKBIT + 1 ) = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* set baud rate - no fractional stuff for now */
|
/* set baud rate - no fractional stuff for now */
|
||||||
UART_REGS->LCR = BV( 7 ) | 3; // always 8n1
|
UART_REGS->LCR = BV( 7 ) | 3; // always 8n1
|
||||||
div = baud2divisor(CONFIG_UART_BAUDRATE);
|
div = 0xF80022; //0x850004; // baud2divisor(CONFIG_UART_BAUDRATE);
|
||||||
|
|
||||||
UART_REGS->DLL = div & 0xff;
|
UART_REGS->DLL = div & 0xff;
|
||||||
UART_REGS->DLM = ( div >> 8 ) & 0xff;
|
UART_REGS->DLM = ( div >> 8 ) & 0xff;
|
||||||
BITBAND(UART_REGS->LCR, 7) = 0;
|
BITBANG( UART_REGS->LCR, 7 ) = 0;
|
||||||
|
|
||||||
if (div & 0xff0000) {
|
if ( div & 0xff0000 )
|
||||||
|
{
|
||||||
UART_REGS->FDR = ( div >> 16 ) & 0xff;
|
UART_REGS->FDR = ( div >> 16 ) & 0xff;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* reset and enable FIFO */
|
/* reset and enable FIFO */
|
||||||
UART_REGS->FCR = BV( 0 );
|
UART_REGS->FCR = BV( 0 );
|
||||||
|
|
||||||
/* enable transmit interrupt */
|
|
||||||
BITBAND(UART_REGS->IER, 1) = 1;
|
|
||||||
NVIC_EnableIRQ(UART_IRQ);
|
|
||||||
|
|
||||||
UART_REGS->THR = '?';
|
UART_REGS->THR = '?';
|
||||||
}
|
}
|
||||||
|
|
||||||
/* --- generic code below --- */
|
/* --- generic code below --- */
|
||||||
void uart_puthex(uint8_t num) {
|
void uart_puthex( uint8_t num )
|
||||||
|
{
|
||||||
uint8_t tmp;
|
uint8_t tmp;
|
||||||
tmp = ( num & 0xf0 ) >> 4;
|
tmp = ( num & 0xf0 ) >> 4;
|
||||||
if (tmp < 10)
|
|
||||||
uart_putc('0'+tmp);
|
|
||||||
else
|
|
||||||
uart_putc('a'+tmp-10);
|
|
||||||
|
|
||||||
tmp = num & 0x0f;
|
|
||||||
if ( tmp < 10 )
|
if ( tmp < 10 )
|
||||||
|
{
|
||||||
uart_putc( '0' + tmp );
|
uart_putc( '0' + tmp );
|
||||||
|
}
|
||||||
else
|
else
|
||||||
|
{
|
||||||
uart_putc( 'a' + tmp - 10 );
|
uart_putc( 'a' + tmp - 10 );
|
||||||
}
|
}
|
||||||
|
|
||||||
void uart_trace(void *ptr, uint16_t start, uint16_t len) {
|
tmp = num & 0x0f;
|
||||||
|
|
||||||
|
if ( tmp < 10 )
|
||||||
|
{
|
||||||
|
uart_putc( '0' + tmp );
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
uart_putc( 'a' + tmp - 10 );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void uart_trace( void *ptr, uint16_t start, uint16_t len )
|
||||||
|
{
|
||||||
uint16_t i;
|
uint16_t i;
|
||||||
uint8_t j;
|
uint8_t j;
|
||||||
uint8_t ch;
|
uint8_t ch;
|
||||||
uint8_t *data = ptr;
|
uint8_t *data = ptr;
|
||||||
|
|
||||||
data += start;
|
data += start;
|
||||||
for(i=0;i<len;i+=16) {
|
|
||||||
|
for ( i = 0; i < len; i += 16 )
|
||||||
|
{
|
||||||
|
|
||||||
uart_puthex( start >> 8 );
|
uart_puthex( start >> 8 );
|
||||||
uart_puthex( start & 0xff );
|
uart_puthex( start & 0xff );
|
||||||
uart_putc( '|' );
|
uart_putc( '|' );
|
||||||
uart_putc( ' ' );
|
uart_putc( ' ' );
|
||||||
for(j=0;j<16;j++) {
|
|
||||||
if(i+j<len) {
|
for ( j = 0; j < 16; j++ )
|
||||||
|
{
|
||||||
|
if ( i + j < len )
|
||||||
|
{
|
||||||
ch = *( data + j );
|
ch = *( data + j );
|
||||||
uart_puthex( ch );
|
uart_puthex( ch );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
uart_putc( ' ' );
|
uart_putc( ' ' );
|
||||||
uart_putc( ' ' );
|
uart_putc( ' ' );
|
||||||
}
|
}
|
||||||
|
|
||||||
uart_putc( ' ' );
|
uart_putc( ' ' );
|
||||||
}
|
}
|
||||||
|
|
||||||
uart_putc( '|' );
|
uart_putc( '|' );
|
||||||
for(j=0;j<16;j++) {
|
|
||||||
if(i+j<len) {
|
for ( j = 0; j < 16; j++ )
|
||||||
|
{
|
||||||
|
if ( i + j < len )
|
||||||
|
{
|
||||||
ch = *( data++ );
|
ch = *( data++ );
|
||||||
|
|
||||||
if ( ch < 32 || ch > 0x7e )
|
if ( ch < 32 || ch > 0x7e )
|
||||||
|
{
|
||||||
ch = '.';
|
ch = '.';
|
||||||
|
}
|
||||||
|
|
||||||
uart_putc( ch );
|
uart_putc( ch );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
uart_putc( ' ' );
|
uart_putc( ' ' );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
uart_putc( '|' );
|
uart_putc( '|' );
|
||||||
uart_putcrlf();
|
uart_putcrlf();
|
||||||
start += 16;
|
start += 16;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void uart_flush(void) {
|
void uart_flush( void )
|
||||||
|
{
|
||||||
while ( read_idx != write_idx ) ;
|
while ( read_idx != write_idx ) ;
|
||||||
}
|
}
|
||||||
|
|
||||||
void uart_puts(const char *text) {
|
void uart_puts( const char *text )
|
||||||
while (*text) {
|
{
|
||||||
|
while ( *text )
|
||||||
|
{
|
||||||
uart_putc( *text++ );
|
uart_putc( *text++ );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
86
src/ccsbcs.c
86
src/ccsbcs.c
@@ -31,7 +31,8 @@
|
|||||||
#if _CODE_PAGE == 437
|
#if _CODE_PAGE == 437
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP437(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||||
@@ -53,7 +54,8 @@ const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 720
|
#elif _CODE_PAGE == 720
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP720(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9,
|
||||||
@@ -75,7 +77,8 @@ const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 737
|
#elif _CODE_PAGE == 737
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP737(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398,
|
||||||
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0,
|
||||||
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9,
|
||||||
@@ -97,7 +100,8 @@ const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 775
|
#elif _CODE_PAGE == 775
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP775(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107,
|
||||||
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A,
|
||||||
@@ -119,7 +123,8 @@ const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 850
|
#elif _CODE_PAGE == 850
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP850(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||||
@@ -141,7 +146,8 @@ const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 852
|
#elif _CODE_PAGE == 852
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP852(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7,
|
||||||
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106,
|
||||||
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A,
|
||||||
@@ -163,7 +169,8 @@ const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 855
|
#elif _CODE_PAGE == 855
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP855(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404,
|
||||||
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408,
|
||||||
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C,
|
||||||
@@ -185,7 +192,8 @@ const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 857
|
#elif _CODE_PAGE == 857
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP857(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||||
@@ -207,7 +215,8 @@ const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 858
|
#elif _CODE_PAGE == 858
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP858(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7,
|
||||||
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5,
|
||||||
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9,
|
||||||
@@ -229,7 +238,8 @@ const WCHAR Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 862
|
#elif _CODE_PAGE == 862
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP862(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7,
|
||||||
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF,
|
||||||
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7,
|
||||||
@@ -251,7 +261,8 @@ const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 866
|
#elif _CODE_PAGE == 866
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP866(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417,
|
||||||
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F,
|
||||||
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427,
|
||||||
@@ -273,7 +284,8 @@ const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 874
|
#elif _CODE_PAGE == 874
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP874(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000,
|
||||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -295,7 +307,8 @@ const WCHAR Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1250
|
#elif _CODE_PAGE == 1250
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1250(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -317,7 +330,8 @@ const WCHAR Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1251
|
#elif _CODE_PAGE == 1251
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1251(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F,
|
||||||
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -339,7 +353,8 @@ const WCHAR Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1252
|
#elif _CODE_PAGE == 1252
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1252(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -361,7 +376,8 @@ const WCHAR Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1253
|
#elif _CODE_PAGE == 1253
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1253(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -383,7 +399,8 @@ const WCHAR Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1254
|
#elif _CODE_PAGE == 1254
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1254(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -405,7 +422,8 @@ const WCHAR Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1255
|
#elif _CODE_PAGE == 1255
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1255(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -427,7 +445,8 @@ const WCHAR Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1256
|
#elif _CODE_PAGE == 1256
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1256(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688,
|
||||||
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -449,7 +468,8 @@ const WCHAR Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1257
|
#elif _CODE_PAGE == 1257
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1257(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -471,7 +491,8 @@ const WCHAR Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */
|
|||||||
#elif _CODE_PAGE == 1258
|
#elif _CODE_PAGE == 1258
|
||||||
#define _TBLDEF 1
|
#define _TBLDEF 1
|
||||||
static
|
static
|
||||||
const WCHAR Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */
|
const WCHAR Tbl[] = /* CP1258(0x80-0xFF) to Unicode conversion table */
|
||||||
|
{
|
||||||
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021,
|
||||||
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000,
|
||||||
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014,
|
||||||
@@ -506,17 +527,28 @@ WCHAR ff_convert ( /* Converted character, Returns zero on error */
|
|||||||
WCHAR c;
|
WCHAR c;
|
||||||
|
|
||||||
|
|
||||||
if (src < 0x80) { /* ASCII */
|
if ( src < 0x80 ) /* ASCII */
|
||||||
|
{
|
||||||
c = src;
|
c = src;
|
||||||
|
|
||||||
} else {
|
}
|
||||||
if (dir) { /* OEMCP to Unicode */
|
else
|
||||||
|
{
|
||||||
|
if ( dir ) /* OEMCP to Unicode */
|
||||||
|
{
|
||||||
c = ( src >= 0x100 ) ? 0 : Tbl[src - 0x80];
|
c = ( src >= 0x100 ) ? 0 : Tbl[src - 0x80];
|
||||||
|
|
||||||
} else { /* Unicode to OEMCP */
|
|
||||||
for (c = 0; c < 0x80; c++) {
|
|
||||||
if (src == Tbl[c]) break;
|
|
||||||
}
|
}
|
||||||
|
else /* Unicode to OEMCP */
|
||||||
|
{
|
||||||
|
for ( c = 0; c < 0x80; c++ )
|
||||||
|
{
|
||||||
|
if ( src == Tbl[c] )
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
c = ( c + 0x80 ) & 0xFF;
|
c = ( c + 0x80 ) & 0xFF;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
72
src/cfg.c
Normal file
72
src/cfg.c
Normal file
@@ -0,0 +1,72 @@
|
|||||||
|
#include "cfg.h"
|
||||||
|
#include "config.h"
|
||||||
|
#include "uart.h"
|
||||||
|
#include "fileops.h"
|
||||||
|
|
||||||
|
cfg_t CFG =
|
||||||
|
{
|
||||||
|
.cfg_ver_maj = 1,
|
||||||
|
.cfg_ver_min = 0,
|
||||||
|
.last_game_valid = 0,
|
||||||
|
.vidmode_menu = VIDMODE_AUTO,
|
||||||
|
.vidmode_game = VIDMODE_AUTO,
|
||||||
|
.pair_mode_allowed = 0,
|
||||||
|
.bsx_use_systime = 0,
|
||||||
|
.bsx_time = 0x0619970301180530LL
|
||||||
|
};
|
||||||
|
|
||||||
|
int cfg_save()
|
||||||
|
{
|
||||||
|
int err = 0;
|
||||||
|
file_open( CFG_FILE, FA_CREATE_ALWAYS | FA_WRITE );
|
||||||
|
|
||||||
|
if ( file_writeblock( &CFG, 0, sizeof( CFG ) ) < sizeof( CFG ) )
|
||||||
|
{
|
||||||
|
err = file_res;
|
||||||
|
}
|
||||||
|
|
||||||
|
file_close();
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
int cfg_load()
|
||||||
|
{
|
||||||
|
int err = 0;
|
||||||
|
file_open( CFG_FILE, FA_READ );
|
||||||
|
|
||||||
|
if ( file_readblock( &CFG, 0, sizeof( CFG ) ) < sizeof( CFG ) )
|
||||||
|
{
|
||||||
|
err = file_res;
|
||||||
|
}
|
||||||
|
|
||||||
|
file_close();
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
int cfg_save_last_game( uint8_t *fn )
|
||||||
|
{
|
||||||
|
int err = 0;
|
||||||
|
file_open( LAST_FILE, FA_CREATE_ALWAYS | FA_WRITE );
|
||||||
|
err = f_puts( ( const TCHAR * )fn, &file_handle );
|
||||||
|
file_close();
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
int cfg_get_last_game( uint8_t *fn )
|
||||||
|
{
|
||||||
|
int err = 0;
|
||||||
|
file_open( LAST_FILE, FA_READ );
|
||||||
|
f_gets( ( TCHAR * )fn, 255, &file_handle );
|
||||||
|
file_close();
|
||||||
|
return err;
|
||||||
|
}
|
||||||
|
|
||||||
|
void cfg_set_last_game_valid( uint8_t valid )
|
||||||
|
{
|
||||||
|
CFG.last_game_valid = valid;
|
||||||
|
}
|
||||||
|
|
||||||
|
uint8_t cfg_is_last_game_valid()
|
||||||
|
{
|
||||||
|
return CFG.last_game_valid;
|
||||||
|
}
|
||||||
41
src/cfg.h
Normal file
41
src/cfg.h
Normal file
@@ -0,0 +1,41 @@
|
|||||||
|
#ifndef _CFG_H
|
||||||
|
#define _CFG_H
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#define CFG_FILE ((const uint8_t*)"/sd2snes/sd2snes.cfg")
|
||||||
|
#define LAST_FILE ((const uint8_t*)"/sd2snes/lastgame.cfg")
|
||||||
|
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
VIDMODE_AUTO = 0,
|
||||||
|
VIDMODE_60,
|
||||||
|
VIDMODE_50
|
||||||
|
} cfg_vidmode_t;
|
||||||
|
|
||||||
|
typedef struct _cfg_block
|
||||||
|
{
|
||||||
|
uint8_t cfg_ver_maj;
|
||||||
|
uint8_t cfg_ver_min;
|
||||||
|
uint8_t last_game_valid;
|
||||||
|
uint8_t vidmode_menu;
|
||||||
|
uint8_t vidmode_game;
|
||||||
|
uint8_t pair_mode_allowed;
|
||||||
|
uint8_t bsx_use_systime;
|
||||||
|
uint64_t bsx_time;
|
||||||
|
} cfg_t;
|
||||||
|
|
||||||
|
int cfg_save( void );
|
||||||
|
int cfg_load( void );
|
||||||
|
|
||||||
|
int cfg_save_last_game( uint8_t *fn );
|
||||||
|
int cfg_get_last_game( uint8_t *fn );
|
||||||
|
|
||||||
|
cfg_vidmode_t cfg_get_vidmode_menu( void );
|
||||||
|
cfg_vidmode_t cfg_get_vidmode_game( void );
|
||||||
|
|
||||||
|
void cfg_set_last_game_valid( uint8_t );
|
||||||
|
uint8_t cfg_is_last_game_valid( void );
|
||||||
|
uint8_t cfg_is_pair_mode_allowed( void );
|
||||||
|
|
||||||
|
#endif
|
||||||
2429
src/cfgware.h
2429
src/cfgware.h
File diff suppressed because it is too large
Load Diff
77
src/cic.c
77
src/cic.c
@@ -5,51 +5,82 @@
|
|||||||
#include "cic.h"
|
#include "cic.h"
|
||||||
|
|
||||||
char *cicstatenames[4] = { "CIC_OK", "CIC_FAIL", "CIC_PAIR", "CIC_SCIC" };
|
char *cicstatenames[4] = { "CIC_OK", "CIC_FAIL", "CIC_PAIR", "CIC_SCIC" };
|
||||||
|
char *cicstatefriendly[4] = {"Original or no CIC", "Original CIC(failed)", "SuperCIC enhanced", "SuperCIC detected, not used"};
|
||||||
|
|
||||||
void print_cic_state() {
|
void print_cic_state()
|
||||||
|
{
|
||||||
printf( "CIC state: %s\n", get_cic_statename( get_cic_state() ) );
|
printf( "CIC state: %s\n", get_cic_statename( get_cic_state() ) );
|
||||||
}
|
}
|
||||||
|
|
||||||
inline char *get_cic_statename(enum cicstates state) {
|
inline char *get_cic_statefriendlyname( enum cicstates state )
|
||||||
|
{
|
||||||
|
return cicstatefriendly[state];
|
||||||
|
}
|
||||||
|
|
||||||
|
inline char *get_cic_statename( enum cicstates state )
|
||||||
|
{
|
||||||
return cicstatenames[state];
|
return cicstatenames[state];
|
||||||
}
|
}
|
||||||
|
|
||||||
enum cicstates get_cic_state() {
|
enum cicstates get_cic_state()
|
||||||
|
{
|
||||||
uint32_t count;
|
uint32_t count;
|
||||||
uint32_t togglecount = 0;
|
uint32_t togglecount = 0;
|
||||||
uint8_t state, state_old;
|
uint8_t state, state_old;
|
||||||
|
|
||||||
state_old = BITBAND( SNES_CIC_STATUS_REG->FIOPIN, SNES_CIC_STATUS_BIT );
|
state_old = BITBAND( SNES_CIC_STATUS_REG->FIOPIN, SNES_CIC_STATUS_BIT );
|
||||||
|
|
||||||
/* this loop samples at ~10MHz */
|
/* this loop samples at ~10MHz */
|
||||||
for(count=0; count<CIC_SAMPLECOUNT; count++) {
|
for ( count = 0; count < CIC_SAMPLECOUNT; count++ )
|
||||||
|
{
|
||||||
state = BITBAND( SNES_CIC_STATUS_REG->FIOPIN, SNES_CIC_STATUS_BIT );
|
state = BITBAND( SNES_CIC_STATUS_REG->FIOPIN, SNES_CIC_STATUS_BIT );
|
||||||
if(state != state_old) {
|
|
||||||
|
if ( state != state_old )
|
||||||
|
{
|
||||||
togglecount++;
|
togglecount++;
|
||||||
}
|
}
|
||||||
|
|
||||||
state_old = state;
|
state_old = state;
|
||||||
}
|
}
|
||||||
|
|
||||||
printf( "%ld\n", togglecount );
|
printf( "%ld\n", togglecount );
|
||||||
|
|
||||||
/* CIC_TOGGLE_THRESH_PAIR > CIC_TOGGLE_THRESH_SCIC */
|
/* CIC_TOGGLE_THRESH_PAIR > CIC_TOGGLE_THRESH_SCIC */
|
||||||
if(togglecount > CIC_TOGGLE_THRESH_PAIR) {
|
if ( togglecount > CIC_TOGGLE_THRESH_PAIR )
|
||||||
|
{
|
||||||
return CIC_PAIR;
|
return CIC_PAIR;
|
||||||
} else if(togglecount > CIC_TOGGLE_THRESH_SCIC) {
|
}
|
||||||
|
else if ( togglecount > CIC_TOGGLE_THRESH_SCIC )
|
||||||
|
{
|
||||||
return CIC_SCIC;
|
return CIC_SCIC;
|
||||||
} else if(state) {
|
}
|
||||||
|
else if ( state )
|
||||||
|
{
|
||||||
return CIC_OK;
|
return CIC_OK;
|
||||||
} else return CIC_FAIL;
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return CIC_FAIL;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void cic_init(int allow_pairmode) {
|
void cic_init( int allow_pairmode )
|
||||||
|
{
|
||||||
BITBAND( SNES_CIC_PAIR_REG->FIODIR, SNES_CIC_PAIR_BIT ) = 1;
|
BITBAND( SNES_CIC_PAIR_REG->FIODIR, SNES_CIC_PAIR_BIT ) = 1;
|
||||||
if(allow_pairmode) {
|
|
||||||
|
if ( allow_pairmode )
|
||||||
|
{
|
||||||
BITBAND( SNES_CIC_PAIR_REG->FIOCLR, SNES_CIC_PAIR_BIT ) = 1;
|
BITBAND( SNES_CIC_PAIR_REG->FIOCLR, SNES_CIC_PAIR_BIT ) = 1;
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
BITBAND( SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT ) = 1;
|
BITBAND( SNES_CIC_PAIR_REG->FIOSET, SNES_CIC_PAIR_BIT ) = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* prepare GPIOs for pair mode + set initial modes */
|
/* prepare GPIOs for pair mode + set initial modes */
|
||||||
void cic_pair(int init_vmode, int init_d4) {
|
void cic_pair( int init_vmode, int init_d4 )
|
||||||
|
{
|
||||||
cic_videomode( init_vmode );
|
cic_videomode( init_vmode );
|
||||||
cic_d4( init_d4 );
|
cic_d4( init_d4 );
|
||||||
|
|
||||||
@@ -57,18 +88,26 @@ void cic_pair(int init_vmode, int init_d4) {
|
|||||||
BITBAND( SNES_CIC_D1_REG->FIODIR, SNES_CIC_D1_BIT ) = 1;
|
BITBAND( SNES_CIC_D1_REG->FIODIR, SNES_CIC_D1_BIT ) = 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
void cic_videomode(int value) {
|
void cic_videomode( int value )
|
||||||
if(value) {
|
{
|
||||||
|
if ( value )
|
||||||
|
{
|
||||||
BITBAND( SNES_CIC_D0_REG->FIOSET, SNES_CIC_D0_BIT ) = 1;
|
BITBAND( SNES_CIC_D0_REG->FIOSET, SNES_CIC_D0_BIT ) = 1;
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
BITBAND( SNES_CIC_D0_REG->FIOCLR, SNES_CIC_D0_BIT ) = 1;
|
BITBAND( SNES_CIC_D0_REG->FIOCLR, SNES_CIC_D0_BIT ) = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void cic_d4(int value) {
|
void cic_d4( int value )
|
||||||
if(value) {
|
{
|
||||||
|
if ( value )
|
||||||
|
{
|
||||||
BITBAND( SNES_CIC_D1_REG->FIOSET, SNES_CIC_D1_BIT ) = 1;
|
BITBAND( SNES_CIC_D1_REG->FIOSET, SNES_CIC_D1_BIT ) = 1;
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
BITBAND( SNES_CIC_D1_REG->FIOCLR, SNES_CIC_D1_BIT ) = 1;
|
BITBAND( SNES_CIC_D1_REG->FIOCLR, SNES_CIC_D1_BIT ) = 1;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -13,6 +13,7 @@ enum cic_region { CIC_NTSC = 0, CIC_PAL };
|
|||||||
|
|
||||||
void print_cic_state( void );
|
void print_cic_state( void );
|
||||||
char *get_cic_statename( enum cicstates state );
|
char *get_cic_statename( enum cicstates state );
|
||||||
|
char *get_cic_statefriendlyname( enum cicstates state );
|
||||||
enum cicstates get_cic_state( void );
|
enum cicstates get_cic_state( void );
|
||||||
void cic_init( int allow_pairmode );
|
void cic_init( int allow_pairmode );
|
||||||
|
|
||||||
|
|||||||
387
src/cli.c
387
src/cli.c
@@ -42,6 +42,7 @@
|
|||||||
#include "fileops.h"
|
#include "fileops.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
#include "snes.h"
|
#include "snes.h"
|
||||||
|
#include "tests.h"
|
||||||
#include "fpga.h"
|
#include "fpga.h"
|
||||||
#include "fpga_spi.h"
|
#include "fpga_spi.h"
|
||||||
#include "cic.h"
|
#include "cic.h"
|
||||||
@@ -58,35 +59,42 @@ static char *curchar;
|
|||||||
|
|
||||||
/* Word lists */
|
/* Word lists */
|
||||||
static char command_words[] =
|
static char command_words[] =
|
||||||
"cd\0reset\0sreset\0dir\0ls\0test\0resume\0loadrom\0loadraw\0saveraw\0put\0d4\0vmode\0mapper\0settime\0time\0setfeature\0hexdump\0w8\0w16\0";
|
"cd\0reset\0sreset\0dir\0ls\0test\0exit\0loadrom\0loadraw\0saveraw\0put\0rm\0mkdir\0d4\0vmode\0mapper\0settime\0time\0setfeature\0hexdump\0w8\0w16\0memset\0memtest\0";
|
||||||
enum { CMD_CD = 0, CMD_RESET, CMD_SRESET, CMD_DIR, CMD_LS, CMD_TEST, CMD_RESUME, CMD_LOADROM, CMD_LOADRAW, CMD_SAVERAW, CMD_PUT, CMD_D4, CMD_VMODE, CMD_MAPPER, CMD_SETTIME, CMD_TIME, CMD_SETFEATURE, CMD_HEXDUMP, CMD_W8, CMD_W16 };
|
enum { CMD_CD = 0, CMD_RESET, CMD_SRESET, CMD_DIR, CMD_LS, CMD_TEST, CMD_EXIT, CMD_LOADROM, CMD_LOADRAW, CMD_SAVERAW, CMD_PUT, CMD_RM, CMD_MKDIR, CMD_D4, CMD_VMODE, CMD_MAPPER, CMD_SETTIME, CMD_TIME, CMD_SETFEATURE, CMD_HEXDUMP, CMD_W8, CMD_W16, CMD_MEMSET, CMD_MEMTEST };
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
/* Parse functions */
|
/* Parse functions */
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
/* Skip spaces at curchar */
|
/* Skip spaces at curchar */
|
||||||
static uint8_t skip_spaces(void) {
|
static uint8_t skip_spaces( void )
|
||||||
|
{
|
||||||
uint8_t res = ( *curchar == ' ' || *curchar == 0 );
|
uint8_t res = ( *curchar == ' ' || *curchar == 0 );
|
||||||
|
|
||||||
while ( *curchar == ' ' )
|
while ( *curchar == ' ' )
|
||||||
|
{
|
||||||
curchar++;
|
curchar++;
|
||||||
|
}
|
||||||
|
|
||||||
return res;
|
return res;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Parse the string in curchar for an integer with bounds [lower,upper] */
|
/* Parse the string in curchar for an integer with bounds [lower,upper] */
|
||||||
static int32_t parse_unsigned(uint32_t lower, uint32_t upper, uint8_t base) {
|
static int32_t parse_unsigned( uint32_t lower, uint32_t upper, uint8_t base )
|
||||||
|
{
|
||||||
char *end;
|
char *end;
|
||||||
uint32_t result;
|
uint32_t result;
|
||||||
|
|
||||||
if (strlen(curchar) == 1 && *curchar == '?') {
|
if ( strlen( curchar ) == 1 && *curchar == '?' )
|
||||||
|
{
|
||||||
printf( "Number between %ld[0x%lx] and %ld[0x%lx] expected\n", lower, lower, upper, upper );
|
printf( "Number between %ld[0x%lx] and %ld[0x%lx] expected\n", lower, lower, upper, upper );
|
||||||
return -2;
|
return -2;
|
||||||
}
|
}
|
||||||
|
|
||||||
result = strtoul( curchar, &end, base );
|
result = strtoul( curchar, &end, base );
|
||||||
if ((*end != ' ' && *end != 0) || errno != 0) {
|
|
||||||
|
if ( ( *end != ' ' && *end != 0 ) || errno != 0 )
|
||||||
|
{
|
||||||
printf( "Invalid numeric argument\n" );
|
printf( "Invalid numeric argument\n" );
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
@@ -94,7 +102,8 @@ static int32_t parse_unsigned(uint32_t lower, uint32_t upper, uint8_t base) {
|
|||||||
curchar = end;
|
curchar = end;
|
||||||
skip_spaces();
|
skip_spaces();
|
||||||
|
|
||||||
if (result < lower || result > upper) {
|
if ( result < lower || result > upper )
|
||||||
|
{
|
||||||
printf( "Numeric argument out of range (%ld..%ld)\n", lower, upper );
|
printf( "Numeric argument out of range (%ld..%ld)\n", lower, upper );
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
@@ -102,112 +111,157 @@ static int32_t parse_unsigned(uint32_t lower, uint32_t upper, uint8_t base) {
|
|||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
/* Parse the string starting with curchar for a word in wordlist */
|
/* Parse the string starting with curchar for a word in wordlist */
|
||||||
static int8_t parse_wordlist(char *wordlist) {
|
static int8_t parse_wordlist( char *wordlist )
|
||||||
|
{
|
||||||
uint8_t i, matched;
|
uint8_t i, matched;
|
||||||
char *cur, *ptr;
|
unsigned char *cur, *ptr;
|
||||||
char c;
|
unsigned char c;
|
||||||
|
|
||||||
i = 0;
|
i = 0;
|
||||||
ptr = wordlist;
|
ptr = ( unsigned char * )wordlist;
|
||||||
|
|
||||||
// Command list on "?"
|
// Command list on "?"
|
||||||
if (strlen(curchar) == 1 && *curchar == '?') {
|
if ( strlen( curchar ) == 1 && *curchar == '?' )
|
||||||
|
{
|
||||||
printf( "Commands available: \n " );
|
printf( "Commands available: \n " );
|
||||||
while (1) {
|
|
||||||
|
while ( 1 )
|
||||||
|
{
|
||||||
c = *ptr++;
|
c = *ptr++;
|
||||||
if (c == 0) {
|
|
||||||
if (*ptr == 0) {
|
if ( c == 0 )
|
||||||
|
{
|
||||||
|
if ( *ptr == 0 )
|
||||||
|
{
|
||||||
printf( "\n" );
|
printf( "\n" );
|
||||||
return -2;
|
return -2;
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
printf( "\n " );
|
printf( "\n " );
|
||||||
}
|
}
|
||||||
} else
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
uart_putc( c );
|
uart_putc( c );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
while (1) {
|
while ( 1 )
|
||||||
cur = curchar;
|
{
|
||||||
|
cur = ( unsigned char * )curchar;
|
||||||
matched = 1;
|
matched = 1;
|
||||||
c = *ptr;
|
c = *ptr;
|
||||||
do {
|
|
||||||
|
do
|
||||||
|
{
|
||||||
// If current word list character is \0: No match found
|
// If current word list character is \0: No match found
|
||||||
if (c == 0) {
|
if ( c == 0 )
|
||||||
printf("Unknown word: %s\n",curchar);
|
{
|
||||||
|
printf( "Unknown word: %s\n(use ? for help)", curchar );
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (tolower(c) != tolower(*cur)) {
|
if ( tolower( ( int )c ) != tolower( ( int )*cur ) )
|
||||||
|
{
|
||||||
// Check for end-of-word
|
// Check for end-of-word
|
||||||
if (cur != curchar && (*cur == ' ' || *cur == 0)) {
|
if ( cur != ( unsigned char * )curchar && ( *cur == ' ' || *cur == 0 ) )
|
||||||
|
{
|
||||||
// Partial match found, return that
|
// Partial match found, return that
|
||||||
break;
|
break;
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
matched = 0;
|
matched = 0;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
ptr++;
|
ptr++;
|
||||||
cur++;
|
cur++;
|
||||||
c = *ptr;
|
c = *ptr;
|
||||||
} while (c != 0);
|
}
|
||||||
|
while ( c != 0 );
|
||||||
|
|
||||||
if (matched) {
|
if ( matched )
|
||||||
|
{
|
||||||
char *tmp = curchar;
|
char *tmp = curchar;
|
||||||
|
|
||||||
curchar = cur;
|
curchar = ( char * )cur;
|
||||||
|
|
||||||
// Return match only if whitespace or end-of-string follows
|
// Return match only if whitespace or end-of-string follows
|
||||||
// (avoids mismatching partial words)
|
// (avoids mismatching partial words)
|
||||||
if (skip_spaces()) {
|
if ( skip_spaces() )
|
||||||
|
{
|
||||||
return i;
|
return i;
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
printf( "Unknown word: %s\n(use ? for help)\n", tmp );
|
printf( "Unknown word: %s\n(use ? for help)\n", tmp );
|
||||||
return -1;
|
return -1;
|
||||||
}
|
}
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
// Try next word in list
|
// Try next word in list
|
||||||
i++;
|
i++;
|
||||||
|
|
||||||
while ( *ptr++ != 0 ) ;
|
while ( *ptr++ != 0 ) ;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Read a line from serial, uses cmdbuffer as storage */
|
/* Read a line from serial, uses cmdbuffer as storage */
|
||||||
static char *getline(char *prompt) {
|
static char *getline( char *prompt )
|
||||||
|
{
|
||||||
int i = 0;
|
int i = 0;
|
||||||
char c;
|
char c;
|
||||||
|
|
||||||
printf( "\n%s", prompt );
|
printf( "\n%s", prompt );
|
||||||
memset( cmdbuffer, 0, sizeof( cmdbuffer ) );
|
memset( cmdbuffer, 0, sizeof( cmdbuffer ) );
|
||||||
|
|
||||||
while (1) {
|
while ( 1 )
|
||||||
|
{
|
||||||
c = uart_getc();
|
c = uart_getc();
|
||||||
if (c == 13)
|
|
||||||
break;
|
|
||||||
|
|
||||||
if (c == 27 || c == 3) {
|
if ( c == 13 )
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if ( c == 27 || c == 3 )
|
||||||
|
{
|
||||||
printf( "\\\n%s", prompt );
|
printf( "\\\n%s", prompt );
|
||||||
i = 0;
|
i = 0;
|
||||||
memset( cmdbuffer, 0, sizeof( cmdbuffer ) );
|
memset( cmdbuffer, 0, sizeof( cmdbuffer ) );
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (c == 127 || c == 8) {
|
if ( c == 127 || c == 8 )
|
||||||
if (i > 0) {
|
{
|
||||||
|
if ( i > 0 )
|
||||||
|
{
|
||||||
i--;
|
i--;
|
||||||
uart_putc( 8 ); // backspace
|
uart_putc( 8 ); // backspace
|
||||||
uart_putc( ' ' ); // erase character
|
uart_putc( ' ' ); // erase character
|
||||||
uart_putc( 8 ); // backspace
|
uart_putc( 8 ); // backspace
|
||||||
} else
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
continue;
|
continue;
|
||||||
} else {
|
}
|
||||||
if (i < sizeof(cmdbuffer)-1) {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if ( i < sizeof( cmdbuffer ) - 1 )
|
||||||
|
{
|
||||||
cmdbuffer[i++] = c;
|
cmdbuffer[i++] = c;
|
||||||
uart_putc( c );
|
uart_putc( c );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
cmdbuffer[i] = 0;
|
cmdbuffer[i] = 0;
|
||||||
return cmdbuffer;
|
return cmdbuffer;
|
||||||
}
|
}
|
||||||
@@ -218,7 +272,8 @@ static char *getline(char *prompt) {
|
|||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
/* Reset */
|
/* Reset */
|
||||||
static void cmd_reset(void) {
|
static void cmd_reset( void )
|
||||||
|
{
|
||||||
/* force watchdog reset */
|
/* force watchdog reset */
|
||||||
LPC_WDT->WDTC = 256; // minimal timeout
|
LPC_WDT->WDTC = 256; // minimal timeout
|
||||||
LPC_WDT->WDCLKSEL = BV( 31 ); // internal RC, lock register
|
LPC_WDT->WDCLKSEL = BV( 31 ); // internal RC, lock register
|
||||||
@@ -228,7 +283,8 @@ static void cmd_reset(void) {
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Show the contents of the current directory */
|
/* Show the contents of the current directory */
|
||||||
static void cmd_show_directory(void) {
|
static void cmd_show_directory( void )
|
||||||
|
{
|
||||||
FRESULT res;
|
FRESULT res;
|
||||||
DIR dh;
|
DIR dh;
|
||||||
FILINFO finfo;
|
FILINFO finfo;
|
||||||
@@ -237,7 +293,9 @@ static void cmd_show_directory(void) {
|
|||||||
f_getcwd( ( TCHAR * )file_lfn, 255 );
|
f_getcwd( ( TCHAR * )file_lfn, 255 );
|
||||||
|
|
||||||
res = f_opendir( &dh, ( TCHAR * )file_lfn );
|
res = f_opendir( &dh, ( TCHAR * )file_lfn );
|
||||||
if (res != FR_OK) {
|
|
||||||
|
if ( res != FR_OK )
|
||||||
|
{
|
||||||
printf( "f_opendir failed, result %d\n", res );
|
printf( "f_opendir failed, result %d\n", res );
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
@@ -245,127 +303,203 @@ static void cmd_show_directory(void) {
|
|||||||
finfo.lfname = ( TCHAR * )file_lfn;
|
finfo.lfname = ( TCHAR * )file_lfn;
|
||||||
finfo.lfsize = 255;
|
finfo.lfsize = 255;
|
||||||
|
|
||||||
do {
|
do
|
||||||
|
{
|
||||||
/* Read the next entry */
|
/* Read the next entry */
|
||||||
res = f_readdir( &dh, &finfo );
|
res = f_readdir( &dh, &finfo );
|
||||||
if (res != FR_OK) {
|
|
||||||
|
if ( res != FR_OK )
|
||||||
|
{
|
||||||
printf( "f_readdir failed, result %d\n", res );
|
printf( "f_readdir failed, result %d\n", res );
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Abort if none was found */
|
/* Abort if none was found */
|
||||||
if ( !finfo.fname[0] )
|
if ( !finfo.fname[0] )
|
||||||
|
{
|
||||||
break;
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
/* Skip volume labels */
|
/* Skip volume labels */
|
||||||
if ( finfo.fattrib & AM_VOL )
|
if ( finfo.fattrib & AM_VOL )
|
||||||
|
{
|
||||||
continue;
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
/* Select between LFN and 8.3 name */
|
/* Select between LFN and 8.3 name */
|
||||||
if ( finfo.lfname[0] )
|
if ( finfo.lfname[0] )
|
||||||
|
{
|
||||||
name = ( uint8_t * )finfo.lfname;
|
name = ( uint8_t * )finfo.lfname;
|
||||||
else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
name = ( uint8_t * )finfo.fname;
|
name = ( uint8_t * )finfo.fname;
|
||||||
strlwr( ( char * )name );
|
strlwr( ( char * )name );
|
||||||
}
|
}
|
||||||
|
|
||||||
printf("%s",name);
|
printf( "%s [%s] (%ld)", finfo.lfname, finfo.fname, finfo.fsize );
|
||||||
|
|
||||||
/* Directory indicator (Unix-style) */
|
/* Directory indicator (Unix-style) */
|
||||||
if ( finfo.fattrib & AM_DIR )
|
if ( finfo.fattrib & AM_DIR )
|
||||||
|
{
|
||||||
uart_putc( '/' );
|
uart_putc( '/' );
|
||||||
|
}
|
||||||
|
|
||||||
printf( "\n" );
|
printf( "\n" );
|
||||||
} while (finfo.fname[0]);
|
}
|
||||||
|
while ( finfo.fname[0] );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void cmd_loadrom(void) {
|
static void cmd_loadrom( void )
|
||||||
|
{
|
||||||
uint32_t address = 0;
|
uint32_t address = 0;
|
||||||
uint8_t flags = LOADROM_WITH_SRAM | LOADROM_WITH_RESET;
|
uint8_t flags = LOADROM_WITH_SRAM | LOADROM_WITH_RESET;
|
||||||
load_rom( ( uint8_t * )curchar, address, flags );
|
load_rom( ( uint8_t * )curchar, address, flags );
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cmd_loadraw(void) {
|
static void cmd_loadraw( void )
|
||||||
|
{
|
||||||
uint32_t address = parse_unsigned( 0, 16777216, 16 );
|
uint32_t address = parse_unsigned( 0, 16777216, 16 );
|
||||||
load_sram( ( uint8_t * )curchar, address );
|
load_sram( ( uint8_t * )curchar, address );
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cmd_saveraw(void) {
|
static void cmd_saveraw( void )
|
||||||
|
{
|
||||||
uint32_t address = parse_unsigned( 0, 16777216, 16 );
|
uint32_t address = parse_unsigned( 0, 16777216, 16 );
|
||||||
uint32_t length = parse_unsigned( 0, 16777216, 16 );
|
uint32_t length = parse_unsigned( 0, 16777216, 16 );
|
||||||
|
|
||||||
|
if ( address != -1 && length != -1 )
|
||||||
|
{
|
||||||
save_sram( ( uint8_t * )curchar, length, address );
|
save_sram( ( uint8_t * )curchar, length, address );
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static void cmd_d4(void) {
|
static void cmd_d4( void )
|
||||||
|
{
|
||||||
int32_t hz;
|
int32_t hz;
|
||||||
|
|
||||||
if(get_cic_state() != CIC_PAIR) {
|
if ( get_cic_state() != CIC_PAIR )
|
||||||
|
{
|
||||||
printf( "not in pair mode\n" );
|
printf( "not in pair mode\n" );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
hz = parse_unsigned( 50, 60, 10 );
|
hz = parse_unsigned( 50, 60, 10 );
|
||||||
if(hz==50) {
|
|
||||||
|
if ( hz == 50 )
|
||||||
|
{
|
||||||
cic_d4( CIC_PAL );
|
cic_d4( CIC_PAL );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
cic_d4( CIC_NTSC );
|
cic_d4( CIC_NTSC );
|
||||||
}
|
}
|
||||||
|
|
||||||
printf( "ok\n" );
|
printf( "ok\n" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void cmd_vmode(void) {
|
static void cmd_vmode( void )
|
||||||
|
{
|
||||||
int32_t hz;
|
int32_t hz;
|
||||||
if(get_cic_state() != CIC_PAIR) {
|
|
||||||
|
if ( get_cic_state() != CIC_PAIR )
|
||||||
|
{
|
||||||
printf( "not in pair mode\n" );
|
printf( "not in pair mode\n" );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
hz = parse_unsigned( 50, 60, 10 );
|
hz = parse_unsigned( 50, 60, 10 );
|
||||||
if(hz==50) {
|
|
||||||
|
if ( hz == 50 )
|
||||||
|
{
|
||||||
cic_videomode( CIC_PAL );
|
cic_videomode( CIC_PAL );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
cic_videomode( CIC_NTSC );
|
cic_videomode( CIC_NTSC );
|
||||||
}
|
}
|
||||||
|
|
||||||
printf( "ok\n" );
|
printf( "ok\n" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void cmd_put(void) {
|
void cmd_put( void )
|
||||||
if(*curchar != 0) {
|
{
|
||||||
|
if ( *curchar != 0 )
|
||||||
|
{
|
||||||
file_open( ( uint8_t * )curchar, FA_CREATE_ALWAYS | FA_WRITE );
|
file_open( ( uint8_t * )curchar, FA_CREATE_ALWAYS | FA_WRITE );
|
||||||
if(file_res) {
|
|
||||||
|
if ( file_res )
|
||||||
|
{
|
||||||
printf( "FAIL: error opening file %s\n", curchar );
|
printf( "FAIL: error opening file %s\n", curchar );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
printf( "OK, start xmodem transfer now.\n" );
|
printf( "OK, start xmodem transfer now.\n" );
|
||||||
xmodem_rxfile( &file_handle );
|
xmodem_rxfile( &file_handle );
|
||||||
}
|
}
|
||||||
|
|
||||||
file_close();
|
file_close();
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
printf( "Usage: put <filename>\n" );
|
printf( "Usage: put <filename>\n" );
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void cmd_mapper(void) {
|
void cmd_rm( void )
|
||||||
|
{
|
||||||
|
FRESULT res = f_unlink( curchar );
|
||||||
|
|
||||||
|
if ( res )
|
||||||
|
{
|
||||||
|
printf( "Error %d removing %s\n", res, curchar );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void cmd_mkdir( void )
|
||||||
|
{
|
||||||
|
FRESULT res = f_mkdir( curchar );
|
||||||
|
|
||||||
|
if ( res )
|
||||||
|
{
|
||||||
|
printf( "Error %d creating directory %s\n", res, curchar );
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void cmd_mapper( void )
|
||||||
|
{
|
||||||
int32_t mapper;
|
int32_t mapper;
|
||||||
mapper = parse_unsigned( 0, 7, 10 );
|
mapper = parse_unsigned( 0, 7, 10 );
|
||||||
set_mapper( ( uint8_t )mapper & 0x7 );
|
set_mapper( ( uint8_t )mapper & 0x7 );
|
||||||
printf( "mapper set to %ld\n", mapper );
|
printf( "mapper set to %ld\n", mapper );
|
||||||
}
|
}
|
||||||
|
|
||||||
void cmd_sreset(void) {
|
void cmd_sreset( void )
|
||||||
if(*curchar != 0) {
|
{
|
||||||
|
if ( *curchar != 0 )
|
||||||
|
{
|
||||||
int32_t resetstate;
|
int32_t resetstate;
|
||||||
resetstate = parse_unsigned( 0, 1, 10 );
|
resetstate = parse_unsigned( 0, 1, 10 );
|
||||||
snes_reset( resetstate );
|
snes_reset( resetstate );
|
||||||
} else {
|
}
|
||||||
snes_reset(1);
|
else
|
||||||
delay_ms(20);
|
{
|
||||||
snes_reset(0);
|
snes_reset_pulse();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
void cmd_settime(void) {
|
void cmd_settime( void )
|
||||||
|
{
|
||||||
struct tm time;
|
struct tm time;
|
||||||
if(strlen(curchar) != 4+2+2 + 2+2+2) {
|
|
||||||
|
if ( strlen( curchar ) != 4 + 2 + 2 + 2 + 2 + 2 )
|
||||||
|
{
|
||||||
printf( "invalid time format (need YYYYMMDDhhmmss)\n" );
|
printf( "invalid time format (need YYYYMMDDhhmmss)\n" );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
time.tm_sec = atoi( curchar + 4 + 2 + 2 + 2 + 2 );
|
time.tm_sec = atoi( curchar + 4 + 2 + 2 + 2 + 2 );
|
||||||
curchar[4 + 2 + 2 + 2 + 2] = 0;
|
curchar[4 + 2 + 2 + 2 + 2] = 0;
|
||||||
time.tm_min = atoi( curchar + 4 + 2 + 2 + 2 );
|
time.tm_min = atoi( curchar + 4 + 2 + 2 + 2 );
|
||||||
@@ -381,105 +515,148 @@ void cmd_settime(void) {
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void cmd_time(void) {
|
void cmd_time( void )
|
||||||
|
{
|
||||||
struct tm time;
|
struct tm time;
|
||||||
read_rtc( &time );
|
read_rtc( &time );
|
||||||
printf( "%04d-%02d-%02d %02d:%02d:%02d\n", time.tm_year, time.tm_mon,
|
printf( "%04d-%02d-%02d %02d:%02d:%02d\n", time.tm_year, time.tm_mon,
|
||||||
time.tm_mday, time.tm_hour, time.tm_min, time.tm_sec );
|
time.tm_mday, time.tm_hour, time.tm_min, time.tm_sec );
|
||||||
}
|
}
|
||||||
|
|
||||||
void cmd_setfeature(void) {
|
void cmd_setfeature( void )
|
||||||
|
{
|
||||||
uint8_t feat = parse_unsigned( 0, 255, 16 );
|
uint8_t feat = parse_unsigned( 0, 255, 16 );
|
||||||
fpga_set_features( feat );
|
fpga_set_features( feat );
|
||||||
}
|
}
|
||||||
|
|
||||||
void cmd_hexdump(void) {
|
void cmd_hexdump( void )
|
||||||
|
{
|
||||||
uint32_t offset = parse_unsigned( 0, 16777215, 16 );
|
uint32_t offset = parse_unsigned( 0, 16777215, 16 );
|
||||||
uint32_t len = parse_unsigned( 0, 16777216, 16 );
|
uint32_t len = parse_unsigned( 0, 16777216, 16 );
|
||||||
sram_hexdump( offset, len );
|
sram_hexdump( offset, len );
|
||||||
}
|
}
|
||||||
|
|
||||||
void cmd_w8(void) {
|
void cmd_w8( void )
|
||||||
|
{
|
||||||
uint32_t offset = parse_unsigned( 0, 16777215, 16 );
|
uint32_t offset = parse_unsigned( 0, 16777215, 16 );
|
||||||
uint8_t val = parse_unsigned( 0, 255, 16 );
|
uint8_t val = parse_unsigned( 0, 255, 16 );
|
||||||
sram_writebyte( val, offset );
|
sram_writebyte( val, offset );
|
||||||
}
|
}
|
||||||
|
|
||||||
void cmd_w16(void) {
|
void cmd_w16( void )
|
||||||
|
{
|
||||||
uint32_t offset = parse_unsigned( 0, 16777215, 16 );
|
uint32_t offset = parse_unsigned( 0, 16777215, 16 );
|
||||||
uint16_t val = parse_unsigned( 0, 65535, 16 );
|
uint16_t val = parse_unsigned( 0, 65535, 16 );
|
||||||
sram_writeshort( val, offset );
|
sram_writeshort( val, offset );
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void cmd_memset( void )
|
||||||
|
{
|
||||||
|
uint32_t offset = parse_unsigned( 0, 16777215, 16 );
|
||||||
|
uint32_t len = parse_unsigned( 0, 16777216, 16 );
|
||||||
|
uint8_t val = parse_unsigned( 0, 255, 16 );
|
||||||
|
sram_memset( offset, len, val );
|
||||||
|
}
|
||||||
|
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
/* CLI interface functions */
|
/* CLI interface functions */
|
||||||
/* ------------------------------------------------------------------------- */
|
/* ------------------------------------------------------------------------- */
|
||||||
|
|
||||||
void cli_init(void) {
|
void cli_init( void )
|
||||||
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
void cli_entrycheck() {
|
void cli_entrycheck()
|
||||||
if(uart_gotc() && uart_getc() == 27) {
|
{
|
||||||
|
if ( uart_gotc() && uart_getc() == 27 )
|
||||||
|
{
|
||||||
printf( "*** BREAK\n" );
|
printf( "*** BREAK\n" );
|
||||||
cli_loop();
|
cli_loop();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void cli_loop(void) {
|
void cli_loop( void )
|
||||||
while (1) {
|
{
|
||||||
|
while ( 1 )
|
||||||
|
{
|
||||||
curchar = getline( ">" );
|
curchar = getline( ">" );
|
||||||
printf( "\n" );
|
printf( "\n" );
|
||||||
|
|
||||||
/* Process medium changes before executing the command */
|
/* Process medium changes before executing the command */
|
||||||
if (disk_state != DISK_OK && disk_state != DISK_REMOVED) {
|
if ( disk_state != DISK_OK && disk_state != DISK_REMOVED )
|
||||||
|
{
|
||||||
FRESULT res;
|
FRESULT res;
|
||||||
|
|
||||||
printf( "Medium changed... " );
|
printf( "Medium changed... " );
|
||||||
res = f_mount( 0, &fatfs );
|
res = f_mount( 0, &fatfs );
|
||||||
if (res != FR_OK) {
|
|
||||||
|
if ( res != FR_OK )
|
||||||
|
{
|
||||||
printf( "Failed to mount new medium, result %d\n", res );
|
printf( "Failed to mount new medium, result %d\n", res );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
printf( "Ok\n" );
|
printf( "Ok\n" );
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Remove whitespace */
|
/* Remove whitespace */
|
||||||
while (*curchar == ' ') curchar++;
|
while ( *curchar == ' ' )
|
||||||
|
{
|
||||||
|
curchar++;
|
||||||
|
}
|
||||||
|
|
||||||
while ( strlen( curchar ) > 0 && curchar[strlen( curchar ) - 1] == ' ' )
|
while ( strlen( curchar ) > 0 && curchar[strlen( curchar ) - 1] == ' ' )
|
||||||
|
{
|
||||||
curchar[strlen( curchar ) - 1] = 0;
|
curchar[strlen( curchar ) - 1] = 0;
|
||||||
|
}
|
||||||
|
|
||||||
/* Ignore empty lines */
|
/* Ignore empty lines */
|
||||||
if ( strlen( curchar ) == 0 )
|
if ( strlen( curchar ) == 0 )
|
||||||
|
{
|
||||||
continue;
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
/* Parse command */
|
/* Parse command */
|
||||||
int8_t command = parse_wordlist( command_words );
|
int8_t command = parse_wordlist( command_words );
|
||||||
|
|
||||||
if ( command < 0 )
|
if ( command < 0 )
|
||||||
|
{
|
||||||
continue;
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
FRESULT res;
|
FRESULT res;
|
||||||
switch (command) {
|
|
||||||
|
switch ( command )
|
||||||
|
{
|
||||||
case CMD_CD:
|
case CMD_CD:
|
||||||
#if _FS_RPATH
|
#if _FS_RPATH
|
||||||
if (strlen(curchar) == 0) {
|
if ( strlen( curchar ) == 0 )
|
||||||
|
{
|
||||||
f_getcwd( ( TCHAR * )file_lfn, 255 );
|
f_getcwd( ( TCHAR * )file_lfn, 255 );
|
||||||
printf( "%s\n", file_lfn );
|
printf( "%s\n", file_lfn );
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
||||||
res = f_chdir( ( const TCHAR * )curchar );
|
res = f_chdir( ( const TCHAR * )curchar );
|
||||||
if (res != FR_OK) {
|
|
||||||
|
if ( res != FR_OK )
|
||||||
|
{
|
||||||
printf( "chdir %s failed with result %d\n", curchar, res );
|
printf( "chdir %s failed with result %d\n", curchar, res );
|
||||||
} else {
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
printf( "Ok.\n" );
|
printf( "Ok.\n" );
|
||||||
}
|
}
|
||||||
|
|
||||||
#else
|
#else
|
||||||
printf( "cd not supported.\n" );
|
printf( "cd not supported.\n" );
|
||||||
res;
|
res;
|
||||||
#endif
|
#endif
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CMD_RESET:
|
case CMD_RESET:
|
||||||
cmd_reset();
|
cmd_reset();
|
||||||
break;
|
break;
|
||||||
@@ -493,7 +670,7 @@ void cli_loop(void) {
|
|||||||
cmd_show_directory();
|
cmd_show_directory();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case CMD_RESUME:
|
case CMD_EXIT:
|
||||||
return;
|
return;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@@ -509,6 +686,14 @@ void cli_loop(void) {
|
|||||||
cmd_saveraw();
|
cmd_saveraw();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case CMD_RM:
|
||||||
|
cmd_rm();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case CMD_MKDIR:
|
||||||
|
cmd_mkdir();
|
||||||
|
break;
|
||||||
|
|
||||||
case CMD_D4:
|
case CMD_D4:
|
||||||
cmd_d4();
|
cmd_d4();
|
||||||
break;
|
break;
|
||||||
@@ -552,7 +737,15 @@ void cli_loop(void) {
|
|||||||
case CMD_W16:
|
case CMD_W16:
|
||||||
cmd_w16();
|
cmd_w16();
|
||||||
break;
|
break;
|
||||||
}
|
|
||||||
|
case CMD_MEMSET:
|
||||||
|
cmd_memset();
|
||||||
|
break;
|
||||||
|
|
||||||
|
case CMD_MEMTEST:
|
||||||
|
test_mem();
|
||||||
|
break;
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|||||||
49
src/clock.c
49
src/clock.c
@@ -7,12 +7,14 @@
|
|||||||
#include "bits.h"
|
#include "bits.h"
|
||||||
#include "uart.h"
|
#include "uart.h"
|
||||||
|
|
||||||
void clock_disconnect() {
|
void clock_disconnect()
|
||||||
|
{
|
||||||
disconnectPLL0();
|
disconnectPLL0();
|
||||||
disablePLL0();
|
disablePLL0();
|
||||||
}
|
}
|
||||||
|
|
||||||
void clock_init() {
|
void clock_init()
|
||||||
|
{
|
||||||
|
|
||||||
/* set flash access time to 5 clks (80<f<=100MHz) */
|
/* set flash access time to 5 clks (80<f<=100MHz) */
|
||||||
setFlashAccessTime( 5 );
|
setFlashAccessTime( 5 );
|
||||||
@@ -27,7 +29,7 @@ void clock_init() {
|
|||||||
-> FPGA freq = 11289473.7Hz
|
-> FPGA freq = 11289473.7Hz
|
||||||
First, disable and disconnect PLL0.
|
First, disable and disconnect PLL0.
|
||||||
*/
|
*/
|
||||||
// clock_disconnect();
|
clock_disconnect();
|
||||||
|
|
||||||
/* PLL is disabled and disconnected. setup PCLK NOW as it cannot be changed
|
/* PLL is disabled and disconnected. setup PCLK NOW as it cannot be changed
|
||||||
reliably with PLL0 connected.
|
reliably with PLL0 connected.
|
||||||
@@ -48,62 +50,73 @@ void clock_init() {
|
|||||||
*/
|
*/
|
||||||
enableMainOsc();
|
enableMainOsc();
|
||||||
setClkSrc( CLKSRC_MAINOSC );
|
setClkSrc( CLKSRC_MAINOSC );
|
||||||
// XXX setPLL0MultPrediv(429, 19);
|
setPLL0MultPrediv( 22, 1 );
|
||||||
// XXX setPLL0MultPrediv(23, 2);
|
|
||||||
setPLL0MultPrediv(12, 1);
|
|
||||||
enablePLL0();
|
enablePLL0();
|
||||||
setCCLKDiv(3);
|
setCCLKDiv( 6 );
|
||||||
connectPLL0();
|
connectPLL0();
|
||||||
}
|
}
|
||||||
|
|
||||||
void setFlashAccessTime(uint8_t clocks) {
|
void setFlashAccessTime( uint8_t clocks )
|
||||||
|
{
|
||||||
LPC_SC->FLASHCFG = FLASHTIM( clocks );
|
LPC_SC->FLASHCFG = FLASHTIM( clocks );
|
||||||
}
|
}
|
||||||
|
|
||||||
void setPLL0MultPrediv(uint16_t mult, uint8_t prediv) {
|
void setPLL0MultPrediv( uint16_t mult, uint8_t prediv )
|
||||||
|
{
|
||||||
LPC_SC->PLL0CFG = PLL_MULT( mult ) | PLL_PREDIV( prediv );
|
LPC_SC->PLL0CFG = PLL_MULT( mult ) | PLL_PREDIV( prediv );
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void enablePLL0() {
|
void enablePLL0()
|
||||||
|
{
|
||||||
LPC_SC->PLL0CON |= PLLE0;
|
LPC_SC->PLL0CON |= PLLE0;
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void disablePLL0() {
|
void disablePLL0()
|
||||||
|
{
|
||||||
LPC_SC->PLL0CON &= ~PLLE0;
|
LPC_SC->PLL0CON &= ~PLLE0;
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void connectPLL0() {
|
void connectPLL0()
|
||||||
|
{
|
||||||
while ( !( LPC_SC->PLL0STAT & PLOCK0 ) );
|
while ( !( LPC_SC->PLL0STAT & PLOCK0 ) );
|
||||||
|
|
||||||
LPC_SC->PLL0CON |= PLLC0;
|
LPC_SC->PLL0CON |= PLLC0;
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void disconnectPLL0() {
|
void disconnectPLL0()
|
||||||
|
{
|
||||||
LPC_SC->PLL0CON &= ~PLLC0;
|
LPC_SC->PLL0CON &= ~PLLC0;
|
||||||
PLL0feed();
|
PLL0feed();
|
||||||
}
|
}
|
||||||
|
|
||||||
void setCCLKDiv(uint8_t div) {
|
void setCCLKDiv( uint8_t div )
|
||||||
|
{
|
||||||
LPC_SC->CCLKCFG = CCLK_DIV( div );
|
LPC_SC->CCLKCFG = CCLK_DIV( div );
|
||||||
}
|
}
|
||||||
|
|
||||||
void enableMainOsc() {
|
void enableMainOsc()
|
||||||
|
{
|
||||||
LPC_SC->SCS = OSCEN;
|
LPC_SC->SCS = OSCEN;
|
||||||
|
|
||||||
while ( !( LPC_SC->SCS & OSCSTAT ) );
|
while ( !( LPC_SC->SCS & OSCSTAT ) );
|
||||||
}
|
}
|
||||||
|
|
||||||
void disableMainOsc() {
|
void disableMainOsc()
|
||||||
|
{
|
||||||
LPC_SC->SCS = 0;
|
LPC_SC->SCS = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void PLL0feed() {
|
void PLL0feed()
|
||||||
|
{
|
||||||
LPC_SC->PLL0FEED = 0xaa;
|
LPC_SC->PLL0FEED = 0xaa;
|
||||||
LPC_SC->PLL0FEED = 0x55;
|
LPC_SC->PLL0FEED = 0x55;
|
||||||
}
|
}
|
||||||
|
|
||||||
void setClkSrc(uint8_t src) {
|
void setClkSrc( uint8_t src )
|
||||||
|
{
|
||||||
LPC_SC->CLKSRCSEL = src;
|
LPC_SC->CLKSRCSEL = src;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -74,6 +74,4 @@ void disableMainOsc(void);
|
|||||||
void PLL0feed( void );
|
void PLL0feed( void );
|
||||||
|
|
||||||
void setClkSrc( uint8_t src );
|
void setClkSrc( uint8_t src );
|
||||||
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
@@ -1,3 +1,4 @@
|
|||||||
CONFIG_VERSION=0.0.1
|
CONFIG_VERSION="0.1.5"
|
||||||
CONFIG_FWVER=16777214
|
#FWVER=00010300
|
||||||
|
CONFIG_FWVER=0x00010500
|
||||||
CONFIG_MCU_FOSC=12000000
|
CONFIG_MCU_FOSC=12000000
|
||||||
|
|||||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user